imx6: add missing patches (r37363)
SVN-Revision: 37364
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3 changed files with 338 additions and 0 deletions
57
target/linux/imx6/patches-3.10/020-marvell-sky2-macdt.patch
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57
target/linux/imx6/patches-3.10/020-marvell-sky2-macdt.patch
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@ -0,0 +1,57 @@
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--- a/drivers/net/ethernet/marvell/sky2.c
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+++ b/drivers/net/ethernet/marvell/sky2.c
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@@ -44,6 +44,8 @@
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#include <linux/prefetch.h>
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#include <linux/debugfs.h>
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#include <linux/mii.h>
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+#include <linux/of_device.h>
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+#include <linux/of_net.h>
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#include <asm/irq.h>
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@@ -4748,6 +4750,7 @@ static struct net_device *sky2_init_netd
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{
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struct sky2_port *sky2;
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struct net_device *dev = alloc_etherdev(sizeof(*sky2));
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+ unsigned char *iap, tmpaddr[ETH_ALEN];
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if (!dev)
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return NULL;
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@@ -4802,8 +4805,36 @@ static struct net_device *sky2_init_netd
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dev->features |= dev->hw_features;
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+ /*
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+ * try to get mac address in the following order:
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+ * 1) from device tree data
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+ * 2) from internal registers set by bootloader
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+ */
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+ iap = NULL;
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+#ifdef CONFIG_OF
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+ struct device_node *np;
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+ np = of_find_node_by_path("/aliases");
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+ if (np) {
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+ const char *path = of_get_property(np, "sky2", NULL);
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+ if (path)
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+ np = of_find_node_by_path(path);
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+ if (np)
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+ path = of_get_mac_address(np);
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+ if (path)
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+ iap = (unsigned char *) path;
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+ }
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+#endif
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+
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+ /*
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+ * 2) mac registers set by bootloader
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+ */
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+ if (!iap || !is_valid_ether_addr(iap)) {
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+ memcpy_fromio(&tmpaddr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
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+ iap = &tmpaddr[0];
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+ }
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+
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/* read the mac address */
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- memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
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+ memcpy(dev->dev_addr, iap, ETH_ALEN);
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return dev;
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}
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190
target/linux/imx6/patches-3.10/110-gw5400-a.patch
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190
target/linux/imx6/patches-3.10/110-gw5400-a.patch
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@ -0,0 +1,190 @@
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx6dl-sabresd.dtb \
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imx6dl-wandboard.dtb \
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imx6q-arm2.dtb \
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+ imx6q-gw5400-a.dtb \
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imx6q-sabreauto.dtb \
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imx6q-sabrelite.dtb \
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imx6q-sabresd.dtb \
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--- a/arch/arm/boot/dts/imx6q.dtsi
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+++ b/arch/arm/boot/dts/imx6q.dtsi
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@@ -94,6 +94,14 @@
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MX6Q_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
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>;
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};
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+
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+ pinctrl_audmux_3: audmux-3 {
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+ fsl,pins = <
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+ MX6Q_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
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+ MX6Q_PAD_EIM_D25__AUD5_RXC 0x80000000
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+ MX6Q_PAD_DISP0_DAT18__AUD5_TXFS 0x80000000
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+ >;
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+ };
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};
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ecspi1 {
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@@ -201,6 +209,12 @@
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MX6Q_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
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>;
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};
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+ pinctrl_i2c2_2: i2c2grp-2 {
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+ fsl,pins = <
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+ MX6Q_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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+ MX6Q_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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+ >;
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+ };
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};
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i2c3 {
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@@ -210,6 +224,12 @@
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MX6Q_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
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>;
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};
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+ pinctrl_i2c3_2: i2c3grp-2 {
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+ fsl,pins = <
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+ MX6Q_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
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+ MX6Q_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
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+ >;
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+ };
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};
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uart1 {
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@@ -219,6 +239,12 @@
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MX6Q_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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+ pinctrl_uart1_2: uart1grp-2 {
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+ fsl,pins = <
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+ MX6Q_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
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+ MX6Q_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
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+ >;
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+ };
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};
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uart2 {
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@@ -228,6 +254,21 @@
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MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
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>;
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};
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+ pinctrl_uart2_2: uart2grp-2 {
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+ fsl,pins = <
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+ MX6Q_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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+ MX6Q_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
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+ >;
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+ };
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+ };
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+
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+ uart3 {
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+ pinctrl_uart3_1: uart3grp-1 {
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+ fsl,pins = <
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+ MX6Q_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1
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+ MX6Q_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1
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+ >;
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+ };
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};
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uart4 {
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@@ -238,6 +279,15 @@
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>;
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};
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};
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+
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+ uart5 {
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+ pinctrl_uart5_1: uart5grp-1 {
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+ fsl,pins = <
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+ MX6Q_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
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+ MX6Q_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
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+ >;
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+ };
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+ };
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usbotg {
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pinctrl_usbotg_1: usbotggrp-1 {
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--- a/arch/arm/mach-imx/mach-imx6q.c
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+++ b/arch/arm/mach-imx/mach-imx6q.c
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@@ -25,6 +25,7 @@
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/opp.h>
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+#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <linux/micrel_phy.h>
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@@ -145,6 +146,65 @@ static void __init imx6q_sabrelite_init(
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imx6q_sabrelite_cko1_setup();
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}
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+/*
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+ * fixup for PEX 8909 bridge to configure GPIO1-7 as output High
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+ * as they are used for slots1-7 PERST#
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+ */
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+static void mx6_ventana_pciesw_early_fixup(struct pci_dev *dev)
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+{
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+ u32 dw;
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+
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+ if (!of_machine_is_compatible("gw,ventana"))
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+ return;
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+
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+ if (dev->devfn != 0)
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+ return;
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+
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+ pci_read_config_dword(dev, 0x62c, &dw);
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+ dw |= 0xaaa8; // GPIO1-7 outputs
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+ pci_write_config_dword(dev, 0x62c, dw);
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+
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+ pci_read_config_dword(dev, 0x644, &dw);
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+ dw |= 0xfe; // GPIO1-7 output high
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+ pci_write_config_dword(dev, 0x644, dw);
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+}
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609,
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+ mx6_ventana_pciesw_early_fixup);
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+
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+/*
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+ * configure PCIe core clock and PCIe ref clock
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+ *
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+ * TODO: disable CLK1 output and use CLK2 input from si52147 as PCIe ref
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+ */
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+static void __init imx6q_ventana_pcie_setup(void)
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+{
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+ struct clk *axi_sel, *axi, *ref;
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+
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+ axi_sel = clk_get_sys(NULL, "pcie_axi_sel");
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+ axi = clk_get_sys(NULL, "axi");
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+ ref = clk_get_sys(NULL, "pcie_ref_125m");
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+ if (IS_ERR(axi_sel) || IS_ERR(axi) || IS_ERR(ref)) {
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+ pr_err("pcie setup failed - can't get clocks\n");
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+ goto put_clk;
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+ }
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+ clk_set_parent(axi_sel, axi);
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+ clk_prepare_enable(ref);
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+
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+put_clk:
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+ if (!IS_ERR(axi_sel))
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+ clk_put(axi_sel);
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+ if (!IS_ERR(axi))
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+ clk_put(axi);
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+ if (!IS_ERR(ref))
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+ clk_put(ref);
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+}
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+
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+static void __init imx6q_ventana_init(void)
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+{
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+ imx6q_ventana_pcie_setup();
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+ imx6q_sabrelite_cko1_setup();
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+}
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+
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static void __init imx6q_1588_init(void)
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{
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struct regmap *gpr;
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@@ -163,6 +223,9 @@ static void __init imx6q_usb_init(void)
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static void __init imx6q_init_machine(void)
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{
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+ if (of_machine_is_compatible("gw,ventana"))
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+ imx6q_ventana_init();
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+
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if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
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imx6q_sabrelite_init();
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91
target/linux/imx6/patches-3.10/200-imx6_pcie.patch
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91
target/linux/imx6/patches-3.10/200-imx6_pcie.patch
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@ -0,0 +1,91 @@
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--- a/arch/arm/boot/dts/imx6q.dtsi
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+++ b/arch/arm/boot/dts/imx6q.dtsi
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@@ -328,6 +328,15 @@
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};
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};
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+ pcie: pcie@01ffc000 {
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+ #crtc-cells = <1>;
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+ compatible = "fsl,imx6q-pcie", "fsl,pcie";
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+ reg = <0x01ffc000 0x4000>;
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+ clocks = <&clks 144>, <&clks 189>;
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+ clock-names = "pcie_axi", "pcie_ref_125m";
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+ status = "disabled";
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+ };
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+
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ipu2: ipu@02800000 {
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#crtc-cells = <1>;
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compatible = "fsl,imx6q-ipu";
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--- a/arch/arm/mach-imx/Kconfig
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+++ b/arch/arm/mach-imx/Kconfig
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@@ -790,6 +790,8 @@ config SOC_IMX6Q
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bool "i.MX6 Quad/DualLite support"
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select ARCH_HAS_CPUFREQ
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select ARCH_HAS_OPP
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+ select ARCH_HAS_IMX_PCIE
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+ select ARCH_SUPPORTS_MSI
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select ARM_CPU_SUSPEND if PM
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select ARM_ERRATA_754322
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select ARM_ERRATA_764369 if SMP
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@@ -816,6 +818,10 @@ config SOC_IMX6Q
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help
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This enables support for Freescale i.MX6 Quad processor.
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+config IMX_PCIE
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+ bool "PCI Express support"
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+ select PCI
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+
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endif
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source "arch/arm/mach-imx/devices/Kconfig"
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--- a/arch/arm/mach-imx/Makefile
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+++ b/arch/arm/mach-imx/Makefile
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@@ -98,6 +98,8 @@ AFLAGS_headsmp.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_SMP) += headsmp.o platsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
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+obj-$(CONFIG_IMX_PCIE) += pcie.o
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+obj-$(CONFIG_PCI_MSI) += msi.o
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ifeq ($(CONFIG_PM),y)
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obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -547,6 +547,12 @@ int __init mx6q_clocks_init(void)
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clk_register_clkdev(clk[ahb], "ahb", NULL);
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clk_register_clkdev(clk[cko1], "cko1", NULL);
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clk_register_clkdev(clk[arm], NULL, "cpu0");
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+ clk_register_clkdev(clk[pcie_axi_sel], "pcie_axi_sel", NULL);
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+ clk_register_clkdev(clk[axi], "axi", NULL);
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+ clk_register_clkdev(clk[pll6_enet], "pll6_enet", NULL);
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+ clk_register_clkdev(clk[pcie_ref], "pcie_ref", NULL);
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+ clk_register_clkdev(clk[pcie_ref_125m], "pcie_ref_125m", NULL);
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+ clk_register_clkdev(clk[pcie_axi], "pcie_axi", NULL);
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if (imx6q_revision() != IMX_CHIP_REVISION_1_0) {
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clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
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--- a/arch/arm/mach-imx/mxc.h
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+++ b/arch/arm/mach-imx/mxc.h
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@@ -151,6 +151,10 @@ extern unsigned int __mxc_cpu_type;
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# define cpu_is_mx53() (0)
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#endif
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+#ifdef CONFIG_SOC_IMX6Q
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+# define mxc_cpu_type __mxc_cpu_type
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+#endif
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+
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#ifndef __ASSEMBLY__
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static inline bool cpu_is_imx6dl(void)
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{
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--- a/arch/arm/include/asm/io.h
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+++ b/arch/arm/include/asm/io.h
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@@ -178,6 +178,9 @@ extern int pci_ioremap_io(unsigned int o
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*/
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#ifdef CONFIG_NEED_MACH_IO_H
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#include <mach/io.h>
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+#elif defined(CONFIG_SOC_IMX6Q) && defined(CONFIG_IMX_PCIE)
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+#define IO_SPACE_LIMIT ((resource_size_t)0xffffffff)
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+#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
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#elif defined(CONFIG_PCI)
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#define IO_SPACE_LIMIT ((resource_size_t)0xfffff)
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#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT))
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