imx6: update patches
Changes include PCI fixes and various upstream pending patches. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 38624
This commit is contained in:
parent
8effe85ada
commit
672a8cd6ba
19 changed files with 220 additions and 152 deletions
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@ -1,20 +0,0 @@
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--- a/drivers/regulator/pfuze100-regulator.c
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+++ b/drivers/regulator/pfuze100-regulator.c
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@@ -308,9 +308,14 @@ static int pfuze_identify(struct pfuze_c
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if (ret)
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return ret;
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- if (value & 0x0f) {
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- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
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- return -ENODEV;
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+ switch (value & 0xf) {
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+ case 0x0:
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+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
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+ case 0x8:
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+ break;
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+ default:
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+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
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+ return -ENODEV;
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}
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ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
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@ -0,0 +1,32 @@
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From: Tim Harvey <tharvey@gateworks.com>
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Subject: [PATCH] regulator: pfuze100: allow misprogrammed ID
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prior to week 08 of 2013 Freescale misprogrammed between 1 and 3% of
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PFUZE1000 parts with a ID=0x8 instead of the expected ID=0x0
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/regulator/pfuze100-regulator.c | 12 +++++++++---
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1 file changed, 9 insertions(+), 3 deletions(-)
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--- a/drivers/regulator/pfuze100-regulator.c
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+++ b/drivers/regulator/pfuze100-regulator.c
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@@ -308,9 +308,15 @@ static int pfuze_identify(struct pfuze_c
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if (ret)
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return ret;
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- if (value & 0x0f) {
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- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
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- return -ENODEV;
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+ switch (value & 0x0f) {
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+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
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+ case 0x8:
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+ dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
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+ case 0x0:
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+ break;
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+ default:
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+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
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+ return -ENODEV;
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}
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ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
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@ -0,0 +1,43 @@
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From: Tim Harvey <tharvey@gateworks.com>
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Subject: [PATCH] PCI: imx6: add support for legacy irqs
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The i.MX6 supports legacy IRQ's via 155,154,153,152. When devices
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are behind a PCIe-to-PCIe switch (at least for the TI XIO2001) the
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mapping is reversed from when they are behind a PCIe switch.
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This patch still needs some review and clarification before going
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upstream.
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---
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drivers/pci/host/pcie-designware.c | 21 ++++++++++++++++++++-
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1 file changed, 20 insertions(+), 1 deletion(-)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -447,7 +447,26 @@ int dw_pcie_map_irq(const struct pci_dev
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{
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struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
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- return pp->irq;
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+ /* TI XIO2001 PCIe-to-PCI bridge IRQs are flipped it seems */
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+ if ( dev->bus && dev->bus->self
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+ && (dev->bus->self->vendor == 0x104c)
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+ && (dev->bus->self->device == 0x8240)) {
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+ switch (pin) {
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+ case 1: return pp->irq - 3;
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+ case 2: return pp->irq - 2;
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+ case 3: return pp->irq - 1;
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+ case 4: return pp->irq;
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+ default: return -1;
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+ }
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+ } else {
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+ switch (pin) {
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+ case 1: return pp->irq;
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+ case 2: return pp->irq - 1;
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+ case 3: return pp->irq - 2;
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+ case 4: return pp->irq - 3;
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+ default: return -1;
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+ }
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+ }
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}
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static struct hw_pci dw_pci = {
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@ -1,26 +0,0 @@
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From: Tim Harvey <tharvey@gateworks.com>
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Subject: [PATCH 1/5] PCI: imx6: swizzle interrupts
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/pci/host/pcie-designware.c | 8 +++++++-
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1 file changed, 7 insertions(+), 1 deletion(-)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -447,7 +447,13 @@ int dw_pcie_map_irq(const struct pci_dev
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{
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struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
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- return pp->irq;
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+ switch (pin) {
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+ case 1: return pp->irq - 3;
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+ case 2: return pp->irq - 2;
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+ case 3: return pp->irq - 1;
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+ case 4: return pp->irq;
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+ default: return -1;
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+ }
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}
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static struct hw_pci dw_pci = {
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@ -1,3 +1,15 @@
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From: Tim Harvey <tharvey@gateworks.com>
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Subject: [PATCH] sky2: allow mac to come from dt
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The driver reads the mac address from the device registers which would
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need to have been programmed by the bootloader. This patch adds
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the ability to pull the mac from devicetree via the aliases/sky2 node.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/net/ethernet/marvell/sky2.c | 33 ++++++++++++++++++++++++++++++++-
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1 file changed, 32 insertions(+), 1 deletion(-)
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--- a/drivers/net/ethernet/marvell/sky2.c
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+++ b/drivers/net/ethernet/marvell/sky2.c
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@@ -44,6 +44,8 @@
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@ -17,12 +29,12 @@
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if (!dev)
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return NULL;
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@@ -4802,8 +4805,36 @@
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@@ -4802,8 +4805,36 @@ static struct net_device *sky2_init_netd
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dev->features |= dev->hw_features;
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+ /*
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+ * Try to get mac address in the following order:
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+ * try to get mac address in the following order:
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+ * 1) from device tree data
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+ * 2) from internal registers set by bootloader
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+ */
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@ -14,7 +14,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -182,7 +182,7 @@ static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
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@@ -182,7 +182,7 @@ static const char *periph2_clk2_sels[] =
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static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
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static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
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static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
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static const char *gpu_axi_sels[] = { "axi", "ahb", };
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static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
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static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
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@@ -196,7 +196,7 @@ static const char *ipu2_di0_sels[] = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di
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@@ -196,7 +196,7 @@ static const char *ipu2_di0_sels[] = { "
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static const char *ipu2_di1_sels[] = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
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static const char *hsi_tx_sels[] = { "pll3_120m", "pll2_pfd2_396m", };
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static const char *pcie_axi_sels[] = { "axi", "ahb", };
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@ -32,7 +32,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
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static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
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static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
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@@ -205,7 +205,7 @@ static const char *vdo_axi_sels[] = { "axi", "ahb", };
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@@ -205,7 +205,7 @@ static const char *vdo_axi_sels[] = { "a
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static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
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static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
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"dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
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@ -50,7 +50,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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static struct clk *clk[clk_max];
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@@ -359,6 +359,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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@@ -359,6 +359,7 @@ static void __init imx6q_clocks_init(str
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clk[twd] = imx_clk_fixed_factor("twd", "arm", 1, 2);
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clk[pll4_post_div] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
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@ -16,7 +16,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -300,7 +300,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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@@ -300,7 +300,7 @@ static void __init imx6q_clocks_init(str
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WARN_ON(!base);
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/* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */
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@ -25,7 +25,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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post_div_table[1].div = 1;
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post_div_table[2].div = 1;
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video_div_table[1].div = 1;
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@@ -574,7 +574,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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@@ -574,7 +574,8 @@ static void __init imx6q_clocks_init(str
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clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL);
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clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL);
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@ -37,7 +37,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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}
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--- a/arch/arm/mach-imx/common.h
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+++ b/arch/arm/mach-imx/common.h
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@@ -73,7 +73,6 @@ extern void mxc_restart(enum reboot_mode, const char *);
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@@ -77,7 +77,6 @@ extern void mxc_restart(enum reboot_mode
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extern void mxc_arch_reset_init(void __iomem *);
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extern void mxc_arch_reset_init_dt(void);
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extern int mx53_revision(void);
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@ -47,7 +47,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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extern int mxc_device_init(void);
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--- a/arch/arm/mach-imx/mach-imx6q.c
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+++ b/arch/arm/mach-imx/mach-imx6q.c
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@@ -38,16 +38,10 @@
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@@ -40,16 +40,10 @@
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#include "cpuidle.h"
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#include "hardware.h"
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@ -65,7 +65,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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switch (rev & 0xff) {
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case 0:
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@@ -64,6 +58,7 @@ static void __init imx6q_init_revision(void)
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@@ -66,6 +60,7 @@ static void __init imx6q_init_revision(v
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}
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mxc_set_cpu_type(rev >> 16 & 0xff);
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@ -73,7 +73,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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}
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static void imx6q_restart(enum reboot_mode mode, const char *cmd)
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@@ -269,7 +264,7 @@
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@@ -269,7 +264,7 @@ static void __init imx6q_init_late(void)
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* WAIT mode is broken on TO 1.0 and 1.1, so there is no point
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* to run cpuidle on them.
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*/
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@ -82,7 +82,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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imx6q_cpuidle_init();
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
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@@ -298,7 +293,7 @@
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@@ -298,7 +293,7 @@ static void __init imx6q_timer_init(void
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of_clk_init(NULL);
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clocksource_of_init();
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imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
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@ -37,7 +37,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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static struct clk *clk[clk_max];
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@@ -342,6 +348,18 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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@@ -342,6 +348,18 @@ static void __init imx6q_clocks_init(str
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base + 0xe0, 0, 2, 0, clk_enet_ref_table,
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&imx_ccm_lock);
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@ -12,11 +12,9 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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arch/arm/mach-imx/clk-imx6q.c | 4 ++++
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2 files changed, 6 insertions(+)
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diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
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index e017915..270f786 100644
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--- a/arch/arm/mach-imx/Kconfig
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+++ b/arch/arm/mach-imx/Kconfig
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@@ -802,6 +802,8 @@ config SOC_IMX6Q
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@@ -801,6 +801,8 @@ config SOC_IMX6Q
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select HAVE_IMX_SRC
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select HAVE_SMP
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select MFD_SYSCON
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@ -25,11 +23,9 @@ index e017915..270f786 100644
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select PINCTRL
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select PINCTRL_IMX6Q
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select PL310_ERRATA_588369 if CACHE_PL310
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diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
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index e8e5bad..07bc0d8 100644
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -623,6 +623,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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@@ -623,6 +623,10 @@ static void __init imx6q_clocks_init(str
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if (ret)
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pr_warn("failed to set up CLKO: %d\n", ret);
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@ -40,6 +36,3 @@ index e8e5bad..07bc0d8 100644
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/* Set initial power mode */
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imx6q_set_lpm(WAIT_CLOCKED);
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--
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1.8.4.1
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@ -11,7 +11,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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--- a/arch/arm/boot/dts/imx6qdl.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl.dtsi
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@@ -639,6 +639,14 @@
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@@ -622,6 +622,14 @@
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MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
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>;
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};
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@ -26,7 +26,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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ecspi1 {
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@@ -811,6 +819,28 @@
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@@ -794,6 +802,28 @@
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MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
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>;
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};
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@ -55,7 +55,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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hdmi_hdcp {
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@@ -1058,6 +1088,13 @@
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@@ -1035,6 +1065,13 @@
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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@ -69,7 +69,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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uart2 {
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@@ -1076,6 +1113,13 @@
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@@ -1053,6 +1090,13 @@
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MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
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>;
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};
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@ -83,7 +83,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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uart3 {
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@@ -1096,6 +1140,13 @@
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@@ -1073,6 +1117,13 @@
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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>;
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};
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@ -97,10 +97,11 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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};
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uart4 {
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@@ -1107,6 +1158,15 @@
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@@ -1083,6 +1134,15 @@
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>;
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};
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};
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+
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+ uart5 {
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+ pinctrl_uart5_1: uart5grp-1 {
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+ fsl,pins = <
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||||
|
@ -109,7 +110,6 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|||
+ >;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
|
||||
usbotg {
|
||||
pinctrl_usbotg_1: usbotggrp-1 {
|
||||
fsl,pins = <
|
||||
|
|
|
@ -41,7 +41,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|||
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -131,10 +131,19 @@ dtb-$(CONFIG_ARCH_MXC) += \
|
||||
@@ -133,10 +133,19 @@ dtb-$(CONFIG_ARCH_MXC) += \
|
||||
imx53-mba53.dtb \
|
||||
imx53-qsb.dtb \
|
||||
imx53-smd.dtb \
|
||||
|
|
|
@ -15,7 +15,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|||
|
||||
--- a/arch/arm/mach-imx/mach-imx6q.c
|
||||
+++ b/arch/arm/mach-imx/mach-imx6q.c
|
||||
@@ -23,6 +24,7 @@
|
||||
@@ -26,6 +26,7 @@
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/opp.h>
|
||||
|
@ -23,7 +23,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|||
#include <linux/phy.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/regmap.h>
|
||||
@@ -78,6 +80,34 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
|
||||
@@ -134,6 +135,34 @@ static int ksz9031rn_phy_fixup(struct ph
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -12,8 +12,6 @@ Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
|
|||
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
|
||||
index b6bdcd6..e00e9f3 100644
|
||||
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
|
||||
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
|
||||
@@ -241,6 +241,12 @@
|
||||
|
@ -39,6 +37,3 @@ index b6bdcd6..e00e9f3 100644
|
|||
|
||||
#define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30)
|
||||
#define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29)
|
||||
--
|
||||
1.8.4.1
|
||||
|
||||
|
|
|
@ -1,20 +0,0 @@
|
|||
--- a/drivers/regulator/pfuze100-regulator.c
|
||||
+++ b/drivers/regulator/pfuze100-regulator.c
|
||||
@@ -308,9 +308,14 @@ static int pfuze_identify(struct pfuze_c
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- if (value & 0x0f) {
|
||||
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
|
||||
- return -ENODEV;
|
||||
+ switch (value & 0xf) {
|
||||
+ case 0x0:
|
||||
+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
|
||||
+ case 0x8:
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
|
||||
+ return -ENODEV;
|
||||
}
|
||||
|
||||
ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
|
|
@ -0,0 +1,32 @@
|
|||
From: Tim Harvey <tharvey@gateworks.com>
|
||||
Subject: [PATCH] regulator: pfuze100: allow misprogrammed ID
|
||||
|
||||
prior to week 08 of 2013 Freescale misprogrammed between 1 and 3% of
|
||||
PFUZE1000 parts with a ID=0x8 instead of the expected ID=0x0
|
||||
|
||||
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
||||
---
|
||||
drivers/regulator/pfuze100-regulator.c | 12 +++++++++---
|
||||
1 file changed, 9 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/regulator/pfuze100-regulator.c
|
||||
+++ b/drivers/regulator/pfuze100-regulator.c
|
||||
@@ -308,9 +308,15 @@ static int pfuze_identify(struct pfuze_c
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- if (value & 0x0f) {
|
||||
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
|
||||
- return -ENODEV;
|
||||
+ switch (value & 0x0f) {
|
||||
+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
|
||||
+ case 0x8:
|
||||
+ dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
|
||||
+ case 0x0:
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
|
||||
+ return -ENODEV;
|
||||
}
|
||||
|
||||
ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
|
|
@ -0,0 +1,43 @@
|
|||
From: Tim Harvey <tharvey@gateworks.com>
|
||||
Subject: [PATCH] PCI: imx6: add support for legacy irqs
|
||||
|
||||
The i.MX6 supports legacy IRQ's via 155,154,153,152. When devices
|
||||
are behind a PCIe-to-PCIe switch (at least for the TI XIO2001) the
|
||||
mapping is reversed from when they are behind a PCIe switch.
|
||||
|
||||
This patch still needs some review and clarification before going
|
||||
upstream.
|
||||
---
|
||||
drivers/pci/host/pcie-designware.c | 21 ++++++++++++++++++++-
|
||||
1 file changed, 20 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/pci/host/pcie-designware.c
|
||||
+++ b/drivers/pci/host/pcie-designware.c
|
||||
@@ -447,7 +447,26 @@ int dw_pcie_map_irq(const struct pci_dev
|
||||
{
|
||||
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
|
||||
|
||||
- return pp->irq;
|
||||
+ /* TI XIO2001 PCIe-to-PCI bridge IRQs are flipped it seems */
|
||||
+ if ( dev->bus && dev->bus->self
|
||||
+ && (dev->bus->self->vendor == 0x104c)
|
||||
+ && (dev->bus->self->device == 0x8240)) {
|
||||
+ switch (pin) {
|
||||
+ case 1: return pp->irq - 3;
|
||||
+ case 2: return pp->irq - 2;
|
||||
+ case 3: return pp->irq - 1;
|
||||
+ case 4: return pp->irq;
|
||||
+ default: return -1;
|
||||
+ }
|
||||
+ } else {
|
||||
+ switch (pin) {
|
||||
+ case 1: return pp->irq;
|
||||
+ case 2: return pp->irq - 1;
|
||||
+ case 3: return pp->irq - 2;
|
||||
+ case 4: return pp->irq - 3;
|
||||
+ default: return -1;
|
||||
+ }
|
||||
+ }
|
||||
}
|
||||
|
||||
static struct hw_pci dw_pci = {
|
|
@ -1,28 +0,0 @@
|
|||
From 73a0e49b562da9b06e487fb8e051075543495be5 Mon Sep 17 00:00:00 2001
|
||||
From: Tim Harvey <tharvey@gateworks.com>
|
||||
Date: Thu, 17 Oct 2013 15:50:48 -0700
|
||||
Subject: [PATCH 1/5] PCI: imx6: swizzle interrupts
|
||||
|
||||
|
||||
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
||||
---
|
||||
drivers/pci/host/pcie-designware.c | 8 +++++++-
|
||||
1 file changed, 7 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/pci/host/pcie-designware.c
|
||||
+++ b/drivers/pci/host/pcie-designware.c
|
||||
@@ -447,7 +447,13 @@ int dw_pcie_map_irq(const struct pci_dev
|
||||
{
|
||||
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
|
||||
|
||||
- return pp->irq;
|
||||
+ switch (pin) {
|
||||
+ case 1: return pp->irq - 1;
|
||||
+ case 2: return pp->irq - 2;
|
||||
+ case 3: return pp->irq - 3;
|
||||
+ case 4: return pp->irq;
|
||||
+ default: return -1;
|
||||
+ }
|
||||
}
|
||||
|
||||
static struct hw_pci dw_pci = {
|
|
@ -17,22 +17,22 @@ Tested-by: Luka Perkov <luka@openwrt.org>
|
|||
#define IMX_I2C_BIT_RATE 100000 /* 100kHz */
|
||||
+#define IMX_I2C_MAX_RETRIES 3 /* number of retries to attempt */
|
||||
|
||||
/* IMX I2C registers */
|
||||
#define IMX_I2C_IADR 0x00 /* i2c slave address */
|
||||
@@ -198,7 +199,7 @@ static int i2c_imx_acked(struct imx_i2c_
|
||||
/* IMX I2C registers:
|
||||
* the I2C register offset is different between SoCs,
|
||||
@@ -298,7 +299,7 @@ static int i2c_imx_acked(struct imx_i2c_
|
||||
{
|
||||
if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
|
||||
if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) {
|
||||
dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
|
||||
- return -EIO; /* No ACK */
|
||||
+ return -EAGAIN; /* try again */
|
||||
}
|
||||
|
||||
dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
|
||||
@@ -533,6 +534,7 @@ static int __init i2c_imx_probe(struct p
|
||||
@@ -633,6 +634,7 @@ static int i2c_imx_probe(struct platform
|
||||
i2c_imx->adapter.dev.parent = &pdev->dev;
|
||||
i2c_imx->adapter.nr = pdev->id;
|
||||
i2c_imx->adapter.dev.of_node = pdev->dev.of_node;
|
||||
+ i2c_imx->adapter.retries = IMX_I2C_MAX_RETRIES;
|
||||
i2c_imx->base = base;
|
||||
|
||||
pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
|
||||
/* Get I2C clock */
|
||||
|
|
|
@ -1,3 +1,15 @@
|
|||
From: Tim Harvey <tharvey@gateworks.com>
|
||||
Subject: [PATCH] sky2: allow mac to come from dt
|
||||
|
||||
The driver reads the mac address from the device registers which would
|
||||
need to have been programmed by the bootloader. This patch adds
|
||||
the ability to pull the mac from devicetree via the aliases/sky2 node.
|
||||
|
||||
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
||||
---
|
||||
drivers/net/ethernet/marvell/sky2.c | 33 ++++++++++++++++++++++++++++++++-
|
||||
1 file changed, 32 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/ethernet/marvell/sky2.c
|
||||
+++ b/drivers/net/ethernet/marvell/sky2.c
|
||||
@@ -44,6 +44,8 @@
|
||||
|
@ -27,19 +39,19 @@
|
|||
+ * 2) from internal registers set by bootloader
|
||||
+ */
|
||||
+ iap = NULL;
|
||||
+#ifdef CONFIG_OF
|
||||
+ struct device_node *np;
|
||||
+ np = of_find_node_by_path("/aliases");
|
||||
+ if (np) {
|
||||
+ const char *path = of_get_property(np, "sky2", NULL);
|
||||
+ if (path)
|
||||
+ np = of_find_node_by_path(path);
|
||||
+ if (np)
|
||||
+ path = of_get_mac_address(np);
|
||||
+ if (path)
|
||||
+ iap = (unsigned char *) path;
|
||||
+ if (IS_ENABLED(CONFIG_OF)) {
|
||||
+ struct device_node *np;
|
||||
+ np = of_find_node_by_path("/aliases");
|
||||
+ if (np) {
|
||||
+ const char *path = of_get_property(np, "sky2", NULL);
|
||||
+ if (path)
|
||||
+ np = of_find_node_by_path(path);
|
||||
+ if (np)
|
||||
+ path = of_get_mac_address(np);
|
||||
+ if (path)
|
||||
+ iap = (unsigned char *) path;
|
||||
+ }
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
+ /*
|
||||
+ * 2) mac registers set by bootloader
|
Loading…
Reference in a new issue