Revert "ramips: improve interrupt mapping"
This reverts commit 5f7396ebef
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Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
parent
7577f32c8a
commit
64878a5616
2 changed files with 68 additions and 13 deletions
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@ -440,11 +440,10 @@
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0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
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>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xF0000 0 0 1>;
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interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
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<0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,
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<0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
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GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
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GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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@ -74,6 +74,9 @@ extern void chk_phy_pll(void);
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#define RALINK_PCI_CONFIG_ADDR 0x20
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#define RALINK_PCI_CONFIG_DATA_VIRTUAL_REG 0x24
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#define RALINK_INT_PCIE0 pcie_irq[0]
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#define RALINK_INT_PCIE1 pcie_irq[1]
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#define RALINK_INT_PCIE2 pcie_irq[2]
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#define RALINK_PCI_MEMBASE *(volatile u32 *)(RALINK_PCI_BASE + 0x0028)
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#define RALINK_PCI_IOBASE *(volatile u32 *)(RALINK_PCI_BASE + 0x002C)
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#define RALINK_PCIE0_RST (1<<24)
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@ -364,12 +367,68 @@ pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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u16 cmd;
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u32 val;
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int irq;
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int irq = 0;
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if (dev->bus->number == 0) {
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write_config(0, slot, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
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read_config(0, slot, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
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printk("BAR0 at slot %d = %x\n", slot, val);
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if ((dev->bus->number == 0) && (slot == 0)) {
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write_config(0, 0, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
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read_config(0, 0, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
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printk("BAR0 at slot 0 = %x\n", val);
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printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
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} else if((dev->bus->number == 0) && (slot == 0x1)) {
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write_config(0, 1, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
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read_config(0, 1, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
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printk("BAR0 at slot 1 = %x\n", val);
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printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
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} else if((dev->bus->number == 0) && (slot == 0x2)) {
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write_config(0, 2, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
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read_config(0, 2, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
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printk("BAR0 at slot 2 = %x\n", val);
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printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
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} else if ((dev->bus->number == 1) && (slot == 0x0)) {
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switch (pcie_link_status) {
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case 2:
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case 6:
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irq = RALINK_INT_PCIE1;
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break;
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case 4:
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irq = RALINK_INT_PCIE2;
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break;
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default:
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irq = RALINK_INT_PCIE0;
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}
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printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
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} else if ((dev->bus->number == 2) && (slot == 0x0)) {
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switch (pcie_link_status) {
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case 5:
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case 6:
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irq = RALINK_INT_PCIE2;
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break;
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default:
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irq = RALINK_INT_PCIE1;
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}
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printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
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} else if ((dev->bus->number == 2) && (slot == 0x1)) {
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switch (pcie_link_status) {
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case 5:
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case 6:
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irq = RALINK_INT_PCIE2;
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break;
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default:
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irq = RALINK_INT_PCIE1;
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}
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printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
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} else if ((dev->bus->number ==3) && (slot == 0x0)) {
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irq = RALINK_INT_PCIE2;
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printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
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} else if ((dev->bus->number ==3) && (slot == 0x1)) {
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irq = RALINK_INT_PCIE2;
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printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
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} else if ((dev->bus->number ==3) && (slot == 0x2)) {
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irq = RALINK_INT_PCIE2;
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printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
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} else {
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printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
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return 0;
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}
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pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x14); //configure cache line size 0x14
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@ -377,9 +436,6 @@ pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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cmd = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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irq = of_irq_parse_and_map_pci(dev, slot, pin);
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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return irq;
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}
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