ipq806x: do not allocate coherent memory in dma engine hotpath
The available amount of coherent DMA memory is very limited. On Linux 4.4 this issue was worked around by increasing the pool size. It turns out that using coherent memory here is completely unnecessary. This change reworks the driver code to use kzalloc+dma_map_single instead. Signed-off-by: Felix Fietkau <nbd@nbd.name>
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1adf51702e
commit
6006227cb7
1 changed files with 29 additions and 15 deletions
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@ -49,7 +49,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+obj-$(CONFIG_QCOM_ADM) += qcom_adm.o
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--- /dev/null
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+++ b/drivers/dma/qcom/qcom_adm.c
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@@ -0,0 +1,900 @@
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@@ -0,0 +1,914 @@
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+/*
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+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
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+ *
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@ -406,6 +406,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+ struct adm_device *adev = achan->adev;
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+ struct adm_async_desc *async_desc;
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+ struct scatterlist *sg;
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+ dma_addr_t cple_addr;
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+ u32 i, burst;
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+ u32 single_count = 0, box_count = 0, crci = 0;
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+ void *desc;
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@ -454,7 +455,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+ }
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+ }
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+
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+ async_desc = kzalloc(sizeof(*async_desc), GFP_NOWAIT);
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+ async_desc = kzalloc(sizeof(*async_desc), GFP_ATOMIC);
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+ if (!async_desc)
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+ return ERR_PTR(-ENOMEM);
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+
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@ -467,13 +468,9 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+ box_count * sizeof(struct adm_desc_hw_box) +
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+ sizeof(*cple) + 2 * ADM_DESC_ALIGN;
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+
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+ async_desc->cpl = dma_alloc_writecombine(adev->dev, async_desc->dma_len,
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+ &async_desc->dma_addr, GFP_NOWAIT);
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+
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+ if (!async_desc->cpl) {
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+ kfree(async_desc);
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+ return ERR_PTR(-ENOMEM);
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+ }
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+ async_desc->cpl = kzalloc(async_desc->dma_len, GFP_ATOMIC);
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+ if (!async_desc->cpl)
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+ goto free;
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+
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+ async_desc->adev = adev;
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+
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@ -481,10 +478,6 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+ cple = PTR_ALIGN(async_desc->cpl, ADM_DESC_ALIGN);
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+ desc = PTR_ALIGN(cple + 1, ADM_DESC_ALIGN);
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+
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+ /* init cmd list */
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+ *cple = ADM_CPLE_LP;
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+ *cple |= (desc - async_desc->cpl + async_desc->dma_addr) >> 3;
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+
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+ for_each_sg(sgl, sg, sg_len, i) {
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+ async_desc->length += sg_dma_len(sg);
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+
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@ -496,7 +489,27 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+ direction);
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+ }
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+
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+ async_desc->dma_addr = dma_map_single(adev->dev, async_desc->cpl,
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+ async_desc->dma_len,
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+ DMA_TO_DEVICE);
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+ if (dma_mapping_error(adev->dev, async_desc->dma_addr))
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+ goto free;
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+
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+ cple_addr = async_desc->dma_addr + ((void *)cple - async_desc->cpl);
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+
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+ /* init cmd list */
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+ dma_sync_single_for_cpu(adev->dev, cple_addr, sizeof(*cple),
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+ DMA_TO_DEVICE);
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+ *cple = ADM_CPLE_LP;
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+ *cple |= (async_desc->dma_addr + ADM_DESC_ALIGN) >> 3;
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+ dma_sync_single_for_device(adev->dev, cple_addr, sizeof(*cple),
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+ DMA_TO_DEVICE);
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+
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+ return vchan_tx_prep(&achan->vc, &async_desc->vd, flags);
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+
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+free:
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+ kfree(async_desc);
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+ return ERR_PTR(-ENOMEM);
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+}
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+
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+/**
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@ -721,8 +734,9 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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+ struct adm_async_desc *async_desc = container_of(vd,
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+ struct adm_async_desc, vd);
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+
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+ dma_free_writecombine(async_desc->adev->dev, async_desc->dma_len,
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+ async_desc->cpl, async_desc->dma_addr);
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+ dma_unmap_single(async_desc->adev->dev, async_desc->dma_addr,
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+ async_desc->dma_len, DMA_TO_DEVICE);
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+ kfree(async_desc->cpl);
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+ kfree(async_desc);
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+}
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+
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