brcm63xx: add clkdev lookup support

Add clockdev lookup support for easier providing of clocks for
devices.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
This commit is contained in:
Jonas Gorski 2017-07-31 10:52:48 +02:00
parent e12c72bb52
commit 5c69047aaf
17 changed files with 793 additions and 73 deletions

View file

@ -47,6 +47,7 @@ CONFIG_BOARD_BCM963XX=y
CONFIG_BOARD_LIVEBOX=y CONFIG_BOARD_LIVEBOX=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y CONFIG_CEVT_R4K=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLONE_BACKWARDS=y CONFIG_CLONE_BACKWARDS=y
CONFIG_CPU_BIG_ENDIAN=y CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_BMIPS=y CONFIG_CPU_BMIPS=y

View file

@ -0,0 +1,210 @@
From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 16 Jul 2017 12:23:47 +0200
Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support
Enable clkdev lookup support to allow us providing clocks under
different names to devices more easily, so we don't need to care
about clock name clashes anymore.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/Kconfig | 1 +
arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++-----------
2 files changed, 116 insertions(+), 35 deletions(-)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -214,6 +214,7 @@ config BCM63XX
select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
select MIPS_L1_CACHE_SHIFT_4
+ select CLKDEV_LOOKUP
help
Support for BCM63XX based boards
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -10,6 +10,7 @@
#include <linux/mutex.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/clkdev.h>
#include <linux/delay.h>
#include <bcm63xx_cpu.h>
#include <bcm63xx_io.h>
@@ -352,44 +353,103 @@ long clk_round_rate(struct clk *clk, uns
}
EXPORT_SYMBOL_GPL(clk_round_rate);
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "enet0"))
- return &clk_enet0;
- if (!strcmp(id, "enet1"))
- return &clk_enet1;
- if (!strcmp(id, "enetsw"))
- return &clk_enetsw;
- if (!strcmp(id, "ephy"))
- return &clk_ephy;
- if (!strcmp(id, "usbh"))
- return &clk_usbh;
- if (!strcmp(id, "usbd"))
- return &clk_usbd;
- if (!strcmp(id, "spi"))
- return &clk_spi;
- if (!strcmp(id, "hsspi"))
- return &clk_hsspi;
- if (!strcmp(id, "xtm"))
- return &clk_xtm;
- if (!strcmp(id, "periph"))
- return &clk_periph;
- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
- return &clk_pcm;
- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
- return &clk_ipsec;
- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
- return &clk_pcie;
- return ERR_PTR(-ENOENT);
-}
-
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-
-EXPORT_SYMBOL(clk_put);
+static struct clk_lookup bcm3368_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
+};
+
+static struct clk_lookup bcm6328_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
+};
+
+static struct clk_lookup bcm6338_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+};
+
+static struct clk_lookup bcm6345_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+};
+
+static struct clk_lookup bcm6348_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+};
+
+static struct clk_lookup bcm6358_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
+};
+
+static struct clk_lookup bcm6362_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
+};
+
+static struct clk_lookup bcm6368_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "xtm", &clk_xtm),
+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
+};
#define HSSPI_PLL_HZ_6328 133333333
#define HSSPI_PLL_HZ_6362 400000000
@@ -397,11 +457,31 @@ EXPORT_SYMBOL(clk_put);
static int __init bcm63xx_clk_init(void)
{
switch (bcm63xx_get_cpu_id()) {
+ case BCM3368_CPU_ID:
+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
+ break;
case BCM6328_CPU_ID:
clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
+ break;
+ case BCM6338_CPU_ID:
+ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks));
+ break;
+ case BCM6345_CPU_ID:
+ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks));
+ break;
+ case BCM6348_CPU_ID:
+ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks));
+ break;
+ case BCM6358_CPU_ID:
+ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
break;
case BCM6362_CPU_ID:
clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
+ break;
+ case BCM6368_CPU_ID:
+ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
break;
}

View file

@ -0,0 +1,84 @@
From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 16 Jul 2017 12:31:44 +0200
Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart
Add a lookup as "refclk" to describe its function for the uarts.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/bcm63xx/clk.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -356,6 +356,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
static struct clk_lookup bcm3368_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -369,6 +371,8 @@ static struct clk_lookup bcm3368_clks[]
static struct clk_lookup bcm6328_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[]
static struct clk_lookup bcm6338_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -392,6 +397,7 @@ static struct clk_lookup bcm6338_clks[]
static struct clk_lookup bcm6345_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -404,6 +410,7 @@ static struct clk_lookup bcm6345_clks[]
static struct clk_lookup bcm6348_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -416,6 +423,8 @@ static struct clk_lookup bcm6348_clks[]
static struct clk_lookup bcm6358_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -429,6 +438,8 @@ static struct clk_lookup bcm6358_clks[]
static struct clk_lookup bcm6362_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -442,6 +453,8 @@ static struct clk_lookup bcm6362_clks[]
static struct clk_lookup bcm6368_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),

View file

@ -0,0 +1,26 @@
From 8124706e6040b1cf0d2dd3a05759df6cec4bddfb Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 16 Jul 2017 12:32:37 +0200
Subject: [PATCH V2 3/8] tty/bcm63xx_uart: use refclk for the expected clock
name
We now have the clock available under refclk, so use that.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
drivers/tty/serial/bcm63xx_uart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -838,7 +838,7 @@ static int bcm_uart_probe(struct platfor
return -ENODEV;
clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
- clk_get(&pdev->dev, "periph");
+ clk_get(&pdev->dev, "refclk");
if (IS_ERR(clk))
return -ENODEV;

View file

@ -0,0 +1,55 @@
From 317f8659bba01b307cbe4e9902d4e3d333fd7164 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 16 Jul 2017 12:39:17 +0200
Subject: [PATCH V2 4/8] tty/bcm63xx_uart: allow naming clock in device tree
Codify using a named clock for the refclk of the uart. This makes it
easier if we might need to add a gating clock (like present on the
BCM6345).
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++
drivers/tty/serial/bcm63xx_uart.c | 6 ++++--
2 files changed, 10 insertions(+), 2 deletions(-)
--- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
+++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
@@ -11,6 +11,11 @@ Required properties:
- clocks: Clock driving the hardware; used to figure out the baud rate
divisor.
+
+Optional properties:
+
+- clock-names: Should be "refclk".
+
Example:
uart0: serial@14e00520 {
@@ -19,6 +24,7 @@ Example:
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
+ clock-names = "refclk";
};
clocks {
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -837,8 +837,10 @@ static int bcm_uart_probe(struct platfor
if (!res_irq)
return -ENODEV;
- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
- clk_get(&pdev->dev, "refclk");
+ clk = clk_get(&pdev->dev, "refclk");
+ if (IS_ERR(clk) && pdev->dev.of_node)
+ clk = of_clk_get(pdev->dev.of_node, 0);
+
if (IS_ERR(clk))
return -ENODEV;

View file

@ -0,0 +1,62 @@
From cb86630379c8f3432c916d62045b5176f17f4123 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 16 Jul 2017 12:57:21 +0200
Subject: [PATCH V2 6/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own
clock
Split up the HSSPL clock into rate and a gate clock, to more closely
match the actual hardware.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/bcm63xx/clk.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -247,6 +247,10 @@ static struct clk clk_hsspi = {
.set = hsspi_set,
};
+/*
+ * HSSPI PLL
+ */
+static struct clk clk_hsspi_pll;
/*
* XTM clock
@@ -373,6 +377,7 @@ static struct clk_lookup bcm6328_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -440,6 +445,7 @@ static struct clk_lookup bcm6362_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -474,7 +480,7 @@ static int __init bcm63xx_clk_init(void)
clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
break;
case BCM6328_CPU_ID:
- clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
break;
case BCM6338_CPU_ID:
@@ -490,7 +496,7 @@ static int __init bcm63xx_clk_init(void)
clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
break;
case BCM6362_CPU_ID:
- clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
break;
case BCM6368_CPU_ID:

View file

@ -0,0 +1,60 @@
From 6d43970a2eb1c7ee88caf7328d201f9c001262e9 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 16 Jul 2017 12:48:41 +0200
Subject: [PATCH V2 7/8] MIPS: BCM63XX: provide enet clocks as "enet" to the
ethernet devices
Add lookups to provide the appropriate enetX clocks as just "enet" to
the ethernet devices.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/bcm63xx/clk.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -370,6 +370,8 @@ static struct clk_lookup bcm3368_clks[]
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
CLKDEV_INIT(NULL, "spi", &clk_spi),
CLKDEV_INIT(NULL, "pcm", &clk_pcm),
+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
};
static struct clk_lookup bcm6328_clks[] = {
@@ -397,6 +399,7 @@ static struct clk_lookup bcm6338_clks[]
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
};
static struct clk_lookup bcm6345_clks[] = {
@@ -410,6 +413,7 @@ static struct clk_lookup bcm6345_clks[]
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
};
static struct clk_lookup bcm6348_clks[] = {
@@ -423,6 +427,8 @@ static struct clk_lookup bcm6348_clks[]
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc),
};
static struct clk_lookup bcm6358_clks[] = {
@@ -438,6 +444,8 @@ static struct clk_lookup bcm6358_clks[]
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
CLKDEV_INIT(NULL, "spi", &clk_spi),
CLKDEV_INIT(NULL, "pcm", &clk_pcm),
+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
};
static struct clk_lookup bcm6362_clks[] = {

View file

@ -0,0 +1,105 @@
From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 26 Feb 2017 11:59:52 +0100
Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks
Make the secondary switch clocks their own clocks. This allows proper
enable reference counting between SAR/XTM and the main switch clocks,
and controlling them individually from drivers.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 51 insertions(+), 10 deletions(-)
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -121,21 +121,56 @@ static struct clk clk_ephy = {
};
/*
+ * Ethernet switch SAR clock
+ */
+static void swpkt_sar_set(struct clk *clk, int enable)
+{
+ if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable);
+ else
+ return;
+}
+
+static struct clk clk_swpkt_sar = {
+ .set = swpkt_sar_set,
+};
+
+/*
+ * Ethernet switch USB clock
+ */
+static void swpkt_usb_set(struct clk *clk, int enable)
+{
+ if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable);
+ else
+ return;
+}
+
+static struct clk clk_swpkt_usb = {
+ .set = swpkt_usb_set,
+};
+
+/*
* Ethernet switch clock
*/
static void enetsw_set(struct clk *clk, int enable)
{
- if (BCMCPU_IS_6328())
+ if (BCMCPU_IS_6328()) {
bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
- else if (BCMCPU_IS_6362())
+ } else if (BCMCPU_IS_6362()) {
bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
- CKCTL_6368_SWPKT_USB_EN |
- CKCTL_6368_SWPKT_SAR_EN,
- enable);
- else
+ } else if (BCMCPU_IS_6368()) {
+ if (enable) {
+ clk_enable_unlocked(&clk_swpkt_sar);
+ clk_enable_unlocked(&clk_swpkt_usb);
+ } else {
+ clk_disable_unlocked(&clk_swpkt_usb);
+ clk_disable_unlocked(&clk_swpkt_sar);
+ }
+ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
+ } else {
return;
+ }
if (enable) {
/* reset switch core afer clock change */
@@ -260,8 +295,12 @@ static void xtm_set(struct clk *clk, int
if (!BCMCPU_IS_6368())
return;
- bcm_hwclock_set(CKCTL_6368_SAR_EN |
- CKCTL_6368_SWPKT_SAR_EN, enable);
+ if (enable)
+ clk_enable_unlocked(&clk_swpkt_sar);
+ else
+ clk_disable_unlocked(&clk_swpkt_sar);
+
+ bcm_hwclock_set(CKCTL_6368_SAR_EN, enable);
if (enable) {
/* reset sar core afer clock change */
@@ -444,6 +483,8 @@ static struct clk_lookup bcm6358_clks[]
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
CLKDEV_INIT(NULL, "spi", &clk_spi),
CLKDEV_INIT(NULL, "pcm", &clk_pcm),
+ CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
+ CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
};

View file

@ -14,7 +14,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in @@ -213,6 +213,11 @@ static void usbh_set(struct clk *clk, in
bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
else if (BCMCPU_IS_6368()) else if (BCMCPU_IS_6368())
bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);

View file

@ -17,7 +17,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in @@ -235,6 +235,11 @@ static void usbd_set(struct clk *clk, in
bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
else if (BCMCPU_IS_6368()) else if (BCMCPU_IS_6368())
bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);

View file

@ -36,7 +36,7 @@ Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -345,6 +345,9 @@ EXPORT_SYMBOL(clk_disable); @@ -389,6 +389,9 @@ EXPORT_SYMBOL(clk_disable);
unsigned long clk_get_rate(struct clk *clk) unsigned long clk_get_rate(struct clk *clk)
{ {

View file

@ -46,16 +46,16 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
val = bcm_mpi_readl(MPI_CSBASE_REG(0)); val = bcm_mpi_readl(MPI_CSBASE_REG(0));
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -133,6 +133,8 @@ static void enetsw_set(struct clk *clk, @@ -168,6 +168,8 @@ static void enetsw_set(struct clk *clk,
CKCTL_6368_SWPKT_USB_EN | clk_disable_unlocked(&clk_swpkt_sar);
CKCTL_6368_SWPKT_SAR_EN, }
enable); bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
+ else if (BCMCPU_IS_63268()) + } else if (BCMCPU_IS_63268()) {
+ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable); + bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
else } else {
return; return;
}
@@ -177,6 +179,8 @@ static void usbh_set(struct clk *clk, in @@ -213,6 +215,8 @@ static void usbh_set(struct clk *clk, in
bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
else if (BCMCPU_IS_6368()) else if (BCMCPU_IS_6368())
bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
@ -64,7 +64,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
else else
return; return;
@@ -199,6 +203,8 @@ static void usbd_set(struct clk *clk, in @@ -235,6 +239,8 @@ static void usbd_set(struct clk *clk, in
bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
else if (BCMCPU_IS_6368()) else if (BCMCPU_IS_6368())
bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
@ -73,7 +73,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
else else
return; return;
@@ -225,9 +231,13 @@ static void spi_set(struct clk *clk, int @@ -261,9 +267,13 @@ static void spi_set(struct clk *clk, int
mask = CKCTL_6358_SPI_EN; mask = CKCTL_6358_SPI_EN;
else if (BCMCPU_IS_6362()) else if (BCMCPU_IS_6362())
mask = CKCTL_6362_SPI_EN; mask = CKCTL_6362_SPI_EN;
@ -89,7 +89,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
bcm_hwclock_set(mask, enable); bcm_hwclock_set(mask, enable);
} }
@@ -246,6 +256,8 @@ static void hsspi_set(struct clk *clk, i @@ -282,6 +292,8 @@ static void hsspi_set(struct clk *clk, i
mask = CKCTL_6328_HSSPI_EN; mask = CKCTL_6328_HSSPI_EN;
else if (BCMCPU_IS_6362()) else if (BCMCPU_IS_6362())
mask = CKCTL_6362_HSSPI_EN; mask = CKCTL_6362_HSSPI_EN;
@ -98,7 +98,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
else else
return; return;
@@ -307,6 +319,8 @@ static void pcie_set(struct clk *clk, in @@ -351,6 +363,8 @@ static void pcie_set(struct clk *clk, in
bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable); bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
else if (BCMCPU_IS_6362()) else if (BCMCPU_IS_6362())
bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable); bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
@ -107,28 +107,39 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
} }
static struct clk clk_pcie = { static struct clk clk_pcie = {
@@ -389,9 +403,11 @@ struct clk *clk_get(struct device *dev, @@ -532,6 +546,21 @@ static struct clk_lookup bcm6368_clks[]
return &clk_periph; CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm")) };
return &clk_pcm;
- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec")) +static struct clk_lookup bcm63268_clks[] = {
+ if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) && + /* fixed rate clocks */
+ !strcmp(id, "ipsec")) + CLKDEV_INIT(NULL, "periph", &clk_periph),
return &clk_ipsec; + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie")) + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) && + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ !strcmp(id, "pcie")) + /* gated clocks */
return &clk_pcie; + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
return ERR_PTR(-ENOENT); + CLKDEV_INIT(NULL, "usbh", &clk_usbh),
} + CLKDEV_INIT(NULL, "usbd", &clk_usbd),
@@ -414,6 +430,7 @@ static int __init bcm63xx_clk_init(void) + CLKDEV_INIT(NULL, "spi", &clk_spi),
clk_hsspi.rate = HSSPI_PLL_HZ_6328; + CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
+};
+
#define HSSPI_PLL_HZ_6328 133333333
#define HSSPI_PLL_HZ_6362 400000000
@@ -564,6 +593,10 @@ static int __init bcm63xx_clk_init(void)
case BCM6368_CPU_ID:
clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
break; break;
case BCM6362_CPU_ID:
+ case BCM63268_CPU_ID: + case BCM63268_CPU_ID:
clk_hsspi.rate = HSSPI_PLL_HZ_6362; + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
break; + clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks));
+ break;
} }
return 0;
--- a/arch/mips/bcm63xx/cpu.c --- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c
@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = { @@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {

View file

@ -46,7 +46,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
val = bcm_mpi_readl(MPI_CSBASE_REG(0)); val = bcm_mpi_readl(MPI_CSBASE_REG(0));
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -252,7 +252,9 @@ static void hsspi_set(struct clk *clk, i @@ -288,7 +288,9 @@ static void hsspi_set(struct clk *clk, i
{ {
u32 mask; u32 mask;
@ -57,23 +57,45 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
mask = CKCTL_6328_HSSPI_EN; mask = CKCTL_6328_HSSPI_EN;
else if (BCMCPU_IS_6362()) else if (BCMCPU_IS_6362())
mask = CKCTL_6362_HSSPI_EN; mask = CKCTL_6362_HSSPI_EN;
@@ -420,12 +422,16 @@ void clk_put(struct clk *clk) @@ -440,6 +442,19 @@ static struct clk_lookup bcm3368_clks[]
CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
};
EXPORT_SYMBOL(clk_put); +static struct clk_lookup bcm6318_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbh),
+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
+};
+
static struct clk_lookup bcm6328_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
@@ -561,6 +576,7 @@ static struct clk_lookup bcm63268_clks[]
CLKDEV_INIT(NULL, "pcie", &clk_pcie),
};
+#define HSSPI_PLL_HZ_6318 250000000 +#define HSSPI_PLL_HZ_6318 250000000
#define HSSPI_PLL_HZ_6328 133333333 #define HSSPI_PLL_HZ_6328 133333333
#define HSSPI_PLL_HZ_6362 400000000 #define HSSPI_PLL_HZ_6362 400000000
static int __init bcm63xx_clk_init(void) @@ -570,6 +586,10 @@ static int __init bcm63xx_clk_init(void)
{ case BCM3368_CPU_ID:
switch (bcm63xx_get_cpu_id()) { clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
break;
+ case BCM6318_CPU_ID: + case BCM6318_CPU_ID:
+ clk_hsspi.rate = HSSPI_PLL_HZ_6318; + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318;
+ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks));
+ break; + break;
case BCM6328_CPU_ID: case BCM6328_CPU_ID:
clk_hsspi.rate = HSSPI_PLL_HZ_6328; clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
break; clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
--- a/arch/mips/bcm63xx/cpu.c --- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c
@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = { @@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {

View file

@ -13,7 +13,7 @@ Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -50,6 +50,18 @@ static void bcm_hwclock_set(u32 mask, in @@ -51,6 +51,18 @@ static void bcm_hwclock_set(u32 mask, in
bcm_perf_writel(reg, PERF_CKCTL_REG); bcm_perf_writel(reg, PERF_CKCTL_REG);
} }
@ -32,7 +32,7 @@ Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
/* /*
* Ethernet MAC "misc" clock: dma clocks and main clock on 6348 * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
*/ */
@@ -317,12 +329,17 @@ static struct clk clk_ipsec = { @@ -361,12 +373,17 @@ static struct clk clk_ipsec = {
static void pcie_set(struct clk *clk, int enable) static void pcie_set(struct clk *clk, int enable)
{ {
@ -53,15 +53,6 @@ Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
} }
static struct clk clk_pcie = { static struct clk clk_pcie = {
@@ -408,7 +425,7 @@ struct clk *clk_get(struct device *dev,
if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) &&
!strcmp(id, "ipsec"))
return &clk_ipsec;
- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
+ if ((BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
!strcmp(id, "pcie"))
return &clk_pcie;
return ERR_PTR(-ENOENT);
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
@@ -40,6 +40,12 @@ @@ -40,6 +40,12 @@

View file

@ -1,19 +1,19 @@
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -136,7 +136,11 @@ static struct clk clk_ephy = { @@ -167,7 +167,11 @@ static struct clk clk_swpkt_usb = {
*/ */
static void enetsw_set(struct clk *clk, int enable) static void enetsw_set(struct clk *clk, int enable)
{ {
- if (BCMCPU_IS_6328()) - if (BCMCPU_IS_6328()) {
+ if (BCMCPU_IS_6318()) { + if (BCMCPU_IS_6318()) {
+ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN | + bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
+ CKCTL_6318_ROBOSW025_EN, enable); + CKCTL_6318_ROBOSW025_EN, enable);
+ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable); + bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
+ } else if (BCMCPU_IS_6328()) + } else if (BCMCPU_IS_6328()) {
bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
else if (BCMCPU_IS_6362()) } else if (BCMCPU_IS_6362()) {
bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
@@ -183,18 +187,22 @@ static struct clk clk_pcm = { @@ -219,18 +223,22 @@ static struct clk clk_pcm = {
*/ */
static void usbh_set(struct clk *clk, int enable) static void usbh_set(struct clk *clk, int enable)
{ {
@ -42,15 +42,3 @@
if (enable) if (enable)
msleep(100); msleep(100);
@@ -408,9 +416,9 @@ struct clk *clk_get(struct device *dev,
return &clk_enetsw;
if (!strcmp(id, "ephy"))
return &clk_ephy;
- if (!strcmp(id, "usbh"))
+ if (!strcmp(id, "usbh") || (BCMCPU_IS_6318() && !strcmp(id, "usbd")))
return &clk_usbh;
- if (!strcmp(id, "usbd"))
+ if (!strcmp(id, "usbd") && !BCMCPU_IS_6318())
return &clk_usbd;
if (!strcmp(id, "spi"))
return &clk_spi;

View file

@ -24,7 +24,7 @@
#define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
--- a/arch/mips/bcm63xx/clk.c --- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c
@@ -62,6 +62,26 @@ static void bcm_ub_hwclock_set(u32 mask, @@ -63,6 +63,26 @@ static void bcm_ub_hwclock_set(u32 mask,
bcm_perf_writel(reg, PERF_UB_CKCTL_REG); bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
} }
@ -51,7 +51,7 @@
/* /*
* Ethernet MAC "misc" clock: dma clocks and main clock on 6348 * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
*/ */
@@ -199,7 +219,17 @@ static void usbh_set(struct clk *clk, in @@ -235,7 +255,17 @@ static void usbh_set(struct clk *clk, in
} else if (BCMCPU_IS_6368()) { } else if (BCMCPU_IS_6368()) {
bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
} else if (BCMCPU_IS_63268()) { } else if (BCMCPU_IS_63268()) {

View file

@ -0,0 +1,105 @@
From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Mon, 31 Jul 2017 20:10:36 +0200
Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
---
arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -485,6 +485,8 @@ static struct clk_lookup bcm3368_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -501,7 +503,9 @@ static struct clk_lookup bcm6318_clks[]
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -515,7 +519,10 @@ static struct clk_lookup bcm6328_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -528,6 +535,7 @@ static struct clk_lookup bcm6338_clks[]
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -542,6 +550,7 @@ static struct clk_lookup bcm6345_clks[]
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -556,6 +565,7 @@ static struct clk_lookup bcm6348_clks[]
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -572,6 +582,8 @@ static struct clk_lookup bcm6358_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -591,7 +603,10 @@ static struct clk_lookup bcm6362_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -607,6 +622,8 @@ static struct clk_lookup bcm6368_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -621,7 +638,10 @@ static struct clk_lookup bcm63268_clks[]
CLKDEV_INIT(NULL, "periph", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),