mac80211: Improve ath5k/ar71xx PCI bug WAR

It has been confirmed by Atheros that this PCI bug affects the RX side only,
so we can keep the 128B DMA size for TX.

With this change we can double the thruput of ath5k from 15Mps to 30Mbps.

We have been using this patch since more than 6 month in a production
environment without problems and a significant performance improvement.

It has also been said to fix HW encryption:
http://www.mail-archive.com/ath5k-devel@lists.ath5k.org/msg04311.html

Patch from: kentarou matsuyama <matsuyama@thinktube.com>

SVN-Revision: 25104
This commit is contained in:
Felix Fietkau 2011-01-26 11:33:50 +00:00
parent 5571acdbd0
commit 5903f4a167

View file

@ -9,7 +9,7 @@
{ AR5K_RXCFG, AR5K_DMASIZE_128B }, { AR5K_RXCFG, AR5K_DMASIZE_128B },
+#else +#else
+ /* WAR for AR71xx PCI bug */ + /* WAR for AR71xx PCI bug */
+ { AR5K_TXCFG, AR5K_DMASIZE_4B }, + { AR5K_TXCFG, AR5K_DMASIZE_128B },
+ { AR5K_RXCFG, AR5K_DMASIZE_4B }, + { AR5K_RXCFG, AR5K_DMASIZE_4B },
+#endif +#endif
{ AR5K_CFG, AR5K_INIT_CFG }, { AR5K_CFG, AR5K_INIT_CFG },
@ -29,7 +29,7 @@
+#else +#else
+ /* WAR for AR71xx PCI bug */ + /* WAR for AR71xx PCI bug */
+ AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, + AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
+ AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_4B); + AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
+ AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, + AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
+ AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B); + AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
+#endif +#endif