imx21: R.I.P.
It is broken since ~22 months and nobody takes care of that. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35487
This commit is contained in:
parent
e7dee4ea87
commit
539e0b5b84
8 changed files with 0 additions and 626 deletions
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@ -1,24 +0,0 @@
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#
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# Copyright (C) 2006-2011 OpenWrt.org
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#
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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include $(TOPDIR)/rules.mk
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ARCH:=arm
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BOARD:=imx21
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BOARDNAME:=Freescale i.MX21
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FEATURES:=jffs2 broken
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CFLAGS:=-Os -pipe -march=armv5te -mtune=arm926ej-s -fno-caller-saves
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LINUX_VERSION:=2.6.37.6
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DEVICE_TYPE=phone
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define Target/Description
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endef
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include $(INCLUDE_DIR)/target.mk
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$(eval $(call BuildTarget))
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@ -1,132 +0,0 @@
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CONFIG_ALIGNMENT_TRAP=y
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# CONFIG_ARCH_MX1 is not set
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CONFIG_ARCH_MX2=y
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# CONFIG_ARCH_MX25 is not set
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# CONFIG_ARCH_MX3 is not set
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# CONFIG_ARCH_MX5 is not set
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CONFIG_ARCH_MXC=y
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# CONFIG_ARCH_MXC91231 is not set
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CONFIG_ARCH_MXC_AUDMUX_V1=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
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# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARM=y
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CONFIG_ARM_L1_CACHE_SHIFT=5
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CONFIG_ARM_THUMB=y
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CONFIG_BITREVERSE=y
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# CONFIG_BLK_DEV is not set
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# CONFIG_BLK_DEV_INITRD is not set
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CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
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CONFIG_COMMON_CLKDEV=y
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CONFIG_COMPAT_BRK=y
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CONFIG_CPU_32v5=y
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CONFIG_CPU_ABRT_EV5TJ=y
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CONFIG_CPU_ARM926T=y
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# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
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CONFIG_CPU_CACHE_VIVT=y
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CONFIG_CPU_COPY_V4WB=y
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CONFIG_CPU_CP15=y
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CONFIG_CPU_CP15_MMU=y
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# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
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# CONFIG_CPU_ICACHE_DISABLE is not set
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CONFIG_CPU_PABRT_LEGACY=y
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CONFIG_CPU_TLB_V4WBI=y
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CONFIG_DEBUG_BUGVERBOSE=y
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# CONFIG_DEBUG_USER is not set
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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# CONFIG_FPE_FASTFPE is not set
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# CONFIG_FPE_NWFPE is not set
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CONFIG_FRAME_POINTER=y
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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CONFIG_GPIOLIB=y
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# CONFIG_GPIO_IT8761E is not set
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CONFIG_GPIO_SYSFS=y
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_AOUT=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_CLK=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_KERNEL_GZIP=y
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CONFIG_HAVE_KERNEL_LZMA=y
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CONFIG_HAVE_KERNEL_LZO=y
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CONFIG_HAVE_KPROBES=y
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CONFIG_HAVE_KRETPROBES=y
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CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_PROC_CPU=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_IMX_HAVE_IOMUX_V1=y
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CONFIG_INPUT=y
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CONFIG_INPUT_EVDEV=y
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CONFIG_INPUT_KEYBOARD=y
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# CONFIG_INPUT_MISC is not set
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# CONFIG_ISDN_CAPI is not set
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# CONFIG_ISDN_DRV_GIGASET is not set
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# CONFIG_ISDN_I4L is not set
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CONFIG_KEYBOARD_ATKBD=y
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CONFIG_KEYBOARD_GPIO=y
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CONFIG_KEYBOARD_IMX=y
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# CONFIG_KEYBOARD_LKKBD is not set
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# CONFIG_KEYBOARD_MATRIX is not set
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# CONFIG_KEYBOARD_NEWTON is not set
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# CONFIG_KEYBOARD_STOWAWAY is not set
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# CONFIG_KEYBOARD_SUNKBD is not set
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# CONFIG_KEYBOARD_XTKBD is not set
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CONFIG_LEDS_GPIO=y
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# CONFIG_LEDS_TRIGGER_NETDEV is not set
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# CONFIG_LKDTM is not set
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CONFIG_MACH_MX21=y
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# CONFIG_MACH_MX21ADS is not set
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# CONFIG_MACH_MX27 is not set
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CONFIG_MACH_VP6500=y
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# CONFIG_MFD_T7L66XB is not set
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# CONFIG_MTD_CFI_INTELEXT is not set
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_PHYSMAP=y
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# CONFIG_MXC_DEBUG_BOARD is not set
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# CONFIG_MXC_IRQ_PRIOR is not set
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# CONFIG_MXC_PWM is not set
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CONFIG_NEED_DMA_MAP_STATE=y
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# CONFIG_NETDEV_1000 is not set
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# CONFIG_NET_ETHERNET is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xC0000000
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# CONFIG_PCI_SYSCALL is not set
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_RATIONAL=y
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# CONFIG_SCSI_DMA is not set
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CONFIG_SCSI_MOD=y
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# CONFIG_SERIAL_8250 is not set
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CONFIG_SERIAL_IMX=y
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CONFIG_SERIAL_IMX_CONSOLE=y
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CONFIG_SERIO=y
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# CONFIG_SERIO_ALTERA_PS2 is not set
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CONFIG_SERIO_LIBPS2=y
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CONFIG_SERIO_SERPORT=y
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CONFIG_SPLIT_PTLOCK_CPUS=999999
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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# CONFIG_TREE_PREEMPT_RCU is not set
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# CONFIG_UID16 is not set
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CONFIG_VECTORS_BASE=0xffff0000
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# CONFIG_VFP is not set
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# CONFIG_WATCHDOG is not set
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CONFIG_XZ_DEC_ARM=y
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CONFIG_XZ_DEC_BCJ=y
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CONFIG_ZBOOT_ROM_BSS=0x0
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CONFIG_ZBOOT_ROM_TEXT=0x0
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CONFIG_ZONE_DMA_FLAG=0
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/physmap.h>
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#include <linux/gpio.h>
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#include <linux/leds.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <mach/imx-uart.h>
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#include <mach/imxfb.h>
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#include <mach/iomux-mx21.h>
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#include <mach/board-vp6500.h>
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#include "devices.h"
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#include <linux/input.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/gpio_keys.h>
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#include <linux/pwm_backlight.h>
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static unsigned int vp6500_pins[] = {
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/* UART1 */
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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#if 0
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/* LCDC */
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PA5_PF_LSCLK,
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PA6_PF_LD0,
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PA7_PF_LD1,
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PA8_PF_LD2,
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PA9_PF_LD3,
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PA10_PF_LD4,
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PA11_PF_LD5,
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PA12_PF_LD6,
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PA13_PF_LD7,
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PA14_PF_LD8,
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PA15_PF_LD9,
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PA16_PF_LD10,
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PA17_PF_LD11,
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PA18_PF_LD12,
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PA19_PF_LD13,
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PA20_PF_LD14,
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PA21_PF_LD15,
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PA22_PF_LD16,
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PA28_PF_HSYNC,
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PA29_PF_VSYNC,
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PA30_PF_CONTRAST,
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PA31_PF_OE_ACD,
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#endif
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/* LCD Backlight */
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PE5_PF_PWMO,
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VP6500_GPIO_BACKLIGHT_EN | GPIO_GPIO | GPIO_OUT,
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};
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/* Flash */
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static struct physmap_flash_data vp6500_flash_data = {
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.width = 2,
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};
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static struct resource vp6500_flash_resource = {
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.start = MX21_CS0_BASE_ADDR,
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.end = MX21_CS0_BASE_ADDR + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device vp6500_nor_mtd_device = {
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.name = "physmap-flash",
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.id = -1,
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.dev = {
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.platform_data = &vp6500_flash_data,
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},
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.num_resources = 1,
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.resource = &vp6500_flash_resource,
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};
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/* LEDs */
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static struct gpio_led vp6500_leds[] = {
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{
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.name = "vp6500:orange:keypad",
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.gpio = VP6500_GPIO_LED_KEYPAD,
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},
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{
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.name = "vp6500:green:",
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.gpio = VP6500_GPIO_LED_GREEN,
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.active_low = 1,
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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},
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{
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.name = "vp6500:red:",
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.gpio = VP6500_GPIO_LED_RED,
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},
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{
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.name = "vp6500:red:camera",
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.gpio = VP6500_GPIO_LED_CAMERA,
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},
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};
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static struct gpio_led_platform_data vp6500_leds_data = {
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.leds = vp6500_leds,
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.num_leds = ARRAY_SIZE(vp6500_leds),
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};
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static struct platform_device vp6500_leds_device = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &vp6500_leds_data,
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},
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};
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/* Keypad */
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static const uint32_t vp6500_keypad_keys[] = {
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KEY(0, 3, KEY_F2),
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KEY(0, 4, KEY_RIGHT),
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KEY(1, 0, KEY_ZOOM),
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KEY(1, 1, KEY_NUMERIC_POUND),
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KEY(1, 2, KEY_0),
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KEY(1, 3, KEY_ENTER),
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KEY(1, 4, KEY_8),
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KEY(2, 0, KEY_5),
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KEY(2, 1, KEY_2),
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KEY(2, 2, KEY_DOWN),
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KEY(2, 3, KEY_OK),
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KEY(2, 4, KEY_UP),
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KEY(3, 0, KEY_CAMERA),
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KEY(3, 1, KEY_NUMERIC_STAR),
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KEY(3, 2, KEY_9),
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KEY(3, 3, KEY_LEFT),
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KEY(3, 4, KEY_6),
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KEY(4, 0, KEY_7),
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KEY(4, 1, KEY_4),
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KEY(4, 2, KEY_1),
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KEY(4, 3, KEY_3),
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KEY(4, 4, KEY_F1),
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};
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static struct matrix_keymap_data vp6500_keypad_data = {
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.keymap = vp6500_keypad_keys,
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.keymap_size = ARRAY_SIZE(vp6500_keypad_keys),
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};
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static struct resource vp6500_keypad_resources[] = {
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{
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.start = MX21_KPP_BASE_ADDR,
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.end = MX21_KPP_BASE_ADDR + 0x10 - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX21_INT_KPP,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device vp6500_keypad_device = {
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.name = "imx-keypad",
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.id = 0,
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.dev = {
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.platform_data = &vp6500_keypad_data,
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},
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.resource = vp6500_keypad_resources,
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.num_resources = ARRAY_SIZE(vp6500_keypad_resources),
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};
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static struct gpio_keys_button vp6500_keys = {
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.gpio = VP6500_GPIO_POWER_KEY,
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.code = KEY_POWER,
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.desc = "Power button",
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.active_low = 1,
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};
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static struct gpio_keys_platform_data vp6500_key_data = {
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.buttons = &vp6500_keys,
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.nbuttons = 1,
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};
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static struct platform_device vp6500_key_device = {
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.name = "gpio-keys",
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.id = -1,
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.dev = {
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.platform_data = &vp6500_key_data,
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},
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};
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/* LCD backlight */
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static int vp6500_backlight_notify(struct device *dev, int brightness)
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{
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gpio_set_value(VP6500_GPIO_BACKLIGHT_EN, !!brightness);
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return brightness;
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}
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static struct platform_pwm_backlight_data vp6500_backlight_data = {
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.max_brightness = 255,
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.dft_brightness = 100,
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.pwm_period_ns = 15000000,
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.notify = vp6500_backlight_notify,
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};
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static struct platform_device vp6500_backlight_device = {
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.name = "pwm-backlight",
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.id = -1,
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.dev = {
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.parent = &mxc_pwm_device.dev,
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.platform_data = &vp6500_backlight_data,
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},
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};
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static struct platform_device *platform_devices[] __initdata = {
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&vp6500_nor_mtd_device,
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&vp6500_leds_device,
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&vp6500_keypad_device,
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&vp6500_key_device,
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&vp6500_backlight_device,
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};
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static void __init vp6500_board_init(void)
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{
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mxc_gpio_setup_multiple_pins(vp6500_pins, ARRAY_SIZE(vp6500_pins),
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"vp6500");
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mxc_register_device(&mxc_uart_device0, NULL);
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mxc_register_device(&mxc_pwm_device, NULL);
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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}
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static void __init vp6500_timer_init(void)
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{
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mx21_clocks_init(32768, 26000000);
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}
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static struct sys_timer vp6500_timer = {
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.init = vp6500_timer_init,
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};
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MACHINE_START(VP6500, "Phillips VP6500")
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.phys_io = MX21_AIPI_BASE_ADDR,
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.io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
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.boot_params = MX21_PHYS_OFFSET + 0x100,
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.map_io = mx21_map_io,
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.init_irq = mx21_init_irq,
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.init_machine = vp6500_board_init,
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.timer = &vp6500_timer,
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MACHINE_END
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@ -1,17 +0,0 @@
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#ifndef __BOARD_VP6500__
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#define __BOARD_VP6500__
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#define VP6500_GPIO_POWER_KEY GPIO_PORTB | 5
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#define VP6500_GPIO_CAMERA_DIRECTION GPIO_PORTB | 13
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#define VP6500_GPIO_LED_KEYPAD GPIO_PORTC | 18
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#define VP6500_GPIO_AMP_ENABLE GPIO_PORTC | 25
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#define VP6500_GPIO_LED_RED GPIO_PORTC | 27
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#define VP6500_GPIO_LED_GREEN GPIO_PORTC | 28
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#define VP6500_GPIO_LED_CAMERA GPIO_PORTC | 29
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#define VP6500_GPIO_BACKLIGHT_EN GPIO_PORTE | 10
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#define VP6500_GPIO_TLV_RESET GPIO_PORTB | 27
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#define VP6500_GPIO_TLV_ENABLE GPIO_PORTC | 25
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#endif
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@ -1,28 +0,0 @@
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#
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# Copyright (C) 2010 OpenWrt.org
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#
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||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
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#
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include $(TOPDIR)/rules.mk
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include $(INCLUDE_DIR)/image.mk
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|
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JFFS2_BLOCKSIZE=128k 16k
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#JFFS2OPTS += -n -s 2048
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JFFS2OPTS += -n
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define Image/BuildKernel
|
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mkdir -p $(BIN_DIR)
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cp $(KDIR)/vmlinuz $(BIN_DIR)/$(IMG_PREFIX)-zImage
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||||
endef
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|
||||
define Image/Prepare
|
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cp $(LINUX_DIR)/arch/arm/boot/zImage $(KDIR)/vmlinuz
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||||
endef
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||||
|
||||
|
||||
define Image/Build/squashfs
|
||||
$(call prepare_generic_squashfs,$(BIN_DIR)/$(IMG_PREFIX)-root.$(1))
|
||||
endef
|
||||
|
||||
$(eval $(call BuildImage))
|
|
@ -1,22 +0,0 @@
|
|||
--- a/arch/arm/mach-imx/Kconfig
|
||||
+++ b/arch/arm/mach-imx/Kconfig
|
||||
@@ -83,6 +83,12 @@ if MACH_MX27
|
||||
|
||||
comment "MX27 platforms:"
|
||||
|
||||
+config MACH_VP6500
|
||||
+ bool "Phillips VP6500 VoIP phone"
|
||||
+ depends on MACH_MX21
|
||||
+ help
|
||||
+ Include support for the Phillips VP6500 VoIP phone.
|
||||
+
|
||||
config MACH_MX27ADS
|
||||
bool "MX27ADS platform"
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
--- a/arch/arm/mach-imx/Makefile
|
||||
+++ b/arch/arm/mach-imx/Makefile
|
||||
@@ -32,3 +32,4 @@ obj-$(CONFIG_MACH_CPUIMX27) += mach-cpui
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
|
||||
obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
|
||||
obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
|
||||
+obj-$(CONFIG_MACH_VP6500) += mach-vp6500.o
|
|
@ -1,11 +0,0 @@
|
|||
--- a/arch/arm/tools/mach-types
|
||||
+++ b/arch/arm/tools/mach-types
|
||||
@@ -530,7 +530,7 @@ sg560 MACH_SG560 SG560 513
|
||||
dp1000 MACH_DP1000 DP1000 514
|
||||
omap_osk MACH_OMAP_OSK OMAP_OSK 515
|
||||
rg100v3 MACH_RG100V3 RG100V3 516
|
||||
-mx2ads MACH_MX2ADS MX2ADS 517
|
||||
+vp6500 MACH_VP6500 VP6500 517
|
||||
pxa_kilo MACH_PXA_KILO PXA_KILO 518
|
||||
ixp4xx_eagle MACH_IXP4XX_EAGLE IXP4XX_EAGLE 519
|
||||
tosa MACH_TOSA TOSA 520
|
|
@ -1,137 +0,0 @@
|
|||
--- a/arch/arm/plat-mxc/pwm.c
|
||||
+++ b/arch/arm/plat-mxc/pwm.c
|
||||
@@ -25,6 +25,11 @@
|
||||
#define MX1_PWMS 0x04 /* PWM Sample Register */
|
||||
#define MX1_PWMP 0x08 /* PWM Period Register */
|
||||
|
||||
+#define MX1_PWMC_EN (1 << 4)
|
||||
+#define MX1_PWMC_PRESCALER_MASK (0x7f << 8)
|
||||
+#define MX1_PWMC_PRESCALER(x) ((x & 0x7f) << 8)
|
||||
+#define MX1_PWMC_CLKSEL_MASK 0x3
|
||||
+#define MX1_PWMC_CLKSEL(x) ((x & 0x3))
|
||||
|
||||
/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
|
||||
|
||||
@@ -54,26 +59,33 @@ struct pwm_device {
|
||||
|
||||
int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
|
||||
{
|
||||
+ unsigned long long c;
|
||||
+ unsigned long period_cycles, duty_cycles, prescale;
|
||||
+
|
||||
if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
|
||||
return -EINVAL;
|
||||
|
||||
+ c = clk_get_rate(pwm->clk);
|
||||
+
|
||||
+ c = c * period_ns;
|
||||
+
|
||||
+ if (cpu_is_mx1() || cpu_is_mx2())
|
||||
+ c >>= 1;
|
||||
+
|
||||
+ do_div(c, 1000000000);
|
||||
+ period_cycles = c;
|
||||
+
|
||||
+ prescale = period_cycles / 0x10000 + 1;
|
||||
+
|
||||
+ period_cycles /= prescale;
|
||||
+ c = (unsigned long long)period_cycles * duty_ns;
|
||||
+ do_div(c, period_ns);
|
||||
+ duty_cycles = c;
|
||||
+
|
||||
+
|
||||
if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) {
|
||||
- unsigned long long c;
|
||||
- unsigned long period_cycles, duty_cycles, prescale;
|
||||
u32 cr;
|
||||
|
||||
- c = clk_get_rate(pwm->clk);
|
||||
- c = c * period_ns;
|
||||
- do_div(c, 1000000000);
|
||||
- period_cycles = c;
|
||||
-
|
||||
- prescale = period_cycles / 0x10000 + 1;
|
||||
-
|
||||
- period_cycles /= prescale;
|
||||
- c = (unsigned long long)period_cycles * duty_ns;
|
||||
- do_div(c, period_ns);
|
||||
- duty_cycles = c;
|
||||
-
|
||||
writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
|
||||
writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
|
||||
|
||||
@@ -86,25 +98,28 @@ int pwm_config(struct pwm_device *pwm, i
|
||||
|
||||
writel(cr, pwm->mmio_base + MX3_PWMCR);
|
||||
} else if (cpu_is_mx1() || cpu_is_mx21()) {
|
||||
- /* The PWM subsystem allows for exact frequencies. However,
|
||||
- * I cannot connect a scope on my device to the PWM line and
|
||||
- * thus cannot provide the program the PWM controller
|
||||
- * exactly. Instead, I'm relying on the fact that the
|
||||
- * Bootloader (u-boot or WinCE+haret) has programmed the PWM
|
||||
- * function group already. So I'll just modify the PWM sample
|
||||
- * register to follow the ratio of duty_ns vs. period_ns
|
||||
- * accordingly.
|
||||
- *
|
||||
- * This is good enough for programming the brightness of
|
||||
- * the LCD backlight.
|
||||
- *
|
||||
- * The real implementation would divide PERCLK[0] first by
|
||||
- * both the prescaler (/1 .. /128) and then by CLKSEL
|
||||
- * (/2 .. /16).
|
||||
- */
|
||||
- u32 max = readl(pwm->mmio_base + MX1_PWMP);
|
||||
- u32 p = max * duty_ns / period_ns;
|
||||
- writel(max - p, pwm->mmio_base + MX1_PWMS);
|
||||
+ unsigned long clksel = 0;
|
||||
+ u32 ctrl;
|
||||
+
|
||||
+ while (prescale >= 0x80 && clksel < 4) {
|
||||
+ prescale >>= 1;
|
||||
+ ++clksel;
|
||||
+ }
|
||||
+
|
||||
+ if (clksel > 3)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ ctrl = readl(pwm->mmio_base + MX1_PWMC);
|
||||
+ writel(ctrl & ~MX1_PWMC_EN, pwm->mmio_base + MX1_PWMC);
|
||||
+
|
||||
+ writel(duty_cycles, pwm->mmio_base + MX1_PWMS);
|
||||
+ writel(period_cycles, pwm->mmio_base + MX1_PWMP);
|
||||
+
|
||||
+ ctrl &= ~(MX1_PWMC_PRESCALER_MASK | MX1_PWMC_CLKSEL_MASK);
|
||||
+ ctrl |= MX1_PWMC_PRESCALER(prescale);
|
||||
+ ctrl |= MX1_PWMC_CLKSEL(clksel);
|
||||
+ writel(ctrl, pwm->mmio_base + MX1_PWMC);
|
||||
+
|
||||
} else {
|
||||
BUG();
|
||||
}
|
||||
@@ -116,6 +131,11 @@ EXPORT_SYMBOL(pwm_config);
|
||||
int pwm_enable(struct pwm_device *pwm)
|
||||
{
|
||||
int rc = 0;
|
||||
+ if (cpu_is_mx1() || cpu_is_mx2()) {
|
||||
+ u32 ctrl;
|
||||
+ ctrl = readl(pwm->mmio_base + MX1_PWMC);
|
||||
+ writel(ctrl | MX1_PWMC_EN, pwm->mmio_base + MX1_PWMC);
|
||||
+ }
|
||||
|
||||
if (!pwm->clk_enabled) {
|
||||
rc = clk_enable(pwm->clk);
|
||||
@@ -128,7 +148,13 @@ EXPORT_SYMBOL(pwm_enable);
|
||||
|
||||
void pwm_disable(struct pwm_device *pwm)
|
||||
{
|
||||
- writel(0, pwm->mmio_base + MX3_PWMCR);
|
||||
+ if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) {
|
||||
+ writel(0, pwm->mmio_base + MX3_PWMCR);
|
||||
+ } else if (cpu_is_mx1() || cpu_is_mx2()) {
|
||||
+ u32 ctrl;
|
||||
+ ctrl = readl(pwm->mmio_base + MX1_PWMC);
|
||||
+ writel(ctrl & ~MX1_PWMC_EN, pwm->mmio_base + MX1_PWMC);
|
||||
+ }
|
||||
|
||||
if (pwm->clk_enabled) {
|
||||
clk_disable(pwm->clk);
|
Loading…
Reference in a new issue