use __raw_{readl,writel} routines in the uart driver as well
SVN-Revision: 11561
This commit is contained in:
Gabor Juhos
parent
3cc6f9bd75
commit
465a60a463
1 changed files with 132 additions and 47 deletions
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@ -14,78 +14,114 @@
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#define AMBA_ISR_PASS_LIMIT 256
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@@ -82,7 +81,7 @@
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@@ -82,9 +81,9 @@
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = readl(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr &= ~UART010_CR_TIE;
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writel(cr, uap->port.membase + UART010_CR);
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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@@ -92,7 +91,7 @@
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static void pl010_start_tx(struct uart_port *port)
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@@ -92,9 +91,9 @@
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = readl(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr |= UART010_CR_TIE;
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writel(cr, uap->port.membase + UART010_CR);
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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@@ -102,7 +101,7 @@
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static void pl010_stop_rx(struct uart_port *port)
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@@ -102,9 +101,9 @@
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = readl(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
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writel(cr, uap->port.membase + UART010_CR);
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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@@ -112,7 +111,7 @@
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static void pl010_enable_ms(struct uart_port *port)
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@@ -112,9 +111,9 @@
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = readl(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr |= UART010_CR_MSIE;
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writel(cr, uap->port.membase + UART010_CR);
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_rx_chars(struct uart_amba_port *uap)
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@@ -122,9 +121,9 @@
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struct tty_struct *tty = uap->port.info->tty;
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unsigned int status, ch, flag, rsr, max_count = 256;
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = readl(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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while (UART_RX_DATA(status) && max_count--) {
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- ch = readb(uap->port.membase + UART01x_DR);
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+ ch = readl(uap->port.membase + UART01x_DR);
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+ ch = __raw_readl(uap->port.membase + UART01x_DR);
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flag = TTY_NORMAL;
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uap->port.icount.rx++;
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@@ -133,7 +132,7 @@
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@@ -133,9 +132,9 @@
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* Note that the error handling code is
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* out of the main execution path
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*/
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- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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+ rsr = readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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if (unlikely(rsr & UART01x_RSR_ANY)) {
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writel(0, uap->port.membase + UART01x_ECR);
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- writel(0, uap->port.membase + UART01x_ECR);
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+ __raw_writel(0, uap->port.membase + UART01x_ECR);
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if (rsr & UART01x_RSR_BE) {
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rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
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@@ -165,7 +164,7 @@
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uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
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ignore_char:
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = readl(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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}
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spin_unlock(&uap->port.lock);
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tty_flip_buffer_push(tty);
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@@ -210,7 +209,7 @@
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@@ -178,7 +177,7 @@
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int count;
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writel(0, uap->port.membase + UART010_ICR);
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if (uap->port.x_char) {
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- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
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+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
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uap->port.icount.tx++;
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uap->port.x_char = 0;
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return;
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@@ -190,7 +189,7 @@
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count = uap->port.fifosize >> 1;
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do {
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- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
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+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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uap->port.icount.tx++;
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if (uart_circ_empty(xmit))
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@@ -208,9 +207,9 @@
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{
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unsigned int status, delta;
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- writel(0, uap->port.membase + UART010_ICR);
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+ __raw_writel(0, uap->port.membase + UART010_ICR);
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- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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+ status = readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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delta = status ^ uap->old_status;
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uap->old_status = status;
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@ -94,7 +130,7 @@
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spin_lock(&uap->port.lock);
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- status = readb(uap->port.membase + UART010_IIR);
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+ status = readl(uap->port.membase + UART010_IIR);
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+ status = __raw_readl(uap->port.membase + UART010_IIR);
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if (status) {
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do {
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if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
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@ -103,7 +139,7 @@
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break;
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- status = readb(uap->port.membase + UART010_IIR);
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+ status = readl(uap->port.membase + UART010_IIR);
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+ status = __raw_readl(uap->port.membase + UART010_IIR);
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} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
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UART010_IIR_TIS));
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handled = 1;
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@ -112,7 +148,7 @@
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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- unsigned int status = readb(uap->port.membase + UART01x_FR);
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+ unsigned int status = readl(uap->port.membase + UART01x_FR);
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+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
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return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
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}
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@ -121,34 +157,50 @@
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unsigned int status;
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = readl(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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if (status & UART01x_FR_DCD)
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result |= TIOCM_CAR;
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if (status & UART01x_FR_DSR)
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@@ -301,7 +300,7 @@
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@@ -301,12 +300,12 @@
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unsigned int lcr_h;
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spin_lock_irqsave(&uap->port.lock, flags);
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- lcr_h = readb(uap->port.membase + UART010_LCRH);
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+ lcr_h = readl(uap->port.membase + UART010_LCRH);
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+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
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if (break_state == -1)
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lcr_h |= UART01x_LCRH_BRK;
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else
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@@ -334,7 +333,7 @@
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lcr_h &= ~UART01x_LCRH_BRK;
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- writel(lcr_h, uap->port.membase + UART010_LCRH);
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+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
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spin_unlock_irqrestore(&uap->port.lock, flags);
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}
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@@ -334,12 +333,12 @@
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/*
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* initialise the old status of the modem signals
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*/
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- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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+ uap->old_status = readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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/*
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* Finally, enable interrupts
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@@ -365,7 +364,7 @@
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writel(0, uap->port.membase + UART010_CR);
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*/
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- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
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+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
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uap->port.membase + UART010_CR);
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return 0;
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@@ -362,10 +361,10 @@
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/*
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* disable all interrupts, disable the port
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*/
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- writel(0, uap->port.membase + UART010_CR);
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+ __raw_writel(0, uap->port.membase + UART010_CR);
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/* disable break condition and fifos */
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- writel(readb(uap->port.membase + UART010_LCRH) &
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+ writel(readl(uap->port.membase + UART010_LCRH) &
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+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
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~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
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uap->port.membase + UART010_LCRH);
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@ -161,15 +213,38 @@
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quot = uart_get_divisor(port, baud);
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switch (termios->c_cflag & CSIZE) {
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@@ -450,7 +449,7 @@
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@@ -450,25 +449,25 @@
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uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
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/* first, disable everything */
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- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
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+ old_cr = readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
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+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
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if (UART_ENABLE_MS(port, termios->c_cflag))
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old_cr |= UART010_CR_MSIE;
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- writel(0, uap->port.membase + UART010_CR);
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+ __raw_writel(0, uap->port.membase + UART010_CR);
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/* Set baud rate */
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quot -= 1;
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- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
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- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
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+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
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+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
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/*
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* ----------v----------v----------v----------v-----
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* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
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* ----------^----------^----------^----------^-----
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*/
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- writel(lcr_h, uap->port.membase + UART010_LCRH);
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- writel(old_cr, uap->port.membase + UART010_CR);
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+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
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+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
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spin_unlock_irqrestore(&uap->port.lock, flags);
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}
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@@ -540,7 +539,7 @@
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.verify_port = pl010_verify_port,
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};
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@ -179,42 +254,52 @@
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#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
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@@ -550,7 +549,7 @@
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@@ -550,10 +549,10 @@
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unsigned int status;
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do {
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = readl(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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barrier();
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} while (!UART_TX_READY(status));
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writel(ch, uap->port.membase + UART01x_DR);
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@@ -567,7 +566,7 @@
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- writel(ch, uap->port.membase + UART01x_DR);
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+ __raw_writel(ch, uap->port.membase + UART01x_DR);
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}
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static void
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@@ -567,8 +566,8 @@
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/*
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* First save the CR then disable the interrupts
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*/
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- old_cr = readb(uap->port.membase + UART010_CR);
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+ old_cr = readl(uap->port.membase + UART010_CR);
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writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
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- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
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+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
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+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
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uart_console_write(&uap->port, s, count, pl010_console_putchar);
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@@ -577,7 +576,7 @@
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@@ -577,10 +576,10 @@
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* and restore the TCR
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*/
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do {
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = readl(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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barrier();
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} while (status & UART01x_FR_BUSY);
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writel(old_cr, uap->port.membase + UART010_CR);
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- writel(old_cr, uap->port.membase + UART010_CR);
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+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
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clk_disable(uap->clk);
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}
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@@ -589,9 +588,9 @@
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pl010_console_get_options(struct uart_amba_port *uap, int *baud,
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int *parity, int *bits)
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{
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- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
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+ if (readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
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+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
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unsigned int lcr_h, quot;
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- lcr_h = readb(uap->port.membase + UART010_LCRH);
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+ lcr_h = readl(uap->port.membase + UART010_LCRH);
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+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
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*parity = 'n';
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if (lcr_h & UART01x_LCRH_PEN) {
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@ -224,8 +309,8 @@
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- quot = readb(uap->port.membase + UART010_LCRL) |
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- readb(uap->port.membase + UART010_LCRM) << 8;
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+ quot = readl(uap->port.membase + UART010_LCRL) |
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+ readl(uap->port.membase + UART010_LCRM) << 8;
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+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
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+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
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*baud = uap->port.uartclk / (16 * (quot + 1));
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}
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}
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