ipq806x: fix device tree nodes for PCI to get rid of I/O and memory offsets
Fixes QCA99x0 detection issues Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 47542
This commit is contained in:
parent
e20b689249
commit
44b8472f16
2 changed files with 12 additions and 12 deletions
|
@ -152,8 +152,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
|
|||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x00000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
|
||||
+ ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
|
||||
+
|
||||
+ interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
|
||||
+ interrupt-names = "msi";
|
||||
|
@ -193,8 +193,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
|
|||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ ranges = <0x81000000 0 0 0x31e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x00000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+ ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+
|
||||
+ interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
|
||||
+ interrupt-names = "msi";
|
||||
|
@ -234,8 +234,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
|
|||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ ranges = <0x81000000 0 0 0x35e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x00000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+ ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+
|
||||
+ interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
|
||||
+ interrupt-names = "msi";
|
||||
|
|
|
@ -153,8 +153,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
|
|||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x00000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
|
||||
+ ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
|
||||
+
|
||||
+ interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
|
||||
+ interrupt-names = "msi";
|
||||
|
@ -194,8 +194,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
|
|||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ ranges = <0x81000000 0 0 0x31e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x00000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+ ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+
|
||||
+ interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
|
||||
+ interrupt-names = "msi";
|
||||
|
@ -235,8 +235,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
|
|||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ ranges = <0x81000000 0 0 0x35e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x00000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+ ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
|
||||
+ 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
|
||||
+
|
||||
+ interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
|
||||
+ interrupt-names = "msi";
|
||||
|
|
Loading…
Reference in a new issue