ramips: Fix CM_GCR_CPC_BASE_CPCBASE_{MSK, SHF} values

Update CM_GCR_CPC_BASE_CPCBASE_{MSK,SHF} to match datasheet

Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>

SVN-Revision: 47840
This commit is contained in:
John Crispin 2015-12-11 15:03:08 +00:00
parent e4ee2402cb
commit 4076d12f41

View file

@ -0,0 +1,13 @@
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -270,8 +270,8 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
#define CM_GCR_GIC_BASE_GICEN_MSK (_ULCAST_(0x1) << 0)
/* GCR_CPC_BASE register fields */
-#define CM_GCR_CPC_BASE_CPCBASE_SHF 17
-#define CM_GCR_CPC_BASE_CPCBASE_MSK (_ULCAST_(0x7fff) << 17)
+#define CM_GCR_CPC_BASE_CPCBASE_SHF 15
+#define CM_GCR_CPC_BASE_CPCBASE_MSK (_ULCAST_(0x1ffff) << 15)
#define CM_GCR_CPC_BASE_CPCEN_SHF 0
#define CM_GCR_CPC_BASE_CPCEN_MSK (_ULCAST_(0x1) << 0)