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ar8216: fix a MTU related regression

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Switch reset on AR8316 appears to clobber the MTU configuration register
and possibly other global config registers. Move global configuration
register init writes back to the reset callback.

SVN-Revision: 30951
This commit is contained in:
Felix Fietkau 2012-03-15 16:57:27 +00:00
parent fab655c2b1
commit 404a4c1fcd
1 changed files with 29 additions and 19 deletions
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44
target/linux/generic/files/drivers/net/phy/ar8216.c
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@ -648,11 +648,6 @@ ar8216_hw_apply(struct switch_dev *dev)
static int static int
ar8216_hw_init(struct ar8216_priv *priv) ar8216_hw_init(struct ar8216_priv *priv)
{ {
/* XXX: undocumented magic from atheros, required! */
priv->write(priv, 0x38, 0xc000050e);
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
AR8216_GCTRL_MTU, 1518 + 8 + 2);
return 0; return 0;
} }
@ -675,10 +670,6 @@ ar8236_hw_init(struct ar8216_priv *priv)
} }
msleep(1000); msleep(1000);
/* enable jumbo frames */
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
AR8316_GCTRL_MTU, 9018 + 8 + 2);
priv->initialized = true; priv->initialized = true;
return 0; return 0;
} }
@ -716,9 +707,6 @@ ar8316_hw_init(struct ar8216_priv *priv)
priv->write(priv, 0x8, newval); priv->write(priv, 0x8, newval);
/* standard atheros magic */
priv->write(priv, 0x38, 0xc000050e);
/* Initialize the ports */ /* Initialize the ports */
bus = priv->phy->bus; bus = priv->phy->bus;
for (i = 0; i < 5; i++) { for (i = 0; i < 5; i++) {
@ -741,16 +729,36 @@ ar8316_hw_init(struct ar8216_priv *priv)
msleep(1000); msleep(1000);
} }
/* enable jumbo frames */ out:
priv->initialized = true;
return 0;
}
static void
ar8216_init_globals(struct ar8216_priv *priv)
{
switch (priv->chip) {
case AR8216:
/* standard atheros magic */
priv->write(priv, 0x38, 0xc000050e);
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL, ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
AR8316_GCTRL_MTU, 9018 + 8 + 2); AR8216_GCTRL_MTU, 1518 + 8 + 2);
break;
case AR8316:
/* standard atheros magic */
priv->write(priv, 0x38, 0xc000050e);
/* enable cpu port to receive multicast and broadcast frames */ /* enable cpu port to receive multicast and broadcast frames */
priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f); priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
out: /* fall through */
priv->initialized = true; case AR8236:
return 0; /* enable jumbo frames */
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
AR8316_GCTRL_MTU, 9018 + 8 + 2);
break;
}
} }
static void static void
@ -796,7 +804,9 @@ ar8216_reset_switch(struct switch_dev *dev)
for (i = 0; i < AR8216_NUM_PORTS; i++) for (i = 0; i < AR8216_NUM_PORTS; i++)
ar8216_init_port(priv, i); ar8216_init_port(priv, i);
ar8216_init_globals(priv);
mutex_unlock(&priv->reg_mutex); mutex_unlock(&priv->reg_mutex);
return ar8216_hw_apply(dev); return ar8216_hw_apply(dev);
} }