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brcm47xx: add vectored interrupts

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This adds support for vectored interrupts in this SoC.
This is supported by the 74K cpus.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 38975
This commit is contained in:
Hauke Mehrtens 2013-12-01 16:37:58 +00:00
parent 25ca004f24
commit 3fb7e8b851
2 changed files with 67 additions and 0 deletions
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1
target/linux/brcm47xx/config-3.10
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@ -42,6 +42,7 @@ CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y

66
target/linux/brcm47xx/patches-3.10/110-MIPS-BCM47XX-add-vint-irq.patch Normal file
View file

@ -0,0 +1,66 @@
From d9e8fd334d85fc8e4a2867655309a60c8de80883 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Wed, 20 Nov 2013 23:03:35 +0100
Subject: [PATCH 18/18] bcm47xx: add cpu_has_vint
---
arch/mips/bcm47xx/Kconfig | 1 +
arch/mips/bcm47xx/irq.c | 24 ++++++++++++++++++++++++
2 files changed, 25 insertions(+)
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -21,6 +21,7 @@ config BCM47XX_SSB
config BCM47XX_BCMA
bool "BCMA Support for Broadcom BCM47XX"
select SYS_HAS_CPU_MIPS32_R2
+ select CPU_MIPSR2_IRQ_VI
select BCMA
select BCMA_HOST_SOC
select BCMA_DRIVER_MIPS
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -25,6 +25,7 @@
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <asm/setup.h>
#include <asm/irq_cpu.h>
#include <bcm47xx.h>
@@ -50,6 +51,18 @@ void plat_irq_dispatch(void)
do_IRQ(6);
}
+#define DEFINE_HWx_IRQDISPATCH(x) \
+ static void bcm47xx_hw ## x ## _irqdispatch(void) \
+ { \
+ do_IRQ(x); \
+ }
+DEFINE_HWx_IRQDISPATCH(2)
+DEFINE_HWx_IRQDISPATCH(3)
+DEFINE_HWx_IRQDISPATCH(4)
+DEFINE_HWx_IRQDISPATCH(5)
+DEFINE_HWx_IRQDISPATCH(6)
+DEFINE_HWx_IRQDISPATCH(7)
+
void __init arch_init_irq(void)
{
#ifdef CONFIG_BCM47XX_BCMA
@@ -63,5 +76,16 @@ void __init arch_init_irq(void)
cp0_compare_irq = 7;
}
#endif
+
mips_cpu_irq_init();
+
+ if (cpu_has_vint) {
+ pr_info("Setting up vectored interrupts\n");
+ set_vi_handler(2, bcm47xx_hw2_irqdispatch);
+ set_vi_handler(3, bcm47xx_hw3_irqdispatch);
+ set_vi_handler(4, bcm47xx_hw4_irqdispatch);
+ set_vi_handler(5, bcm47xx_hw5_irqdispatch);
+ set_vi_handler(6, bcm47xx_hw6_irqdispatch);
+ set_vi_handler(7, bcm47xx_hw7_irqdispatch);
+ }
}