add common setup code

SVN-Revision: 17453
This commit is contained in:
Gabor Juhos 2009-08-31 18:53:22 +00:00
parent 4dd57199a2
commit 3cc0bc9038
5 changed files with 31 additions and 7 deletions

View file

@ -13,4 +13,6 @@ void __init ramips_intc_irq_init(unsigned intc_base, unsigned irq,
unsigned irq_base); unsigned irq_base);
u32 ramips_intc_get_status(void); u32 ramips_intc_get_status(void);
void __init ramips_soc_setup(void);
#endif /* __ASM_MACH_RALINK_COMMON_H */ #endif /* __ASM_MACH_RALINK_COMMON_H */

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@ -7,6 +7,6 @@
# under the terms of the GNU General Public License version 2 as published # under the terms of the GNU General Public License version 2 as published
# by the Free Software Foundation. # by the Free Software Foundation.
obj-y := intc.o gpio.o obj-y := setup.o intc.o gpio.o
obj-$(CONFIG_RALINK_DEV_GPIO_LEDS) += dev-gpio-leds.o obj-$(CONFIG_RALINK_DEV_GPIO_LEDS) += dev-gpio-leds.o

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@ -0,0 +1,24 @@
/*
* Ralink SoC common setup
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/addrspace.h>
#include <asm/mach-ralink/common.h>
void __init plat_mem_setup(void)
{
set_io_port_base(KSEG1);
ramips_soc_setup();
}

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@ -21,6 +21,7 @@
#include <asm/reboot.h> #include <asm/reboot.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/mach-ralink/common.h>
#include <asm/mach-ralink/rt288x.h> #include <asm/mach-ralink/rt288x.h>
#include <asm/mach-ralink/rt288x_regs.h> #include <asm/mach-ralink/rt288x_regs.h>
@ -100,10 +101,8 @@ unsigned int __cpuinit get_c0_compare_irq(void)
return CP0_LEGACY_COMPARE_IRQ; return CP0_LEGACY_COMPARE_IRQ;
} }
void __init plat_mem_setup(void) void __init ramips_soc_setup(void)
{ {
set_io_port_base(KSEG1);
rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE); rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE); rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);

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@ -20,6 +20,7 @@
#include <asm/reboot.h> #include <asm/reboot.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/mach-ralink/common.h>
#include <asm/mach-ralink/rt305x.h> #include <asm/mach-ralink/rt305x.h>
#include <asm/mach-ralink/rt305x_regs.h> #include <asm/mach-ralink/rt305x_regs.h>
@ -99,10 +100,8 @@ unsigned int __cpuinit get_c0_compare_irq(void)
return CP0_LEGACY_COMPARE_IRQ; return CP0_LEGACY_COMPARE_IRQ;
} }
void __init plat_mem_setup(void) void __init ramips_soc_setup(void)
{ {
set_io_port_base(KSEG1);
rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE); rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE);
rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE); rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE);