cosmetic fix: properly indent source
SVN-Revision: 8425
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c60d8f1216
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3b4fa7de59
1 changed files with 111 additions and 113 deletions
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@ -264,13 +264,11 @@ static void __init tnetd7300_init_clocks(void)
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struct tnetd7300_clocks *clocks = (struct tnetd7300_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x20, sizeof(struct tnetd7300_clocks));
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ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT,
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&clocks->bus, bootcr,
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ar7_afe_clock);
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&clocks->bus, bootcr, ar7_afe_clock);
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if (*bootcr & BOOT_PLL_ASYNC_MODE) {
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ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT,
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&clocks->cpu,
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bootcr, ar7_afe_clock);
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&clocks->cpu, bootcr, ar7_afe_clock);
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} else {
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ar7_cpu_clock = ar7_bus_clock;
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}
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@ -366,7 +364,7 @@ static void __init tnetd7200_init_clocks(void)
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int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv;
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int usb_base, usb_mul, usb_prediv, usb_postdiv;
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/*
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/*
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Log from Fritz!Box 7170 Annex B:
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CPU revision is: 00018448
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@ -385,7 +383,7 @@ static void __init tnetd7200_init_clocks(void)
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DSL didn't work if you didn't set the postdiv 2:1 postdiv2 combination, driver hung on startup.
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Haven't tested this on a synchronous board, neither do i know what to do with ar7_dsp_clock
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*/
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*/
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cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr);
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dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr);
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@ -445,7 +443,7 @@ static void __init tnetd7200_init_clocks(void)
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usb_prediv, usb_postdiv, -1, usb_mul,
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TNETD7200_DEF_USB_CLK);
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#warning FIXME: ????! Hrmm
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#warning FIXME: ????! Hrmm
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ar7_dsp_clock = ar7_cpu_clock;
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iounmap(clocks);
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