code style cleanup of the mach files
Signed-off-by: Luka Perkov <openwrt@lukaperkov.net> SVN-Revision: 31735
This commit is contained in:
parent
07dca108a9
commit
364f47e454
12 changed files with 116 additions and 109 deletions
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@ -36,14 +36,14 @@
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static struct resource resources[] =
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{
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[0] = {
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.name = "dwc_otg_membase",
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.start = LTQ_USB_IOMEM_BASE,
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.end = LTQ_USB_IOMEM_BASE + LTQ_USB_IOMEM_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.name = "dwc_otg_membase",
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.start = LTQ_USB_IOMEM_BASE,
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.end = LTQ_USB_IOMEM_BASE + LTQ_USB_IOMEM_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.name = "dwc_otg_irq",
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.flags = IORESOURCE_IRQ,
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.name = "dwc_otg_irq",
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -52,7 +52,7 @@ static u64 dwc_dmamask = (u32)0x1fffffff;
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static struct platform_device platform_dev = {
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.name = "dwc_otg",
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.dev = {
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.dma_mask = &dwc_dmamask,
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.dma_mask = &dwc_dmamask,
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},
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.resource = resources,
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.num_resources = ARRAY_SIZE(resources),
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@ -26,6 +26,6 @@ rt2x00_pci_plat_dev_init(struct pci_dev *dev)
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void __init
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ltq_register_rt2x00(const char *firmware)
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{
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rt2x00_pdata.eeprom_file_name = kstrdup(firmware, GFP_KERNEL);
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rt2x00_pdata.eeprom_file_name = kstrdup(firmware, GFP_KERNEL);
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ltqpci_plat_dev_init = rt2x00_pci_plat_dev_init;
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}
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@ -133,42 +133,10 @@ static struct physmap_flash_data arv_flash_data = {
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.parts = arv_partitions,
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};
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static void arv_load_nor(unsigned int max)
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{
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#define UBOOT_MAGIC 0x27051956
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int i;
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int sector = -1;
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if (ltq_brn_boot) {
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if (max == 0x800000)
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ltq_register_nor(&arv75xx_brnboot_flash_data);
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else
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ltq_register_nor(&arv45xx_brnboot_flash_data);
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return;
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}
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for (i = 1; i < 4 && sector < 0; i++) {
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unsigned int uboot_magic;
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memcpy_fromio(&uboot_magic, (void *)KSEG1ADDR(LTQ_FLASH_START) + (i * 0x10000), 4);
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if (uboot_magic == UBOOT_MAGIC)
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sector = i;
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}
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if (sector < 0)
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return;
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arv_partitions[0].size = arv_partitions[1].offset = (sector - 1) * 0x10000;
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arv_partitions[2].offset = arv_partitions[0].size + 0x10000;
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arv_partitions[2].size = max - arv_partitions[2].offset - 0x10000;
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arv_partitions[3].offset = max - 0x10000;
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ltq_register_nor(&arv_flash_data);
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}
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static struct ltq_pci_data ltq_pci_data = {
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.clock = PCI_CLOCK_EXT,
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.gpio = PCI_GNT1 | PCI_REQ1,
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.irq = {
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.clock = PCI_CLOCK_EXT,
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.gpio = PCI_GNT1 | PCI_REQ1,
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.irq = {
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[14] = INT_NUM_IM0_IRL0 + 22,
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},
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};
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@ -312,9 +280,10 @@ arv4525pw_gpio_leds[] __initdata = {
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#define ARV4525PW_PHYRESET 13
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#define ARV4525PW_RELAY 31
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static struct gpio arv4525pw_gpios[] __initdata = {
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{ ARV4525PW_PHYRESET, GPIOF_OUT_INIT_HIGH, "phyreset" },
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{ ARV4525PW_RELAY, GPIOF_OUT_INIT_HIGH, "relay" },
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static struct gpio
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arv4525pw_gpios[] __initdata = {
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{ ARV4525PW_PHYRESET, GPIOF_OUT_INIT_HIGH, "phyreset" },
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{ ARV4525PW_RELAY, GPIOF_OUT_INIT_HIGH, "relay" },
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};
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@ -416,7 +385,40 @@ arv7525pw_gpio_keys[] __initdata = {
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},
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};
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static void
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static void __init
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arv_load_nor(unsigned int max)
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{
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#define UBOOT_MAGIC 0x27051956
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int i;
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int sector = -1;
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if (ltq_brn_boot) {
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if (max == 0x800000)
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ltq_register_nor(&arv75xx_brnboot_flash_data);
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else
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ltq_register_nor(&arv45xx_brnboot_flash_data);
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return;
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}
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for (i = 1; i < 4 && sector < 0; i++) {
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unsigned int uboot_magic;
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memcpy_fromio(&uboot_magic, (void *)KSEG1ADDR(LTQ_FLASH_START) + (i * 0x10000), 4);
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if (uboot_magic == UBOOT_MAGIC)
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sector = i;
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}
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if (sector < 0)
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return;
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arv_partitions[0].size = arv_partitions[1].offset = (sector - 1) * 0x10000;
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arv_partitions[2].offset = arv_partitions[0].size + 0x10000;
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arv_partitions[2].size = max - arv_partitions[2].offset - 0x10000;
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arv_partitions[3].offset = max - 0x10000;
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ltq_register_nor(&arv_flash_data);
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}
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static void __init
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arv_register_ethernet(unsigned int mac_addr)
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{
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memcpy_fromio(<q_eth_data.mac.sa_data,
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@ -428,7 +430,7 @@ static u16 arv_ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
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static u16 arv_ath9k_eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
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static u8 arv_athxk_eeprom_mac[6];
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void __init
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static void __init
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arv_register_ath5k(unsigned int ath_addr, unsigned int mac_addr)
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{
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int i;
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@ -452,7 +454,7 @@ arv_register_ath5k(unsigned int ath_addr, unsigned int mac_addr)
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}
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}
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void __init
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static void __init
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arv_register_ath9k(unsigned int ath_addr, unsigned int mac_addr)
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{
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int i;
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@ -483,7 +485,7 @@ arv3527p_init(void)
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#define ARV3527P_MAC_ADDR 0x3f0016
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ltq_register_gpio_stp();
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//ltq_add_device_gpio_leds(arv3527p_gpio_leds, ARRAY_SIZE(arv3527p_gpio_leds));
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// ltq_add_device_gpio_leds(arv3527p_gpio_leds, ARRAY_SIZE(arv3527p_gpio_leds));
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arv_load_nor(0x400000);
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arv_register_ethernet(ARV3527P_MAC_ADDR);
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}
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@ -625,7 +627,7 @@ arv452Cpw_init(void)
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xway_register_dwc(ARV452CPW_USB);
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arv_register_ethernet(ARV452CPW_MAC_ADDR);
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arv_register_ath5k(ARV452CPW_ATH_ADDR, ARV452CPW_MAC_ADDR);
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ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac);
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ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac);
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gpio_request(ARV452CPW_SWITCH_RESET, "switch");
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gpio_set_value(ARV452CPW_SWITCH_RESET, 1);
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@ -45,7 +45,8 @@ static struct ltq_eth_data ltq_eth_data = {
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.mii_mode = -1, /* use EPHY */
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};
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static void __init easy50601_init(void)
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static void __init
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easy50601_init(void)
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{
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ltq_register_nor(&easy50601_flash_data);
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ltq_register_etop(<q_eth_data);
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@ -55,7 +55,8 @@ static struct ltq_eth_data ltq_eth_data = {
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.mii_mode = PHY_INTERFACE_MODE_MII,
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};
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static void __init easy50712_init(void)
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static void __init
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easy50712_init(void)
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{
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ltq_register_gpio_stp();
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ltq_register_nor(&easy50712_flash_data);
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@ -65,6 +66,6 @@ static void __init easy50712_init(void)
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}
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MIPS_MACHINE(LTQ_MACH_EASY50712,
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"EASY50712",
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"EASY50712 Eval Board",
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easy50712_init);
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"EASY50712",
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"EASY50712 Eval Board",
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easy50712_init);
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@ -84,9 +84,9 @@ fritz7320_gpio_keys[] __initdata = {
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};
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static struct ltq_pci_data ltq_pci_data = {
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.clock = PCI_CLOCK_INT,
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.gpio = PCI_GNT1 | PCI_REQ1,
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.irq = {
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.clock = PCI_CLOCK_INT,
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.gpio = PCI_GNT1 | PCI_REQ1,
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.irq = {
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[14] = INT_NUM_IM0_IRL0 + 22,
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},
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};
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@ -97,7 +97,8 @@ static struct ltq_eth_data ltq_eth_data = {
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static int usb_pins[2] = { 50, 51 };
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static void __init fritz7320_init(void)
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static void __init
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fritz7320_init(void)
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{
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ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(fritz7320_gpio_keys), fritz7320_gpio_keys);
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@ -109,6 +110,6 @@ static void __init fritz7320_init(void)
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}
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MIPS_MACHINE(LANTIQ_MACH_FRITZ7320,
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"FRITZ7320",
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"FRITZ!BOX 7320",
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fritz7320_init);
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"FRITZ7320",
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"FRITZ!BOX 7320",
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fritz7320_init);
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@ -128,14 +128,14 @@ static struct flash_platform_data spi_flash_data = {
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};
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static struct spi_board_info spi_flash __initdata = {
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.modalias = "m25p80",
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 10 * 1000 * 1000,
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.mode = SPI_MODE_3,
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.modalias = "m25p80",
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 10 * 1000 * 1000,
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.mode = SPI_MODE_3,
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.chip_select = 0,
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.controller_data = (void *) SPI_GPIO_CS0,
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.platform_data = &spi_flash_data
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.platform_data = &spi_flash_data
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};
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static void __init
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@ -145,7 +145,8 @@ spi_gpio_init(void)
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platform_device_register(&spi_gpio_device);
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}
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static void __init fritz3370_init(void)
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static void __init
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fritz3370_init(void)
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{
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spi_gpio_init();
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platform_device_register_simple("pcie-xway", 0, NULL, 0);
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@ -158,6 +159,6 @@ static void __init fritz3370_init(void)
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}
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MIPS_MACHINE(LANTIQ_MACH_FRITZ3370,
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"FRITZ3370",
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"FRITZ!BOX 3370",
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fritz3370_init);
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"FRITZ3370",
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"FRITZ!BOX 3370",
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fritz3370_init);
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@ -17,7 +17,6 @@
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/input.h>
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#include <linux/ath5k_platform.h>
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/io.h>
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@ -40,7 +39,8 @@
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static u8 ltq_ethaddr[6] = { 0 };
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static int __init setup_ethaddr(char *str)
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static int __init
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setup_ethaddr(char *str)
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{
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if (!mac_pton(str, ltq_ethaddr))
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memset(ltq_ethaddr, 0, 6);
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@ -55,9 +55,10 @@ enum {
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SX762,
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SX763,
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};
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static u8 board = SX763;
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static u8 board __initdata = SX763;
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static int __init setup_board(char *str)
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static int __init
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setup_board(char *str)
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{
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if (!strcmp(str, "sx761"))
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board = SX761;
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@ -137,7 +138,8 @@ static struct ltq_eth_data ltq_eth_data = {
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.mii_mode = PHY_INTERFACE_MODE_MII,
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};
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static void __init gigasx76x_init(void)
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static void __init
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gigasx76x_init(void)
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{
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#define GIGASX76X_USB 29
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@ -11,7 +11,9 @@
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#ifndef _MACH_GIGASX76X_H__
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#define _MACH_GIGASX76X_H__
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static u16 sx763_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]=
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#include <linux/ath5k_platform.h>
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static u16 sx763_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS] =
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{
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0x0013,0x168c,0x0200,0x0001,0x0000,0x5001,0x0000,0x2051,0x2051,0x1c0a,0x0100,
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0x0000,0x01c2,0x0002,0xc606,0x0001,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
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@ -109,7 +111,7 @@ static u16 sx763_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]=
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0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,
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0xffff,0xffff};
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static u16 sx762_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]=
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static u16 sx762_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS] =
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{
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0x001a,0x168c,0x0200,0x0001,0x0000,0x5001,0x0000,0x2051,0x2051,0x1c0a,0x0100,
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0x0000,0x01c2,0x0002,0xc606,0x0001,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
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@ -88,9 +88,9 @@ wbmr_gpio_keys[] __initdata = {
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};
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static struct ltq_pci_data ltq_pci_data = {
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.clock = PCI_CLOCK_INT,
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.gpio = PCI_GNT1 | PCI_REQ1,
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.irq = {
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.clock = PCI_CLOCK_INT,
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.gpio = PCI_GNT1 | PCI_REQ1,
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.irq = {
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[14] = INT_NUM_IM0_IRL0 + 22,
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},
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};
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@ -13,11 +13,10 @@
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---help---
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--- a/drivers/mtd/mtdpart.c
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+++ b/drivers/mtd/mtdpart.c
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@@ -867,6 +867,169 @@ static int refresh_rootfs_split(struct m
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@@ -867,6 +867,168 @@ static int refresh_rootfs_split(struct m
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}
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#endif /* CONFIG_MTD_ROOTFS_SPLIT */
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+
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+#ifdef CONFIG_MTD_UIMAGE_SPLIT
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+static unsigned long find_uimage_size(struct mtd_info *mtd,
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+ unsigned long offset)
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@ -98,7 +97,7 @@
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+}
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+
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+static unsigned long find_brnimage_size(struct mtd_info *mtd,
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+ unsigned long offset)
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+ unsigned long offset)
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+{
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+ unsigned long buf[4];
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+ // Assume at most 2MB of kernel image
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@ -183,7 +182,7 @@
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/*
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* This function, given a master MTD object and a partition table, creates
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* and registers slave MTD objects which are bound to the master according to
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@@ -883,7 +1046,7 @@ int add_mtd_partitions(struct mtd_info *
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@@ -883,7 +1045,7 @@ int add_mtd_partitions(struct mtd_info *
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struct mtd_part *slave;
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uint64_t cur_offset = 0;
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int i;
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@ -192,7 +191,7 @@
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int ret;
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#endif
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@@ -900,6 +1063,17 @@ int add_mtd_partitions(struct mtd_info *
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@@ -900,6 +1062,15 @@ int add_mtd_partitions(struct mtd_info *
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add_mtd_device(&slave->mtd);
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@ -200,10 +199,8 @@
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+ if (!strcmp(parts[i].name, "linux")) {
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+ ret = split_uimage(master, &parts[i]);
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+
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+ if (ret) {
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+ printk(KERN_WARNING
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+ "Can't split linux partition\n");
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+ }
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+ if (ret)
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+ printk(KERN_WARNING "Can't split linux partition\n");
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+ }
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+#endif
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+
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@ -24,7 +24,7 @@
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+void __init
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+ltq_register_tapi(void)
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+{
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+#define CP1_SIZE (1 << 20)
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+#define CP1_SIZE (1 << 20)
|
||||
+ dma_addr_t dma;
|
||||
+ cp1_base =
|
||||
+ (void*)CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE, &dma, GFP_ATOMIC));
|
||||
|
@ -67,17 +67,17 @@
|
|||
+/* ebu */
|
||||
+static struct resource ltq_ebu_resource =
|
||||
+{
|
||||
+ .name = "gpio_ebu",
|
||||
+ .start = LTQ_EBU_GPIO_START,
|
||||
+ .end = LTQ_EBU_GPIO_START + LTQ_EBU_GPIO_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ .name = "gpio_ebu",
|
||||
+ .start = LTQ_EBU_GPIO_START,
|
||||
+ .end = LTQ_EBU_GPIO_START + LTQ_EBU_GPIO_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+};
|
||||
+
|
||||
+static struct platform_device ltq_ebu =
|
||||
+{
|
||||
+ .name = "ltq_ebu",
|
||||
+ .resource = <q_ebu_resource,
|
||||
+ .num_resources = 1,
|
||||
+ .name = "ltq_ebu",
|
||||
+ .resource = <q_ebu_resource,
|
||||
+ .num_resources = 1,
|
||||
+};
|
||||
+
|
||||
+void __init
|
||||
|
@ -109,9 +109,9 @@
|
|||
+
|
||||
+static struct resource ltq_spi_resources[] = {
|
||||
+ {
|
||||
+ .start = LTQ_SSC_BASE_ADDR,
|
||||
+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ .start = LTQ_SSC_BASE_ADDR,
|
||||
+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ },
|
||||
+ IRQ_RES(spi_tx, LTQ_SSC_TIR),
|
||||
+ IRQ_RES(spi_rx, LTQ_SSC_RIR),
|
||||
|
@ -120,9 +120,9 @@
|
|||
+
|
||||
+static struct resource ltq_spi_resources_ar9[] = {
|
||||
+ {
|
||||
+ .start = LTQ_SSC_BASE_ADDR,
|
||||
+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ .start = LTQ_SSC_BASE_ADDR,
|
||||
+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ },
|
||||
+ IRQ_RES(spi_tx, LTQ_SSC_TIR_AR9),
|
||||
+ IRQ_RES(spi_rx, LTQ_SSC_RIR_AR9),
|
||||
|
@ -131,9 +131,9 @@
|
|||
+
|
||||
+static struct resource ltq_spi_resources_ase[] = {
|
||||
+ {
|
||||
+ .start = LTQ_SSC_BASE_ADDR,
|
||||
+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ .start = LTQ_SSC_BASE_ADDR,
|
||||
+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ },
|
||||
+ IRQ_RES(spi_tx, LTQ_SSC_TIR_ASE),
|
||||
+ IRQ_RES(spi_rx, LTQ_SSC_RIR_ASE),
|
||||
|
|
Loading…
Reference in a new issue