kernel: ssb/bcma: update to version from wireless-testing tag master-2012-05-16-2
SVN-Revision: 31772
This commit is contained in:
parent
3491d8c017
commit
273797f15a
27 changed files with 4759 additions and 2414 deletions
159
package/mac80211/patches/840-b43-backport.patch
Normal file
159
package/mac80211/patches/840-b43-backport.patch
Normal file
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@ -0,0 +1,159 @@
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--- a/drivers/net/wireless/b43/bus.c
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+++ b/drivers/net/wireless/b43/bus.c
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@@ -107,11 +107,9 @@ struct b43_bus_dev *b43_bus_dev_bcma_ini
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dev->dma_dev = core->dma_dev;
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dev->irq = core->irq;
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- /*
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dev->board_vendor = core->bus->boardinfo.vendor;
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dev->board_type = core->bus->boardinfo.type;
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- dev->board_rev = core->bus->boardinfo.rev;
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- */
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+ dev->board_rev = core->bus->sprom.board_rev;
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dev->chip_id = core->bus->chipinfo.id;
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dev->chip_rev = core->bus->chipinfo.rev;
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@@ -210,7 +208,7 @@ struct b43_bus_dev *b43_bus_dev_ssb_init
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dev->board_vendor = sdev->bus->boardinfo.vendor;
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dev->board_type = sdev->bus->boardinfo.type;
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- dev->board_rev = sdev->bus->boardinfo.rev;
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+ dev->board_rev = sdev->bus->sprom.board_rev;
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dev->chip_id = sdev->bus->chip_id;
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dev->chip_rev = sdev->bus->chip_rev;
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--- a/drivers/net/wireless/b43/dma.c
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+++ b/drivers/net/wireless/b43/dma.c
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@@ -1109,7 +1109,7 @@ static bool b43_dma_translation_in_low_w
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#ifdef CONFIG_B43_SSB
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if (dev->dev->bus_type == B43_BUS_SSB &&
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dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI &&
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- !(dev->dev->sdev->bus->host_pci->is_pcie &&
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+ !(pci_is_pcie(dev->dev->sdev->bus->host_pci) &&
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ssb_read32(dev->dev->sdev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64))
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return 1;
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#endif
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--- a/drivers/net/wireless/b43/main.c
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+++ b/drivers/net/wireless/b43/main.c
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@@ -4834,8 +4834,14 @@ static int b43_op_start(struct ieee80211
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out_mutex_unlock:
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mutex_unlock(&wl->mutex);
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- /* reload configuration */
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- b43_op_config(hw, ~0);
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+ /*
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+ * Configuration may have been overwritten during initialization.
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+ * Reload the configuration, but only if initialization was
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+ * successful. Reloading the configuration after a failed init
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+ * may hang the system.
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+ */
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+ if (!err)
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+ b43_op_config(hw, ~0);
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return err;
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}
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@@ -5279,10 +5285,10 @@ static void b43_sprom_fixup(struct ssb_b
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/* boardflags workarounds */
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if (bus->boardinfo.vendor == SSB_BOARDVENDOR_DELL &&
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- bus->chip_id == 0x4301 && bus->boardinfo.rev == 0x74)
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+ bus->chip_id == 0x4301 && bus->sprom.board_rev == 0x74)
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bus->sprom.boardflags_lo |= B43_BFL_BTCOEXIST;
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if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
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- bus->boardinfo.type == 0x4E && bus->boardinfo.rev > 0x40)
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+ bus->boardinfo.type == 0x4E && bus->sprom.board_rev > 0x40)
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bus->sprom.boardflags_lo |= B43_BFL_PACTRL;
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if (bus->bustype == SSB_BUSTYPE_PCI) {
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pdev = bus->host_pci;
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--- a/drivers/net/wireless/b43/sdio.c
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+++ b/drivers/net/wireless/b43/sdio.c
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@@ -193,7 +193,7 @@ static struct sdio_driver b43_sdio_drive
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.name = "b43-sdio",
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.id_table = b43_sdio_ids,
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.probe = b43_sdio_probe,
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- .remove = b43_sdio_remove,
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+ .remove = __devexit_p(b43_sdio_remove),
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};
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int b43_sdio_init(void)
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--- a/drivers/net/wireless/b43legacy/main.c
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+++ b/drivers/net/wireless/b43legacy/main.c
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@@ -1550,8 +1550,6 @@ static void b43legacy_request_firmware(s
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const char *filename;
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int err;
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- /* do dummy read */
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- ssb_read32(dev->dev, SSB_TMSHIGH);
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if (!fw->ucode) {
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if (rev == 2)
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filename = "ucode2";
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@@ -3758,7 +3756,7 @@ static void b43legacy_sprom_fixup(struct
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/* boardflags workarounds */
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if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
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bus->boardinfo.type == 0x4E &&
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- bus->boardinfo.rev > 0x40)
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+ bus->sprom.board_rev > 0x40)
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bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
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}
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--- a/drivers/net/wireless/b43legacy/phy.c
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+++ b/drivers/net/wireless/b43legacy/phy.c
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@@ -408,7 +408,7 @@ static void b43legacy_phy_setupg(struct
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if (is_bcm_board_vendor(dev) &&
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(dev->dev->bus->boardinfo.type == 0x0416) &&
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- (dev->dev->bus->boardinfo.rev == 0x0017))
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+ (dev->dev->bus->sprom.board_rev == 0x0017))
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return;
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b43legacy_ilt_write(dev, 0x5001, 0x0002);
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@@ -424,7 +424,7 @@ static void b43legacy_phy_setupg(struct
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if (is_bcm_board_vendor(dev) &&
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(dev->dev->bus->boardinfo.type == 0x0416) &&
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- (dev->dev->bus->boardinfo.rev == 0x0017))
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+ (dev->dev->bus->sprom.board_rev == 0x0017))
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return;
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b43legacy_ilt_write(dev, 0x0401, 0x0002);
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--- a/drivers/net/wireless/b43legacy/radio.c
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+++ b/drivers/net/wireless/b43legacy/radio.c
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@@ -1998,7 +1998,7 @@ u16 b43legacy_default_radio_attenuation(
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if (phy->type == B43legacy_PHYTYPE_G) {
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if (is_bcm_board_vendor(dev) &&
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dev->dev->bus->boardinfo.type == 0x421 &&
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- dev->dev->bus->boardinfo.rev >= 30)
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+ dev->dev->bus->sprom.board_rev >= 30)
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att = 3;
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else if (is_bcm_board_vendor(dev) &&
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dev->dev->bus->boardinfo.type == 0x416)
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@@ -2008,7 +2008,7 @@ u16 b43legacy_default_radio_attenuation(
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} else {
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if (is_bcm_board_vendor(dev) &&
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dev->dev->bus->boardinfo.type == 0x421 &&
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- dev->dev->bus->boardinfo.rev >= 30)
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+ dev->dev->bus->sprom.board_rev >= 30)
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att = 7;
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else
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att = 6;
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@@ -2018,7 +2018,7 @@ u16 b43legacy_default_radio_attenuation(
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if (phy->type == B43legacy_PHYTYPE_G) {
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if (is_bcm_board_vendor(dev) &&
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dev->dev->bus->boardinfo.type == 0x421 &&
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- dev->dev->bus->boardinfo.rev >= 30)
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+ dev->dev->bus->sprom.board_rev >= 30)
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att = 3;
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else if (is_bcm_board_vendor(dev) &&
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dev->dev->bus->boardinfo.type ==
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@@ -2052,9 +2052,9 @@ u16 b43legacy_default_radio_attenuation(
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}
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if (is_bcm_board_vendor(dev) &&
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dev->dev->bus->boardinfo.type == 0x421) {
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- if (dev->dev->bus->boardinfo.rev < 0x43)
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+ if (dev->dev->bus->sprom.board_rev < 0x43)
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att = 2;
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- else if (dev->dev->bus->boardinfo.rev < 0x51)
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+ else if (dev->dev->bus->sprom.board_rev < 0x51)
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att = 3;
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}
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if (att == 0xFFFF)
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@ -14,7 +14,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/bcma/host_pci.c
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+++ b/drivers/bcma/host_pci.c
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@@ -269,6 +269,7 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_
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@@ -272,6 +272,7 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
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@ -1,24 +0,0 @@
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--- a/drivers/bcma/sprom.c
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+++ b/drivers/bcma/sprom.c
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@@ -404,16 +404,19 @@ int bcma_sprom_get(struct bcma_bus *bus)
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return -EOPNOTSUPP;
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if (!bcma_sprom_ext_available(bus)) {
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+ bool sprom_onchip;
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+
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/*
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* External SPROM takes precedence so check
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* on-chip OTP only when no external SPROM
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* is present.
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*/
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- if (bcma_sprom_onchip_available(bus)) {
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+ sprom_onchip = bcma_sprom_onchip_available(bus);
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+ if (sprom_onchip) {
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/* determine offset */
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offset = bcma_sprom_onchip_offset(bus);
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}
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- if (!offset) {
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+ if (!offset || !sprom_onchip) {
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/*
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* Maybe there is no SPROM on the device?
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* Now we ask the arch code if there is some sprom
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@ -1,6 +1,6 @@
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -297,6 +297,23 @@ static int bcma_get_next_core(struct bcm
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@@ -323,6 +323,23 @@ static int bcma_get_next_core(struct bcm
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return -EILSEQ;
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}
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@ -24,7 +24,7 @@
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/* get & parse slave ports */
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for (i = 0; i < ports[1]; i++) {
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for (j = 0; ; j++) {
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@@ -309,7 +326,7 @@ static int bcma_get_next_core(struct bcm
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@@ -335,7 +352,7 @@ static int bcma_get_next_core(struct bcm
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break;
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} else {
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if (i == 0 && j == 0)
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@ -35,7 +35,7 @@
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}
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--- a/include/linux/bcma/bcma.h
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+++ b/include/linux/bcma/bcma.h
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@@ -139,6 +139,7 @@ struct bcma_device {
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@@ -144,6 +144,7 @@ struct bcma_device {
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u8 core_unit;
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u32 addr;
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@ -1,99 +0,0 @@
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -19,7 +19,14 @@ struct bcma_device_id_name {
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u16 id;
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const char *name;
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};
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-struct bcma_device_id_name bcma_device_names[] = {
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+
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+static const struct bcma_device_id_name bcma_arm_device_names[] = {
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+ { BCMA_CORE_ARM_1176, "ARM 1176" },
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+ { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
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+ { BCMA_CORE_ARM_CM3, "ARM CM3" },
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+};
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+
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+static const struct bcma_device_id_name bcma_bcm_device_names[] = {
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{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
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{ BCMA_CORE_INVALID, "Invalid" },
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{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
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@@ -27,7 +34,6 @@ struct bcma_device_id_name bcma_device_n
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{ BCMA_CORE_SRAM, "SRAM" },
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{ BCMA_CORE_SDRAM, "SDRAM" },
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{ BCMA_CORE_PCI, "PCI" },
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- { BCMA_CORE_MIPS, "MIPS" },
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{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
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{ BCMA_CORE_V90, "V90" },
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{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
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@@ -44,7 +50,6 @@ struct bcma_device_id_name bcma_device_n
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{ BCMA_CORE_PHY_A, "PHY A" },
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{ BCMA_CORE_PHY_B, "PHY B" },
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{ BCMA_CORE_PHY_G, "PHY G" },
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- { BCMA_CORE_MIPS_3302, "MIPS 3302" },
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{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
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{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
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{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
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@@ -58,15 +63,11 @@ struct bcma_device_id_name bcma_device_n
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{ BCMA_CORE_PHY_N, "PHY N" },
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{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
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{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
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- { BCMA_CORE_ARM_1176, "ARM 1176" },
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- { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
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{ BCMA_CORE_PHY_LP, "PHY LP" },
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{ BCMA_CORE_PMU, "PMU" },
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{ BCMA_CORE_PHY_SSN, "PHY SSN" },
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{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
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- { BCMA_CORE_ARM_CM3, "ARM CM3" },
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{ BCMA_CORE_PHY_HT, "PHY HT" },
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- { BCMA_CORE_MIPS_74K, "MIPS 74K" },
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{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
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{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
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{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
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@@ -79,16 +80,41 @@ struct bcma_device_id_name bcma_device_n
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{ BCMA_CORE_SHIM, "SHIM" },
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{ BCMA_CORE_DEFAULT, "Default" },
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};
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-const char *bcma_device_name(struct bcma_device_id *id)
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+
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+static const struct bcma_device_id_name bcma_mips_device_names[] = {
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+ { BCMA_CORE_MIPS, "MIPS" },
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+ { BCMA_CORE_MIPS_3302, "MIPS 3302" },
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+ { BCMA_CORE_MIPS_74K, "MIPS 74K" },
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+};
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+
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+static const char *bcma_device_name(const struct bcma_device_id *id)
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{
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- int i;
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+ const struct bcma_device_id_name *names;
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+ int size, i;
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- if (id->manuf == BCMA_MANUF_BCM) {
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- for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
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- if (bcma_device_names[i].id == id->id)
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- return bcma_device_names[i].name;
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- }
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+ /* search manufacturer specific names */
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+ switch (id->manuf) {
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+ case BCMA_MANUF_ARM:
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+ names = bcma_arm_device_names;
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+ size = ARRAY_SIZE(bcma_arm_device_names);
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+ break;
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+ case BCMA_MANUF_BCM:
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+ names = bcma_bcm_device_names;
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+ size = ARRAY_SIZE(bcma_bcm_device_names);
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+ break;
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+ case BCMA_MANUF_MIPS:
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+ names = bcma_mips_device_names;
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+ size = ARRAY_SIZE(bcma_mips_device_names);
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+ break;
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+ default:
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+ return "UNKNOWN";
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}
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+
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+ for (i = 0; i < size; i++) {
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+ if (names[i].id == id->id)
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+ return names[i].name;
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+ }
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+
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return "UNKNOWN";
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}
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@ -1,14 +0,0 @@
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--- a/drivers/bcma/driver_pci_host.c
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+++ b/drivers/bcma/driver_pci_host.c
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@@ -491,8 +491,9 @@ void __devinit bcma_core_pci_hostmode_in
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/* Ok, ready to run, register it to the system.
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* The following needs change, if we want to port hostmode
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* to non-MIPS platform. */
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- io_map_base = (unsigned long)ioremap_nocache(BCMA_SOC_PCI_MEM,
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- 0x04000000);
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+ io_map_base = (unsigned long)ioremap_nocache(pc_host->mem_resource.start,
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+ pc_host->mem_resource.end -
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+ pc_host->mem_resource.start + 1);
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pc_host->pci_controller.io_map_base = io_map_base;
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set_io_port_base(pc_host->pci_controller.io_map_base);
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/* Give some time to the PCI controller to configure itself with the new
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@ -1,29 +0,0 @@
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--- a/drivers/bcma/driver_pci_host.c
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+++ b/drivers/bcma/driver_pci_host.c
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@@ -119,7 +119,7 @@ static int bcma_extpci_read_config(struc
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if (unlikely(!addr))
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goto out;
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err = -ENOMEM;
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- mmio = ioremap_nocache(addr, len);
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+ mmio = ioremap_nocache(addr, sizeof(val));
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if (!mmio)
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goto out;
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@@ -171,7 +171,7 @@ static int bcma_extpci_write_config(stru
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addr = pc->core->addr + BCMA_CORE_PCI_PCICFG0;
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addr |= (func << 8);
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addr |= (off & 0xfc);
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- mmio = ioremap_nocache(addr, len);
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+ mmio = ioremap_nocache(addr, sizeof(val));
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if (!mmio)
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goto out;
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}
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@@ -180,7 +180,7 @@ static int bcma_extpci_write_config(stru
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if (unlikely(!addr))
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goto out;
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err = -ENOMEM;
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- mmio = ioremap_nocache(addr, len);
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+ mmio = ioremap_nocache(addr, sizeof(val));
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if (!mmio)
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goto out;
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@ -1,20 +0,0 @@
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--- a/drivers/bcma/host_pci.c
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+++ b/drivers/bcma/host_pci.c
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@@ -222,7 +222,7 @@ err_kfree_bus:
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return err;
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}
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-static void bcma_host_pci_remove(struct pci_dev *dev)
|
||||
+static void __devexit bcma_host_pci_remove(struct pci_dev *dev)
|
||||
{
|
||||
struct bcma_bus *bus = pci_get_drvdata(dev);
|
||||
|
||||
@@ -278,7 +278,7 @@ static struct pci_driver bcma_pci_bridge
|
||||
.name = "bcma-pci-bridge",
|
||||
.id_table = bcma_pci_bridge_tbl,
|
||||
.probe = bcma_host_pci_probe,
|
||||
- .remove = bcma_host_pci_remove,
|
||||
+ .remove = __devexit_p(bcma_host_pci_remove),
|
||||
.driver.pm = BCMA_PM_OPS,
|
||||
};
|
||||
|
|
@ -1,10 +0,0 @@
|
|||
--- a/drivers/bcma/core.c
|
||||
+++ b/drivers/bcma/core.c
|
||||
@@ -30,6 +30,7 @@ void bcma_core_disable(struct bcma_devic
|
||||
udelay(10);
|
||||
|
||||
bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
|
||||
+ bcma_aread32(core, BCMA_RESET_CTL);
|
||||
udelay(1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_disable);
|
|
@ -0,0 +1,11 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -163,8 +163,6 @@ static int bcm47xx_get_invariants(struct
|
||||
iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
|
||||
if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
|
||||
iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
|
||||
- if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
|
||||
- iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
|
||||
|
||||
memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
|
||||
bcm47xx_fill_sprom(&iv->sprom, NULL);
|
|
@ -0,0 +1,46 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -157,12 +157,7 @@ static int bcm47xx_get_invariants(struct
|
||||
/* Fill boardinfo structure */
|
||||
memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
|
||||
|
||||
- if (nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0)
|
||||
- iv->boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0);
|
||||
- else
|
||||
- iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
|
||||
- if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
|
||||
- iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
|
||||
+ bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL);
|
||||
|
||||
memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
|
||||
bcm47xx_fill_sprom(&iv->sprom, NULL);
|
||||
--- a/arch/mips/bcm47xx/sprom.c
|
||||
+++ b/arch/mips/bcm47xx/sprom.c
|
||||
@@ -616,3 +616,15 @@ void bcm47xx_fill_sprom(struct ssb_sprom
|
||||
bcm47xx_fill_sprom_r1(sprom, prefix);
|
||||
}
|
||||
}
|
||||
+
|
||||
+#ifdef CONFIG_BCM47XX_SSB
|
||||
+void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,
|
||||
+ const char *prefix)
|
||||
+{
|
||||
+ nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0);
|
||||
+ if (!boardinfo->vendor)
|
||||
+ boardinfo->vendor = SSB_BOARDVENDOR_BCM;
|
||||
+
|
||||
+ nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0);
|
||||
+}
|
||||
+#endif
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
|
||||
@@ -47,4 +47,9 @@ extern enum bcm47xx_bus_type bcm47xx_bus
|
||||
void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix);
|
||||
void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX_SSB
|
||||
+void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,
|
||||
+ const char *prefix);
|
||||
+#endif
|
||||
+
|
||||
#endif /* __ASM_BCM47XX_H */
|
|
@ -0,0 +1,41 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -297,6 +297,8 @@ static void __init bcm47xx_register_bcma
|
||||
|
||||
if (bcm47xx_bus.bcma.bus.drv_cc.flash_type == BCMA_NFLASH)
|
||||
bcm47xx_nflash_struct_bcma_init(&bcm47xx_nflash, &bcm47xx_bus.bcma.bus.drv_cc);
|
||||
+
|
||||
+ bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL);
|
||||
}
|
||||
|
||||
static int __init bcm47xx_register_flash_bcma(void)
|
||||
--- a/arch/mips/bcm47xx/sprom.c
|
||||
+++ b/arch/mips/bcm47xx/sprom.c
|
||||
@@ -628,3 +628,15 @@ void bcm47xx_fill_ssb_boardinfo(struct s
|
||||
nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0);
|
||||
}
|
||||
#endif
|
||||
+
|
||||
+#ifdef CONFIG_BCM47XX_BCMA
|
||||
+void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo,
|
||||
+ const char *prefix)
|
||||
+{
|
||||
+ nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0);
|
||||
+ if (!boardinfo->vendor)
|
||||
+ boardinfo->vendor = SSB_BOARDVENDOR_BCM;
|
||||
+
|
||||
+ nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0);
|
||||
+}
|
||||
+#endif
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
|
||||
@@ -51,5 +51,9 @@ void bcm47xx_fill_sprom_ethernet(struct
|
||||
void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,
|
||||
const char *prefix);
|
||||
#endif
|
||||
+#ifdef CONFIG_BCM47XX_BCMA
|
||||
+void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo,
|
||||
+ const char *prefix);
|
||||
+#endif
|
||||
|
||||
#endif /* __ASM_BCM47XX_H */
|
|
@ -0,0 +1,11 @@
|
|||
--- a/arch/mips/bcm47xx/sprom.c
|
||||
+++ b/arch/mips/bcm47xx/sprom.c
|
||||
@@ -165,6 +165,8 @@ static void bcm47xx_fill_sprom_r1234589(
|
||||
const char *prefix)
|
||||
{
|
||||
nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0);
|
||||
+ if (!sprom->board_rev)
|
||||
+ nvram_read_u16(NULL, NULL, "boardrev", &sprom->board_rev, 0);
|
||||
nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0);
|
||||
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff);
|
||||
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff);
|
|
@ -33,7 +33,7 @@
|
|||
+EXPORT_SYMBOL(nvram_get);
|
||||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -384,3 +384,20 @@ static int __init bcm47xx_register_flash
|
||||
@@ -379,3 +379,20 @@ static int __init bcm47xx_register_flash
|
||||
return -1;
|
||||
}
|
||||
fs_initcall(bcm47xx_register_flash);
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -172,6 +172,10 @@ static int bcm47xx_get_invariants(struct
|
||||
@@ -165,6 +165,10 @@ static int bcm47xx_get_invariants(struct
|
||||
if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
|
||||
iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
|
||||
|
||||
|
|
|
@ -1,3 +1,29 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -5,12 +5,13 @@
|
||||
* because of its small size we include it in the SSB core
|
||||
* instead of creating a standalone module.
|
||||
*
|
||||
- * Copyright 2007 Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2007 Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
+#include <linux/module.h>
|
||||
#include <linux/ssb/ssb.h>
|
||||
|
||||
#include "ssb_private.h"
|
||||
@@ -28,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
||||
--- a/drivers/ssb/driver_chipcommon.c
|
||||
+++ b/drivers/ssb/driver_chipcommon.c
|
||||
@@ -3,7 +3,7 @@
|
||||
|
@ -216,6 +242,17 @@
|
|||
+ return 0;
|
||||
+ }
|
||||
+}
|
||||
--- a/drivers/ssb/driver_extif.c
|
||||
+++ b/drivers/ssb/driver_extif.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* Broadcom EXTIF core driver
|
||||
*
|
||||
* Copyright 2005, Broadcom Corporation
|
||||
- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
|
||||
* Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
|
||||
* Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
|
||||
*
|
||||
--- a/drivers/ssb/driver_gige.c
|
||||
+++ b/drivers/ssb/driver_gige.c
|
||||
@@ -3,7 +3,7 @@
|
||||
|
@ -261,6 +298,27 @@
|
|||
{
|
||||
struct ssb_gige *dev;
|
||||
u32 base, tmslow, tmshigh;
|
||||
--- a/drivers/ssb/driver_mipscore.c
|
||||
+++ b/drivers/ssb/driver_mipscore.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* Broadcom MIPS core driver
|
||||
*
|
||||
* Copyright 2005, Broadcom Corporation
|
||||
- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
@@ -208,6 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
|
||||
struct ssb_bus *bus = mcore->dev->bus;
|
||||
u32 pll_type, n, m, rate = 0;
|
||||
|
||||
+ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
|
||||
+ return ssb_pmu_get_cpu_clock(&bus->chipco);
|
||||
+
|
||||
if (bus->extif.dev) {
|
||||
ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
|
||||
} else if (bus->chipco.dev) {
|
||||
--- a/drivers/ssb/driver_pcicore.c
|
||||
+++ b/drivers/ssb/driver_pcicore.c
|
||||
@@ -3,7 +3,7 @@
|
||||
|
@ -635,6 +693,17 @@
|
|||
}
|
||||
pc->setup_done = 1;
|
||||
out:
|
||||
--- a/drivers/ssb/embedded.c
|
||||
+++ b/drivers/ssb/embedded.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* Embedded systems support code
|
||||
*
|
||||
* Copyright 2005-2008, Broadcom Corporation
|
||||
- * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2006-2008, Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
--- a/drivers/ssb/main.c
|
||||
+++ b/drivers/ssb/main.c
|
||||
@@ -3,7 +3,7 @@
|
||||
|
@ -929,7 +998,26 @@
|
|||
* Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
|
||||
* Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
|
||||
* Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
|
||||
@@ -331,7 +331,6 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -178,6 +178,18 @@ err_pci:
|
||||
#define SPEX(_outvar, _offset, _mask, _shift) \
|
||||
SPEX16(_outvar, _offset, _mask, _shift)
|
||||
|
||||
+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
|
||||
+ do { \
|
||||
+ SPEX(_field[0], _offset + 0, _mask, _shift); \
|
||||
+ SPEX(_field[1], _offset + 2, _mask, _shift); \
|
||||
+ SPEX(_field[2], _offset + 4, _mask, _shift); \
|
||||
+ SPEX(_field[3], _offset + 6, _mask, _shift); \
|
||||
+ SPEX(_field[4], _offset + 8, _mask, _shift); \
|
||||
+ SPEX(_field[5], _offset + 10, _mask, _shift); \
|
||||
+ SPEX(_field[6], _offset + 12, _mask, _shift); \
|
||||
+ SPEX(_field[7], _offset + 14, _mask, _shift); \
|
||||
+ } while (0)
|
||||
+
|
||||
|
||||
static inline u8 ssb_crc8(u8 crc, u8 data)
|
||||
{
|
||||
@@ -331,7 +343,6 @@ static void sprom_extract_r123(struct ss
|
||||
{
|
||||
int i;
|
||||
u16 v;
|
||||
|
@ -937,8 +1025,24 @@
|
|||
u16 loc[3];
|
||||
|
||||
if (out->revision == 3) /* rev 3 moved MAC */
|
||||
@@ -390,20 +389,12 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -361,8 +372,9 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
|
||||
SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
|
||||
SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
|
||||
- SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
- SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
+ if (out->revision == 1)
|
||||
+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
+ SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
|
||||
SSB_SPROM1_BINF_ANTA_SHIFT);
|
||||
SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
|
||||
@@ -388,22 +400,16 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
|
||||
if (out->revision >= 2)
|
||||
SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
- gain = r123_extract_antgain(out->revision, in,
|
||||
|
@ -964,7 +1068,27 @@
|
|||
}
|
||||
|
||||
/* Revs 4 5 and 8 have partially shared layout */
|
||||
@@ -504,16 +495,14 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -464,14 +470,17 @@ static void sprom_extract_r45(struct ssb
|
||||
SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
|
||||
SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
|
||||
SSB_SPROM4_ETHPHY_ET1A_SHIFT);
|
||||
+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
|
||||
if (out->revision == 4) {
|
||||
- SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
|
||||
SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
|
||||
} else {
|
||||
- SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
|
||||
@@ -504,16 +513,14 @@ static void sprom_extract_r45(struct ssb
|
||||
}
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -985,7 +1109,7 @@
|
|||
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
@@ -523,7 +512,13 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -523,14 +530,22 @@ static void sprom_extract_r45(struct ssb
|
||||
static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
|
||||
{
|
||||
int i;
|
||||
|
@ -1000,7 +1124,17 @@
|
|||
|
||||
/* extract the MAC address */
|
||||
for (i = 0; i < 3; i++) {
|
||||
@@ -596,16 +591,69 @@ static void sprom_extract_r8(struct ssb_
|
||||
v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
|
||||
*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
|
||||
}
|
||||
- SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
|
||||
@@ -596,17 +611,127 @@ static void sprom_extract_r8(struct ssb_
|
||||
SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -1018,7 +1152,7 @@
|
|||
SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
|
||||
- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
|
||||
- sizeof(out->antenna_gain.ghz5));
|
||||
+
|
||||
|
||||
+ /* Extract cores power info info */
|
||||
+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
|
||||
+ o = pwr_info_offset[i];
|
||||
|
@ -1073,10 +1207,68 @@
|
|||
+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
|
||||
+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
|
||||
+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
|
||||
|
||||
+
|
||||
+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
|
||||
+ SSB_SPROM8_LEDDC_ON_SHIFT);
|
||||
+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
|
||||
+ SSB_SPROM8_LEDDC_OFF_SHIFT);
|
||||
+
|
||||
+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
|
||||
+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
|
||||
+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
|
||||
+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
|
||||
+
|
||||
+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
|
||||
+
|
||||
+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
|
||||
+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
|
||||
+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
|
||||
+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
|
||||
+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
|
||||
+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
|
||||
+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
|
||||
+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
|
||||
+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
|
||||
+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
|
||||
+
|
||||
+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
|
||||
+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
|
||||
+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
|
||||
+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
|
||||
+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
|
||||
+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
|
||||
+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
|
||||
+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
|
||||
+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
|
||||
+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
|
||||
+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
@@ -662,7 +710,6 @@ static int sprom_extract(struct ssb_bus
|
||||
/* TODO - get remaining rev 8 stuff needed */
|
||||
@@ -662,7 +787,6 @@ static int sprom_extract(struct ssb_bus
|
||||
static int ssb_pci_sprom_get(struct ssb_bus *bus,
|
||||
struct ssb_sprom *sprom)
|
||||
{
|
||||
|
@ -1084,7 +1276,7 @@
|
|||
int err;
|
||||
u16 *buf;
|
||||
|
||||
@@ -707,10 +754,17 @@ static int ssb_pci_sprom_get(struct ssb_
|
||||
@@ -707,10 +831,17 @@ static int ssb_pci_sprom_get(struct ssb_
|
||||
if (err) {
|
||||
/* All CRC attempts failed.
|
||||
* Maybe there is no SPROM on the device?
|
||||
|
@ -1106,7 +1298,7 @@
|
|||
err = 0;
|
||||
goto out_free;
|
||||
}
|
||||
@@ -728,12 +782,9 @@ out_free:
|
||||
@@ -728,12 +859,8 @@ out_free:
|
||||
static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
|
||||
struct ssb_boardinfo *bi)
|
||||
{
|
||||
|
@ -1118,7 +1310,6 @@
|
|||
- &bi->rev);
|
||||
+ bi->vendor = bus->host_pci->subsystem_vendor;
|
||||
+ bi->type = bus->host_pci->subsystem_device;
|
||||
+ bi->rev = bus->host_pci->revision;
|
||||
}
|
||||
|
||||
int ssb_pci_get_invariants(struct ssb_bus *bus,
|
||||
|
@ -1153,6 +1344,36 @@
|
|||
{
|
||||
driver->probe = ssb_pcihost_probe;
|
||||
driver->remove = ssb_pcihost_remove;
|
||||
--- a/drivers/ssb/pcmcia.c
|
||||
+++ b/drivers/ssb/pcmcia.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* PCMCIA-Hostbus related functions
|
||||
*
|
||||
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
|
||||
- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
@@ -676,14 +676,10 @@ static int ssb_pcmcia_do_get_invariants(
|
||||
case SSB_PCMCIA_CIS_ANTGAIN:
|
||||
GOTO_ERROR_ON(tuple->TupleDataLen != 2,
|
||||
"antg tpl size");
|
||||
- sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a0 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a1 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a2 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a3 = tuple->TupleData[1];
|
||||
break;
|
||||
case SSB_PCMCIA_CIS_BFLAGS:
|
||||
GOTO_ERROR_ON((tuple->TupleDataLen != 3) &&
|
||||
--- a/drivers/ssb/scan.c
|
||||
+++ b/drivers/ssb/scan.c
|
||||
@@ -2,7 +2,7 @@
|
||||
|
@ -1196,6 +1417,36 @@
|
|||
if (!bus->nr_devices)
|
||||
bus->nr_devices = chipid_to_nrcores(bus->chip_id);
|
||||
if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
|
||||
--- a/drivers/ssb/sdio.c
|
||||
+++ b/drivers/ssb/sdio.c
|
||||
@@ -6,7 +6,7 @@
|
||||
*
|
||||
* Based on drivers/ssb/pcmcia.c
|
||||
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
|
||||
- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*
|
||||
@@ -551,14 +551,10 @@ int ssb_sdio_get_invariants(struct ssb_b
|
||||
case SSB_SDIO_CIS_ANTGAIN:
|
||||
GOTO_ERROR_ON(tuple->size != 2,
|
||||
"antg tpl size");
|
||||
- sprom->antenna_gain.ghz24.a0 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz24.a1 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz24.a2 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz24.a3 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a0 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a1 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a2 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a3 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a0 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a1 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a2 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a3 = tuple->data[1];
|
||||
break;
|
||||
case SSB_SDIO_CIS_BFLAGS:
|
||||
GOTO_ERROR_ON((tuple->size != 3) &&
|
||||
--- a/drivers/ssb/sprom.c
|
||||
+++ b/drivers/ssb/sprom.c
|
||||
@@ -2,7 +2,7 @@
|
||||
|
@ -1356,7 +1607,7 @@
|
|||
u8 rssisav2g; /* 2GHz RSSI params */
|
||||
u8 rssismc2g;
|
||||
u8 rssismf2g;
|
||||
@@ -80,26 +91,104 @@ struct ssb_sprom {
|
||||
@@ -80,26 +91,103 @@ struct ssb_sprom {
|
||||
u16 boardflags2_hi; /* Board flags (bits 48-63) */
|
||||
/* TODO store board flags in a single u64 */
|
||||
|
||||
|
@ -1465,11 +1716,10 @@
|
|||
u16 vendor;
|
||||
u16 type;
|
||||
- u16 rev;
|
||||
+ u8 rev;
|
||||
};
|
||||
|
||||
|
||||
@@ -229,10 +318,9 @@ struct ssb_driver {
|
||||
@@ -229,10 +317,9 @@ struct ssb_driver {
|
||||
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
|
||||
|
||||
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
|
||||
|
@ -1483,7 +1733,7 @@
|
|||
extern void ssb_driver_unregister(struct ssb_driver *drv);
|
||||
|
||||
|
||||
@@ -308,7 +396,7 @@ struct ssb_bus {
|
||||
@@ -308,7 +395,7 @@ struct ssb_bus {
|
||||
|
||||
/* ID information about the Chip. */
|
||||
u16 chip_id;
|
||||
|
@ -1492,7 +1742,7 @@
|
|||
u16 sprom_offset;
|
||||
u16 sprom_size; /* number of words in sprom */
|
||||
u8 chip_package;
|
||||
@@ -404,7 +492,9 @@ extern bool ssb_is_sprom_available(struc
|
||||
@@ -404,7 +491,9 @@ extern bool ssb_is_sprom_available(struc
|
||||
|
||||
/* Set a fallback SPROM.
|
||||
* See kdoc at the function definition for complete documentation. */
|
||||
|
@ -1503,7 +1753,7 @@
|
|||
|
||||
/* Suspend a SSB bus.
|
||||
* Call this from the parent bus suspend routine. */
|
||||
@@ -518,6 +608,7 @@ extern int ssb_bus_may_powerdown(struct
|
||||
@@ -518,6 +607,7 @@ extern int ssb_bus_may_powerdown(struct
|
||||
* Otherwise static always-on powercontrol will be used. */
|
||||
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
|
||||
|
||||
|
@ -1554,6 +1804,16 @@
|
|||
#define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
|
||||
#define SSB_CHIPCO_UART0_DATA 0x0300
|
||||
#define SSB_CHIPCO_UART0_IMR 0x0304
|
||||
--- a/include/linux/ssb/ssb_driver_gige.h
|
||||
+++ b/include/linux/ssb/ssb_driver_gige.h
|
||||
@@ -2,6 +2,7 @@
|
||||
#define LINUX_SSB_DRIVER_GIGE_H_
|
||||
|
||||
#include <linux/ssb/ssb.h>
|
||||
+#include <linux/bug.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
--- a/include/linux/ssb/ssb_regs.h
|
||||
+++ b/include/linux/ssb/ssb_regs.h
|
||||
@@ -97,7 +97,7 @@
|
||||
|
@ -1565,8 +1825,53 @@
|
|||
#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
|
||||
#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
|
||||
#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
|
||||
@@ -432,6 +432,56 @@
|
||||
@@ -228,6 +228,7 @@
|
||||
#define SSB_SPROM1_AGAIN_BG_SHIFT 0
|
||||
#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */
|
||||
#define SSB_SPROM1_AGAIN_A_SHIFT 8
|
||||
+#define SSB_SPROM1_CCODE 0x0076
|
||||
|
||||
/* SPROM Revision 2 (inherits from rev 1) */
|
||||
#define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */
|
||||
@@ -267,6 +268,7 @@
|
||||
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
|
||||
|
||||
/* SPROM Revision 4 */
|
||||
+#define SSB_SPROM4_BOARDREV 0x0042 /* Board revision */
|
||||
#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
|
||||
#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
|
||||
#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
|
||||
@@ -389,6 +391,11 @@
|
||||
#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
|
||||
#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
|
||||
#define SSB_SPROM8_GPIOB_P3_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC 0x009A
|
||||
+#define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */
|
||||
+#define SSB_SPROM8_LEDDC_ON_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */
|
||||
+#define SSB_SPROM8_LEDDC_OFF_SHIFT 0
|
||||
#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
|
||||
#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
|
||||
#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
|
||||
@@ -404,6 +411,13 @@
|
||||
#define SSB_SPROM8_AGAIN2_SHIFT 0
|
||||
#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
|
||||
#define SSB_SPROM8_AGAIN3_SHIFT 8
|
||||
+#define SSB_SPROM8_TXRXC 0x00A2
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN 0x000f
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH 0xff00
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8
|
||||
#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
|
||||
#define SSB_SPROM8_RSSISMF2G 0x000F
|
||||
#define SSB_SPROM8_RSSISMC2G 0x00F0
|
||||
@@ -430,8 +444,87 @@
|
||||
#define SSB_SPROM8_TRI5GH_SHIFT 8
|
||||
#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
|
||||
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
|
||||
+#define SSB_SPROM8_RXPO2G_SHIFT 0
|
||||
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
|
||||
#define SSB_SPROM8_RXPO5G_SHIFT 8
|
||||
+#define SSB_SPROM8_FEM2G 0x00AE
|
||||
|
@ -1582,10 +1887,38 @@
|
|||
+#define SSB_SROM8_FEM_ANTSWLUT 0xF800
|
||||
+#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
|
||||
+#define SSB_SPROM8_THERMAL 0x00B2
|
||||
+#define SSB_SPROM8_MPWR_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET 0x00ff
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0
|
||||
+#define SSB_SPROM8_THERMAL_TRESH 0xff00
|
||||
+#define SSB_SPROM8_THERMAL_TRESH_SHIFT 8
|
||||
+/* Temp sense related entries */
|
||||
+#define SSB_SPROM8_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9
|
||||
+#define SSB_SPROM8_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8
|
||||
+/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
|
||||
+#define SSB_SPROM8_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12
|
||||
+
|
||||
+/* There are 4 blocks with power info sharing the same layout */
|
||||
+#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
|
||||
|
@ -1622,7 +1955,7 @@
|
|||
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
|
||||
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
|
||||
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
|
||||
@@ -456,12 +506,53 @@
|
||||
@@ -456,12 +549,63 @@
|
||||
#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
|
||||
#define SSB_SPROM8_PA1HIB1 0x00DA
|
||||
#define SSB_SPROM8_PA1HIB2 0x00DC
|
||||
|
@ -1633,6 +1966,16 @@
|
|||
#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
|
||||
|
||||
+#define SSB_SPROM8_2G_MCSPO 0x0152
|
||||
+#define SSB_SPROM8_5G_MCSPO 0x0162
|
||||
+#define SSB_SPROM8_5GL_MCSPO 0x0172
|
||||
+#define SSB_SPROM8_5GH_MCSPO 0x0182
|
||||
+
|
||||
+#define SSB_SPROM8_CDDPO 0x0192
|
||||
+#define SSB_SPROM8_STBCPO 0x0194
|
||||
+#define SSB_SPROM8_BW40PO 0x0196
|
||||
+#define SSB_SPROM8_BWDUPPO 0x0198
|
||||
+
|
||||
+/* Values for boardflags_lo read from SPROM */
|
||||
+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
|
||||
+#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
|
||||
|
@ -1676,133 +2019,3 @@
|
|||
/* Values for SSB_SPROM1_BINF_CCODE */
|
||||
enum {
|
||||
SSB_SPROM1CCODE_WORLD = 0,
|
||||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -5,12 +5,13 @@
|
||||
* because of its small size we include it in the SSB core
|
||||
* instead of creating a standalone module.
|
||||
*
|
||||
- * Copyright 2007 Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2007 Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
+#include <linux/module.h>
|
||||
#include <linux/ssb/ssb.h>
|
||||
|
||||
#include "ssb_private.h"
|
||||
--- a/drivers/ssb/driver_extif.c
|
||||
+++ b/drivers/ssb/driver_extif.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* Broadcom EXTIF core driver
|
||||
*
|
||||
* Copyright 2005, Broadcom Corporation
|
||||
- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
|
||||
* Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
|
||||
* Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
|
||||
*
|
||||
--- a/drivers/ssb/driver_mipscore.c
|
||||
+++ b/drivers/ssb/driver_mipscore.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* Broadcom MIPS core driver
|
||||
*
|
||||
* Copyright 2005, Broadcom Corporation
|
||||
- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
@@ -208,6 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
|
||||
struct ssb_bus *bus = mcore->dev->bus;
|
||||
u32 pll_type, n, m, rate = 0;
|
||||
|
||||
+ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
|
||||
+ return ssb_pmu_get_cpu_clock(&bus->chipco);
|
||||
+
|
||||
if (bus->extif.dev) {
|
||||
ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
|
||||
} else if (bus->chipco.dev) {
|
||||
--- a/drivers/ssb/embedded.c
|
||||
+++ b/drivers/ssb/embedded.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* Embedded systems support code
|
||||
*
|
||||
* Copyright 2005-2008, Broadcom Corporation
|
||||
- * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2006-2008, Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
--- a/drivers/ssb/pcmcia.c
|
||||
+++ b/drivers/ssb/pcmcia.c
|
||||
@@ -3,7 +3,7 @@
|
||||
* PCMCIA-Hostbus related functions
|
||||
*
|
||||
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
|
||||
- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
@@ -676,14 +676,10 @@ static int ssb_pcmcia_do_get_invariants(
|
||||
case SSB_PCMCIA_CIS_ANTGAIN:
|
||||
GOTO_ERROR_ON(tuple->TupleDataLen != 2,
|
||||
"antg tpl size");
|
||||
- sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1];
|
||||
- sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a0 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a1 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a2 = tuple->TupleData[1];
|
||||
+ sprom->antenna_gain.a3 = tuple->TupleData[1];
|
||||
break;
|
||||
case SSB_PCMCIA_CIS_BFLAGS:
|
||||
GOTO_ERROR_ON((tuple->TupleDataLen != 3) &&
|
||||
--- a/drivers/ssb/sdio.c
|
||||
+++ b/drivers/ssb/sdio.c
|
||||
@@ -6,7 +6,7 @@
|
||||
*
|
||||
* Based on drivers/ssb/pcmcia.c
|
||||
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
|
||||
- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
|
||||
+ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*
|
||||
@@ -551,14 +551,10 @@ int ssb_sdio_get_invariants(struct ssb_b
|
||||
case SSB_SDIO_CIS_ANTGAIN:
|
||||
GOTO_ERROR_ON(tuple->size != 2,
|
||||
"antg tpl size");
|
||||
- sprom->antenna_gain.ghz24.a0 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz24.a1 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz24.a2 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz24.a3 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a0 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a1 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a2 = tuple->data[1];
|
||||
- sprom->antenna_gain.ghz5.a3 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a0 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a1 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a2 = tuple->data[1];
|
||||
+ sprom->antenna_gain.a3 = tuple->data[1];
|
||||
break;
|
||||
case SSB_SDIO_CIS_BFLAGS:
|
||||
GOTO_ERROR_ON((tuple->size != 3) &&
|
||||
--- a/include/linux/ssb/ssb_driver_gige.h
|
||||
+++ b/include/linux/ssb/ssb_driver_gige.h
|
||||
@@ -2,6 +2,7 @@
|
||||
#define LINUX_SSB_DRIVER_GIGE_H_
|
||||
|
||||
#include <linux/ssb/ssb.h>
|
||||
+#include <linux/bug.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
|
|
|
@ -1,11 +0,0 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -29,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
File diff suppressed because it is too large
Load diff
|
@ -1,14 +1,3 @@
|
|||
--- a/drivers/ssb/driver_pcicore.c
|
||||
+++ b/drivers/ssb/driver_pcicore.c
|
||||
@@ -74,7 +74,7 @@ static u32 get_cfgspace_addr(struct ssb_
|
||||
u32 tmp;
|
||||
|
||||
/* We do only have one cardbus device behind the bridge. */
|
||||
- if (pc->cardbusmode && (dev >= 1))
|
||||
+ if (pc->cardbusmode && (dev > 1))
|
||||
goto out;
|
||||
|
||||
if (bus == 0) {
|
||||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -11,6 +11,7 @@
|
||||
|
@ -19,6 +8,15 @@
|
|||
#include <linux/ssb/ssb.h>
|
||||
|
||||
#include "ssb_private.h"
|
||||
@@ -28,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
||||
--- a/drivers/ssb/driver_chipcommon_pmu.c
|
||||
+++ b/drivers/ssb/driver_chipcommon_pmu.c
|
||||
@@ -12,6 +12,9 @@
|
||||
|
@ -114,6 +112,17 @@
|
|||
if (bus->extif.dev) {
|
||||
ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
|
||||
} else if (bus->chipco.dev) {
|
||||
--- a/drivers/ssb/driver_pcicore.c
|
||||
+++ b/drivers/ssb/driver_pcicore.c
|
||||
@@ -74,7 +74,7 @@ static u32 get_cfgspace_addr(struct ssb_
|
||||
u32 tmp;
|
||||
|
||||
/* We do only have one cardbus device behind the bridge. */
|
||||
- if (pc->cardbusmode && (dev >= 1))
|
||||
+ if (pc->cardbusmode && (dev > 1))
|
||||
goto out;
|
||||
|
||||
if (bus == 0) {
|
||||
--- a/drivers/ssb/main.c
|
||||
+++ b/drivers/ssb/main.c
|
||||
@@ -12,6 +12,7 @@
|
||||
|
@ -216,7 +225,26 @@
|
|||
}
|
||||
--- a/drivers/ssb/pci.c
|
||||
+++ b/drivers/ssb/pci.c
|
||||
@@ -331,7 +331,6 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -178,6 +178,18 @@ err_pci:
|
||||
#define SPEX(_outvar, _offset, _mask, _shift) \
|
||||
SPEX16(_outvar, _offset, _mask, _shift)
|
||||
|
||||
+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
|
||||
+ do { \
|
||||
+ SPEX(_field[0], _offset + 0, _mask, _shift); \
|
||||
+ SPEX(_field[1], _offset + 2, _mask, _shift); \
|
||||
+ SPEX(_field[2], _offset + 4, _mask, _shift); \
|
||||
+ SPEX(_field[3], _offset + 6, _mask, _shift); \
|
||||
+ SPEX(_field[4], _offset + 8, _mask, _shift); \
|
||||
+ SPEX(_field[5], _offset + 10, _mask, _shift); \
|
||||
+ SPEX(_field[6], _offset + 12, _mask, _shift); \
|
||||
+ SPEX(_field[7], _offset + 14, _mask, _shift); \
|
||||
+ } while (0)
|
||||
+
|
||||
|
||||
static inline u8 ssb_crc8(u8 crc, u8 data)
|
||||
{
|
||||
@@ -331,7 +343,6 @@ static void sprom_extract_r123(struct ss
|
||||
{
|
||||
int i;
|
||||
u16 v;
|
||||
|
@ -224,8 +252,24 @@
|
|||
u16 loc[3];
|
||||
|
||||
if (out->revision == 3) /* rev 3 moved MAC */
|
||||
@@ -390,20 +389,12 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -361,8 +372,9 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
|
||||
SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
|
||||
SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
|
||||
- SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
- SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
+ if (out->revision == 1)
|
||||
+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
+ SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
|
||||
SSB_SPROM1_BINF_ANTA_SHIFT);
|
||||
SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
|
||||
@@ -388,22 +400,16 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
|
||||
if (out->revision >= 2)
|
||||
SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
- gain = r123_extract_antgain(out->revision, in,
|
||||
|
@ -251,7 +295,27 @@
|
|||
}
|
||||
|
||||
/* Revs 4 5 and 8 have partially shared layout */
|
||||
@@ -504,16 +495,14 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -464,14 +470,17 @@ static void sprom_extract_r45(struct ssb
|
||||
SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
|
||||
SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
|
||||
SSB_SPROM4_ETHPHY_ET1A_SHIFT);
|
||||
+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
|
||||
if (out->revision == 4) {
|
||||
- SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
|
||||
SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
|
||||
} else {
|
||||
- SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
|
||||
@@ -504,16 +513,14 @@ static void sprom_extract_r45(struct ssb
|
||||
}
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -272,7 +336,7 @@
|
|||
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
@@ -523,7 +512,13 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -523,14 +530,22 @@ static void sprom_extract_r45(struct ssb
|
||||
static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
|
||||
{
|
||||
int i;
|
||||
|
@ -287,7 +351,17 @@
|
|||
|
||||
/* extract the MAC address */
|
||||
for (i = 0; i < 3; i++) {
|
||||
@@ -596,16 +591,69 @@ static void sprom_extract_r8(struct ssb_
|
||||
v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
|
||||
*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
|
||||
}
|
||||
- SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
|
||||
@@ -596,17 +611,127 @@ static void sprom_extract_r8(struct ssb_
|
||||
SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -305,7 +379,7 @@
|
|||
SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
|
||||
- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
|
||||
- sizeof(out->antenna_gain.ghz5));
|
||||
+
|
||||
|
||||
+ /* Extract cores power info info */
|
||||
+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
|
||||
+ o = pwr_info_offset[i];
|
||||
|
@ -360,9 +434,75 @@
|
|||
+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
|
||||
+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
|
||||
+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
|
||||
|
||||
+
|
||||
+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
|
||||
+ SSB_SPROM8_LEDDC_ON_SHIFT);
|
||||
+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
|
||||
+ SSB_SPROM8_LEDDC_OFF_SHIFT);
|
||||
+
|
||||
+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
|
||||
+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
|
||||
+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
|
||||
+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
|
||||
+
|
||||
+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
|
||||
+
|
||||
+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
|
||||
+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
|
||||
+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
|
||||
+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
|
||||
+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
|
||||
+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
|
||||
+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
|
||||
+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
|
||||
+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
|
||||
+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
|
||||
+
|
||||
+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
|
||||
+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
|
||||
+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
|
||||
+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
|
||||
+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
|
||||
+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
|
||||
+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
|
||||
+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
|
||||
+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
|
||||
+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
|
||||
+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
/* TODO - get remaining rev 8 stuff needed */
|
||||
@@ -736,7 +861,6 @@ static void ssb_pci_get_boardinfo(struct
|
||||
{
|
||||
bi->vendor = bus->host_pci->subsystem_vendor;
|
||||
bi->type = bus->host_pci->subsystem_device;
|
||||
- bi->rev = bus->host_pci->revision;
|
||||
}
|
||||
|
||||
int ssb_pci_get_invariants(struct ssb_bus *bus,
|
||||
--- a/drivers/ssb/pcmcia.c
|
||||
+++ b/drivers/ssb/pcmcia.c
|
||||
@@ -676,14 +676,10 @@ static int ssb_pcmcia_do_get_invariants(
|
||||
|
@ -486,7 +626,7 @@
|
|||
u8 rssisav2g; /* 2GHz RSSI params */
|
||||
u8 rssismc2g;
|
||||
u8 rssismf2g;
|
||||
@@ -82,19 +91,97 @@ struct ssb_sprom {
|
||||
@@ -82,26 +91,103 @@ struct ssb_sprom {
|
||||
u16 boardflags2_hi; /* Board flags (bits 48-63) */
|
||||
/* TODO store board flags in a single u64 */
|
||||
|
||||
|
@ -591,7 +731,14 @@
|
|||
};
|
||||
|
||||
/* Information about the PCB the circuitry is soldered on. */
|
||||
@@ -231,10 +318,9 @@ struct ssb_driver {
|
||||
struct ssb_boardinfo {
|
||||
u16 vendor;
|
||||
u16 type;
|
||||
- u8 rev;
|
||||
};
|
||||
|
||||
|
||||
@@ -231,10 +317,9 @@ struct ssb_driver {
|
||||
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
|
||||
|
||||
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
|
||||
|
@ -617,8 +764,53 @@
|
|||
|
||||
--- a/include/linux/ssb/ssb_regs.h
|
||||
+++ b/include/linux/ssb/ssb_regs.h
|
||||
@@ -432,6 +432,56 @@
|
||||
@@ -228,6 +228,7 @@
|
||||
#define SSB_SPROM1_AGAIN_BG_SHIFT 0
|
||||
#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */
|
||||
#define SSB_SPROM1_AGAIN_A_SHIFT 8
|
||||
+#define SSB_SPROM1_CCODE 0x0076
|
||||
|
||||
/* SPROM Revision 2 (inherits from rev 1) */
|
||||
#define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */
|
||||
@@ -267,6 +268,7 @@
|
||||
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
|
||||
|
||||
/* SPROM Revision 4 */
|
||||
+#define SSB_SPROM4_BOARDREV 0x0042 /* Board revision */
|
||||
#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
|
||||
#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
|
||||
#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
|
||||
@@ -389,6 +391,11 @@
|
||||
#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
|
||||
#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
|
||||
#define SSB_SPROM8_GPIOB_P3_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC 0x009A
|
||||
+#define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */
|
||||
+#define SSB_SPROM8_LEDDC_ON_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */
|
||||
+#define SSB_SPROM8_LEDDC_OFF_SHIFT 0
|
||||
#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
|
||||
#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
|
||||
#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
|
||||
@@ -404,6 +411,13 @@
|
||||
#define SSB_SPROM8_AGAIN2_SHIFT 0
|
||||
#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
|
||||
#define SSB_SPROM8_AGAIN3_SHIFT 8
|
||||
+#define SSB_SPROM8_TXRXC 0x00A2
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN 0x000f
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH 0xff00
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8
|
||||
#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
|
||||
#define SSB_SPROM8_RSSISMF2G 0x000F
|
||||
#define SSB_SPROM8_RSSISMC2G 0x00F0
|
||||
@@ -430,8 +444,87 @@
|
||||
#define SSB_SPROM8_TRI5GH_SHIFT 8
|
||||
#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
|
||||
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
|
||||
+#define SSB_SPROM8_RXPO2G_SHIFT 0
|
||||
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
|
||||
#define SSB_SPROM8_RXPO5G_SHIFT 8
|
||||
+#define SSB_SPROM8_FEM2G 0x00AE
|
||||
|
@ -634,10 +826,38 @@
|
|||
+#define SSB_SROM8_FEM_ANTSWLUT 0xF800
|
||||
+#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
|
||||
+#define SSB_SPROM8_THERMAL 0x00B2
|
||||
+#define SSB_SPROM8_MPWR_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET 0x00ff
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0
|
||||
+#define SSB_SPROM8_THERMAL_TRESH 0xff00
|
||||
+#define SSB_SPROM8_THERMAL_TRESH_SHIFT 8
|
||||
+/* Temp sense related entries */
|
||||
+#define SSB_SPROM8_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9
|
||||
+#define SSB_SPROM8_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8
|
||||
+/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
|
||||
+#define SSB_SPROM8_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12
|
||||
+
|
||||
+/* There are 4 blocks with power info sharing the same layout */
|
||||
+#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
|
||||
|
@ -674,7 +894,7 @@
|
|||
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
|
||||
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
|
||||
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
|
||||
@@ -456,12 +506,53 @@
|
||||
@@ -456,12 +549,63 @@
|
||||
#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
|
||||
#define SSB_SPROM8_PA1HIB1 0x00DA
|
||||
#define SSB_SPROM8_PA1HIB2 0x00DC
|
||||
|
@ -685,6 +905,16 @@
|
|||
#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
|
||||
|
||||
+#define SSB_SPROM8_2G_MCSPO 0x0152
|
||||
+#define SSB_SPROM8_5G_MCSPO 0x0162
|
||||
+#define SSB_SPROM8_5GL_MCSPO 0x0172
|
||||
+#define SSB_SPROM8_5GH_MCSPO 0x0182
|
||||
+
|
||||
+#define SSB_SPROM8_CDDPO 0x0192
|
||||
+#define SSB_SPROM8_STBCPO 0x0194
|
||||
+#define SSB_SPROM8_BW40PO 0x0196
|
||||
+#define SSB_SPROM8_BWDUPPO 0x0198
|
||||
+
|
||||
+/* Values for boardflags_lo read from SPROM */
|
||||
+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
|
||||
+#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
|
||||
|
|
|
@ -1,11 +0,0 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -29,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
|
@ -91,7 +91,24 @@
|
|||
#endif
|
||||
--- a/drivers/bcma/core.c
|
||||
+++ b/drivers/bcma/core.c
|
||||
@@ -110,6 +110,8 @@ EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
|
||||
@@ -29,6 +29,7 @@ void bcma_core_disable(struct bcma_devic
|
||||
udelay(10);
|
||||
|
||||
bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
|
||||
+ bcma_aread32(core, BCMA_RESET_CTL);
|
||||
udelay(1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_disable);
|
||||
@@ -76,7 +77,7 @@ void bcma_core_set_clockmode(struct bcma
|
||||
pr_err("HT force timeout\n");
|
||||
break;
|
||||
case BCMA_CLKMODE_DYNAMIC:
|
||||
- pr_warn("Dynamic clockmode not supported yet!\n");
|
||||
+ bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -110,6 +111,8 @@ EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
|
||||
u32 bcma_core_dma_translation(struct bcma_device *core)
|
||||
{
|
||||
switch (core->bus->hosttype) {
|
||||
|
@ -676,7 +693,7 @@
|
|||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
@@ -15,40 +16,41 @@
|
||||
@@ -15,40 +16,39 @@
|
||||
* R/W ops.
|
||||
**************************************************/
|
||||
|
||||
|
@ -691,7 +708,7 @@
|
|||
+ return pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_DATA);
|
||||
}
|
||||
|
||||
#if 0
|
||||
-#if 0
|
||||
static void bcma_pcie_write(struct bcma_drv_pci *pc, u32 address, u32 data)
|
||||
{
|
||||
- pcicore_write32(pc, 0x130, address);
|
||||
|
@ -701,7 +718,7 @@
|
|||
+ pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_ADDR);
|
||||
+ pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
#endif
|
||||
-#endif
|
||||
|
||||
static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
{
|
||||
|
@ -734,7 +751,7 @@
|
|||
break;
|
||||
msleep(1);
|
||||
}
|
||||
@@ -56,79 +58,84 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
@@ -56,79 +56,84 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
|
||||
static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
{
|
||||
|
@ -850,7 +867,7 @@
|
|||
}
|
||||
|
||||
/**************************************************
|
||||
@@ -137,67 +144,53 @@ static void bcma_pcie_mdio_write(struct
|
||||
@@ -137,67 +142,90 @@ static void bcma_pcie_mdio_write(struct
|
||||
|
||||
static u8 bcma_pcicore_polarity_workaround(struct bcma_drv_pci *pc)
|
||||
{
|
||||
|
@ -885,6 +902,41 @@
|
|||
+ bcma_pcie_mdio_write(pc, BCMA_CORE_PCI_MDIODATA_DEV_PLL,
|
||||
+ BCMA_CORE_PCI_SERDES_PLL_CTRL,
|
||||
+ tmp & ~BCMA_CORE_PCI_PLL_CTRL_FREQDET_EN);
|
||||
+}
|
||||
+
|
||||
+static void bcma_core_pci_fixcfg(struct bcma_drv_pci *pc)
|
||||
+{
|
||||
+ struct bcma_device *core = pc->core;
|
||||
+ u16 val16, core_index;
|
||||
+ uint regoff;
|
||||
+
|
||||
+ regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_PI_OFFSET);
|
||||
+ core_index = (u16)core->core_index;
|
||||
+
|
||||
+ val16 = pcicore_read16(pc, regoff);
|
||||
+ if (((val16 & BCMA_CORE_PCI_SPROM_PI_MASK) >> BCMA_CORE_PCI_SPROM_PI_SHIFT)
|
||||
+ != core_index) {
|
||||
+ val16 = (core_index << BCMA_CORE_PCI_SPROM_PI_SHIFT) |
|
||||
+ (val16 & ~BCMA_CORE_PCI_SPROM_PI_MASK);
|
||||
+ pcicore_write16(pc, regoff, val16);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+/* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */
|
||||
+/* Needs to happen when coming out of 'standby'/'hibernate' */
|
||||
+static void bcma_core_pci_config_fixup(struct bcma_drv_pci *pc)
|
||||
+{
|
||||
+ u16 val16;
|
||||
+ uint regoff;
|
||||
+
|
||||
+ regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_MISC_CONFIG);
|
||||
+
|
||||
+ val16 = pcicore_read16(pc, regoff);
|
||||
+
|
||||
+ if (!(val16 & BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST)) {
|
||||
+ val16 |= BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST;
|
||||
+ pcicore_write16(pc, regoff, val16);
|
||||
+ }
|
||||
}
|
||||
|
||||
/**************************************************
|
||||
|
@ -894,7 +946,9 @@
|
|||
-static void bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
|
||||
+static void __devinit bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
|
||||
{
|
||||
+ bcma_core_pci_fixcfg(pc);
|
||||
bcma_pcicore_serdes_workaround(pc);
|
||||
+ bcma_core_pci_config_fixup(pc);
|
||||
}
|
||||
|
||||
-static bool bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc)
|
||||
|
@ -902,7 +956,9 @@
|
|||
{
|
||||
- struct bcma_bus *bus = pc->core->bus;
|
||||
- u16 chipid_top;
|
||||
-
|
||||
+ if (pc->setup_done)
|
||||
+ return;
|
||||
|
||||
- chipid_top = (bus->chipinfo.id & 0xFF00);
|
||||
- if (chipid_top != 0x4700 &&
|
||||
- chipid_top != 0x5300)
|
||||
|
@ -922,9 +978,7 @@
|
|||
-
|
||||
- return true;
|
||||
-}
|
||||
+ if (pc->setup_done)
|
||||
+ return;
|
||||
|
||||
-
|
||||
-void bcma_core_pci_init(struct bcma_drv_pci *pc)
|
||||
-{
|
||||
- if (bcma_core_pci_is_in_hostmode(pc)) {
|
||||
|
@ -943,7 +997,7 @@
|
|||
}
|
||||
|
||||
int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, struct bcma_device *core,
|
||||
@@ -205,7 +198,14 @@ int bcma_core_pci_irq_ctl(struct bcma_dr
|
||||
@@ -205,7 +233,14 @@ int bcma_core_pci_irq_ctl(struct bcma_dr
|
||||
{
|
||||
struct pci_dev *pdev = pc->core->bus->host_pci;
|
||||
u32 coremask, tmp;
|
||||
|
@ -959,6 +1013,24 @@
|
|||
|
||||
err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
|
||||
if (err)
|
||||
@@ -223,3 +258,17 @@ out:
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
+
|
||||
+void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+{
|
||||
+ u32 w;
|
||||
+
|
||||
+ w = bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
+ if (extend)
|
||||
+ w |= BCMA_CORE_PCI_ASPMTIMER_EXTEND;
|
||||
+ else
|
||||
+ w &= ~BCMA_CORE_PCI_ASPMTIMER_EXTEND;
|
||||
+ bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
+ bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
--- a/drivers/bcma/driver_pci_host.c
|
||||
+++ b/drivers/bcma/driver_pci_host.c
|
||||
@@ -2,13 +2,587 @@
|
||||
|
@ -1083,7 +1155,7 @@
|
|||
+ if (unlikely(!addr))
|
||||
+ goto out;
|
||||
+ err = -ENOMEM;
|
||||
+ mmio = ioremap_nocache(addr, len);
|
||||
+ mmio = ioremap_nocache(addr, sizeof(val));
|
||||
+ if (!mmio)
|
||||
+ goto out;
|
||||
+
|
||||
|
@ -1135,7 +1207,7 @@
|
|||
+ addr = pc->core->addr + BCMA_CORE_PCI_PCICFG0;
|
||||
+ addr |= (func << 8);
|
||||
+ addr |= (off & 0xfc);
|
||||
+ mmio = ioremap_nocache(addr, len);
|
||||
+ mmio = ioremap_nocache(addr, sizeof(val));
|
||||
+ if (!mmio)
|
||||
+ goto out;
|
||||
+ }
|
||||
|
@ -1144,7 +1216,7 @@
|
|||
+ if (unlikely(!addr))
|
||||
+ goto out;
|
||||
+ err = -ENOMEM;
|
||||
+ mmio = ioremap_nocache(addr, len);
|
||||
+ mmio = ioremap_nocache(addr, sizeof(val));
|
||||
+ if (!mmio)
|
||||
+ goto out;
|
||||
+
|
||||
|
@ -1455,8 +1527,8 @@
|
|||
+ /* Ok, ready to run, register it to the system.
|
||||
+ * The following needs change, if we want to port hostmode
|
||||
+ * to non-MIPS platform. */
|
||||
+ io_map_base = (unsigned long)ioremap_nocache(BCMA_SOC_PCI_MEM,
|
||||
+ 0x04000000);
|
||||
+ io_map_base = (unsigned long)ioremap_nocache(pc_host->mem_resource.start,
|
||||
+ resource_size(&pc_host->mem_resource));
|
||||
+ pc_host->pci_controller.io_map_base = io_map_base;
|
||||
+ set_io_port_base(pc_host->pci_controller.io_map_base);
|
||||
+ /* Give some time to the PCI controller to configure itself with the new
|
||||
|
@ -1643,7 +1715,26 @@
|
|||
{
|
||||
struct bcma_bus *bus;
|
||||
int err = -ENOMEM;
|
||||
@@ -223,6 +234,35 @@ static void bcma_host_pci_remove(struct
|
||||
@@ -190,6 +201,9 @@ static int bcma_host_pci_probe(struct pc
|
||||
bus->hosttype = BCMA_HOSTTYPE_PCI;
|
||||
bus->ops = &bcma_host_pci_ops;
|
||||
|
||||
+ bus->boardinfo.vendor = bus->host_pci->subsystem_vendor;
|
||||
+ bus->boardinfo.type = bus->host_pci->subsystem_device;
|
||||
+
|
||||
/* Register */
|
||||
err = bcma_bus_register(bus);
|
||||
if (err)
|
||||
@@ -211,7 +225,7 @@ err_kfree_bus:
|
||||
return err;
|
||||
}
|
||||
|
||||
-static void bcma_host_pci_remove(struct pci_dev *dev)
|
||||
+static void __devexit bcma_host_pci_remove(struct pci_dev *dev)
|
||||
{
|
||||
struct bcma_bus *bus = pci_get_drvdata(dev);
|
||||
|
||||
@@ -223,6 +237,35 @@ static void bcma_host_pci_remove(struct
|
||||
pci_set_drvdata(dev, NULL);
|
||||
}
|
||||
|
||||
|
@ -1679,10 +1770,12 @@
|
|||
static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
|
||||
@@ -238,6 +278,7 @@ static struct pci_driver bcma_pci_bridge
|
||||
@@ -237,7 +280,8 @@ static struct pci_driver bcma_pci_bridge
|
||||
.name = "bcma-pci-bridge",
|
||||
.id_table = bcma_pci_bridge_tbl,
|
||||
.probe = bcma_host_pci_probe,
|
||||
.remove = bcma_host_pci_remove,
|
||||
- .remove = bcma_host_pci_remove,
|
||||
+ .remove = __devexit_p(bcma_host_pci_remove),
|
||||
+ .driver.pm = BCMA_PM_OPS,
|
||||
};
|
||||
|
||||
|
@ -2092,7 +2185,104 @@
|
|||
drv->drv.name = drv->name;
|
||||
--- a/drivers/bcma/scan.c
|
||||
+++ b/drivers/bcma/scan.c
|
||||
@@ -200,18 +200,174 @@ static s32 bcma_erom_get_addr_desc(struc
|
||||
@@ -19,7 +19,14 @@ struct bcma_device_id_name {
|
||||
u16 id;
|
||||
const char *name;
|
||||
};
|
||||
-struct bcma_device_id_name bcma_device_names[] = {
|
||||
+
|
||||
+static const struct bcma_device_id_name bcma_arm_device_names[] = {
|
||||
+ { BCMA_CORE_ARM_1176, "ARM 1176" },
|
||||
+ { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
|
||||
+ { BCMA_CORE_ARM_CM3, "ARM CM3" },
|
||||
+};
|
||||
+
|
||||
+static const struct bcma_device_id_name bcma_bcm_device_names[] = {
|
||||
{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
|
||||
{ BCMA_CORE_INVALID, "Invalid" },
|
||||
{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
|
||||
@@ -27,7 +34,6 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_SRAM, "SRAM" },
|
||||
{ BCMA_CORE_SDRAM, "SDRAM" },
|
||||
{ BCMA_CORE_PCI, "PCI" },
|
||||
- { BCMA_CORE_MIPS, "MIPS" },
|
||||
{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
|
||||
{ BCMA_CORE_V90, "V90" },
|
||||
{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
|
||||
@@ -44,7 +50,6 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_PHY_A, "PHY A" },
|
||||
{ BCMA_CORE_PHY_B, "PHY B" },
|
||||
{ BCMA_CORE_PHY_G, "PHY G" },
|
||||
- { BCMA_CORE_MIPS_3302, "MIPS 3302" },
|
||||
{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
|
||||
{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
|
||||
{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
|
||||
@@ -58,15 +63,11 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_PHY_N, "PHY N" },
|
||||
{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
|
||||
{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
|
||||
- { BCMA_CORE_ARM_1176, "ARM 1176" },
|
||||
- { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
|
||||
{ BCMA_CORE_PHY_LP, "PHY LP" },
|
||||
{ BCMA_CORE_PMU, "PMU" },
|
||||
{ BCMA_CORE_PHY_SSN, "PHY SSN" },
|
||||
{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
|
||||
- { BCMA_CORE_ARM_CM3, "ARM CM3" },
|
||||
{ BCMA_CORE_PHY_HT, "PHY HT" },
|
||||
- { BCMA_CORE_MIPS_74K, "MIPS 74K" },
|
||||
{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
|
||||
{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
|
||||
{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
|
||||
@@ -79,16 +80,41 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_SHIM, "SHIM" },
|
||||
{ BCMA_CORE_DEFAULT, "Default" },
|
||||
};
|
||||
-const char *bcma_device_name(struct bcma_device_id *id)
|
||||
+
|
||||
+static const struct bcma_device_id_name bcma_mips_device_names[] = {
|
||||
+ { BCMA_CORE_MIPS, "MIPS" },
|
||||
+ { BCMA_CORE_MIPS_3302, "MIPS 3302" },
|
||||
+ { BCMA_CORE_MIPS_74K, "MIPS 74K" },
|
||||
+};
|
||||
+
|
||||
+static const char *bcma_device_name(const struct bcma_device_id *id)
|
||||
{
|
||||
- int i;
|
||||
+ const struct bcma_device_id_name *names;
|
||||
+ int size, i;
|
||||
|
||||
- if (id->manuf == BCMA_MANUF_BCM) {
|
||||
- for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
|
||||
- if (bcma_device_names[i].id == id->id)
|
||||
- return bcma_device_names[i].name;
|
||||
- }
|
||||
+ /* search manufacturer specific names */
|
||||
+ switch (id->manuf) {
|
||||
+ case BCMA_MANUF_ARM:
|
||||
+ names = bcma_arm_device_names;
|
||||
+ size = ARRAY_SIZE(bcma_arm_device_names);
|
||||
+ break;
|
||||
+ case BCMA_MANUF_BCM:
|
||||
+ names = bcma_bcm_device_names;
|
||||
+ size = ARRAY_SIZE(bcma_bcm_device_names);
|
||||
+ break;
|
||||
+ case BCMA_MANUF_MIPS:
|
||||
+ names = bcma_mips_device_names;
|
||||
+ size = ARRAY_SIZE(bcma_mips_device_names);
|
||||
+ break;
|
||||
+ default:
|
||||
+ return "UNKNOWN";
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < size; i++) {
|
||||
+ if (names[i].id == id->id)
|
||||
+ return names[i].name;
|
||||
}
|
||||
+
|
||||
return "UNKNOWN";
|
||||
}
|
||||
|
||||
@@ -200,18 +226,174 @@ static s32 bcma_erom_get_addr_desc(struc
|
||||
return addrl;
|
||||
}
|
||||
|
||||
|
@ -2272,7 +2462,7 @@
|
|||
|
||||
INIT_LIST_HEAD(&bus->cores);
|
||||
bus->nr_cores = 0;
|
||||
@@ -219,142 +375,133 @@ int bcma_bus_scan(struct bcma_bus *bus)
|
||||
@@ -219,142 +401,133 @@ int bcma_bus_scan(struct bcma_bus *bus)
|
||||
bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
|
||||
|
||||
tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
|
||||
|
@ -2468,7 +2658,7 @@
|
|||
+ } else {
|
||||
+ eromptr = bus->mmio;
|
||||
+ }
|
||||
|
||||
+
|
||||
+ eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
|
||||
+
|
||||
+ bcma_scan_switch_core(bus, erombase);
|
||||
|
@ -2488,7 +2678,7 @@
|
|||
+ break;
|
||||
+ else if (err < 0)
|
||||
+ return err;
|
||||
+
|
||||
|
||||
+ core->core_index = core_num++;
|
||||
+ bus->nr_cores++;
|
||||
pr_info("Core %d found: %s "
|
||||
|
@ -2583,7 +2773,7 @@
|
|||
|
||||
/**************************************************
|
||||
* R/W ops.
|
||||
@@ -124,41 +176,268 @@ static int bcma_sprom_valid(const u16 *s
|
||||
@@ -124,41 +176,418 @@ static int bcma_sprom_valid(const u16 *s
|
||||
* SPROM extraction.
|
||||
**************************************************/
|
||||
|
||||
|
@ -2591,6 +2781,22 @@
|
|||
+
|
||||
+#define SPEX(_field, _offset, _mask, _shift) \
|
||||
+ bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
|
||||
+
|
||||
+#define SPEX32(_field, _offset, _mask, _shift) \
|
||||
+ bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
|
||||
+ sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
|
||||
+
|
||||
+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
|
||||
+ do { \
|
||||
+ SPEX(_field[0], _offset + 0, _mask, _shift); \
|
||||
+ SPEX(_field[1], _offset + 2, _mask, _shift); \
|
||||
+ SPEX(_field[2], _offset + 4, _mask, _shift); \
|
||||
+ SPEX(_field[3], _offset + 6, _mask, _shift); \
|
||||
+ SPEX(_field[4], _offset + 8, _mask, _shift); \
|
||||
+ SPEX(_field[5], _offset + 10, _mask, _shift); \
|
||||
+ SPEX(_field[6], _offset + 12, _mask, _shift); \
|
||||
+ SPEX(_field[7], _offset + 14, _mask, _shift); \
|
||||
+ } while (0)
|
||||
+
|
||||
static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
|
||||
{
|
||||
|
@ -2655,7 +2861,8 @@
|
|||
+ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0);
|
||||
+ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0);
|
||||
+
|
||||
+ SPEX(country_code, SSB_SPROM8_CCODE, ~0, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
|
||||
+
|
||||
+ /* Extract cores power info info */
|
||||
+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
|
||||
|
@ -2710,6 +2917,136 @@
|
|||
+ SSB_SROM8_FEM_TR_ISO_SHIFT);
|
||||
+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT,
|
||||
+ SSB_SROM8_FEM_ANTSWLUT_SHIFT);
|
||||
+
|
||||
+ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
|
||||
+ SSB_SPROM8_ANTAVAIL_A_SHIFT);
|
||||
+ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
|
||||
+ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
|
||||
+ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
|
||||
+ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
|
||||
+ SSB_SPROM8_ITSSI_BG_SHIFT);
|
||||
+ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
|
||||
+ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
|
||||
+ SSB_SPROM8_ITSSI_A_SHIFT);
|
||||
+ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
|
||||
+ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
|
||||
+ SSB_SPROM8_MAXP_AL_SHIFT);
|
||||
+ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
|
||||
+ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
|
||||
+ SSB_SPROM8_GPIOA_P1_SHIFT);
|
||||
+ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
|
||||
+ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
|
||||
+ SSB_SPROM8_GPIOB_P3_SHIFT);
|
||||
+ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
|
||||
+ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
|
||||
+ SSB_SPROM8_TRI5G_SHIFT);
|
||||
+ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
|
||||
+ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
|
||||
+ SSB_SPROM8_TRI5GH_SHIFT);
|
||||
+ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G,
|
||||
+ SSB_SPROM8_RXPO2G_SHIFT);
|
||||
+ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
|
||||
+ SSB_SPROM8_RXPO5G_SHIFT);
|
||||
+ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
|
||||
+ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
|
||||
+ SSB_SPROM8_RSSISMC2G_SHIFT);
|
||||
+ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
|
||||
+ SSB_SPROM8_RSSISAV2G_SHIFT);
|
||||
+ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
|
||||
+ SSB_SPROM8_BXA2G_SHIFT);
|
||||
+ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
|
||||
+ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
|
||||
+ SSB_SPROM8_RSSISMC5G_SHIFT);
|
||||
+ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
|
||||
+ SSB_SPROM8_RSSISAV5G_SHIFT);
|
||||
+ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
|
||||
+ SSB_SPROM8_BXA5G_SHIFT);
|
||||
+
|
||||
+ SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0);
|
||||
+ SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0);
|
||||
+ SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0);
|
||||
+ SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0);
|
||||
+ SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0);
|
||||
+ SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0);
|
||||
+ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0);
|
||||
+ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0);
|
||||
+ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0);
|
||||
+ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0);
|
||||
+ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0);
|
||||
+ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0);
|
||||
+ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0);
|
||||
+ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0);
|
||||
+ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0);
|
||||
+ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0);
|
||||
+ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0);
|
||||
+
|
||||
+ /* Extract the antenna gain values. */
|
||||
+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
|
||||
+ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
|
||||
+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
|
||||
+ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
|
||||
+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
|
||||
+ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
|
||||
+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
|
||||
+ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
|
||||
+
|
||||
+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
|
||||
+ SSB_SPROM8_LEDDC_ON_SHIFT);
|
||||
+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
|
||||
+ SSB_SPROM8_LEDDC_OFF_SHIFT);
|
||||
+
|
||||
+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
|
||||
+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
|
||||
+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
|
||||
+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
|
||||
+
|
||||
+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
|
||||
+
|
||||
+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
|
||||
+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
|
||||
+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
|
||||
+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
|
||||
+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
|
||||
+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
|
||||
+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
|
||||
+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
|
||||
+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
|
||||
+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
|
||||
+
|
||||
+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
|
||||
+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
|
||||
+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
|
||||
+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
|
||||
+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
|
||||
+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
|
||||
+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
|
||||
+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
|
||||
+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
|
||||
+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
|
||||
+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
|
@ -2819,16 +3156,19 @@
|
|||
- if (!(bus->drv_cc.capabilities & BCMA_CC_CAP_SPROM))
|
||||
- return -ENOENT;
|
||||
+ if (!bcma_sprom_ext_available(bus)) {
|
||||
+ bool sprom_onchip;
|
||||
+
|
||||
+ /*
|
||||
+ * External SPROM takes precedence so check
|
||||
+ * on-chip OTP only when no external SPROM
|
||||
+ * is present.
|
||||
+ */
|
||||
+ if (bcma_sprom_onchip_available(bus)) {
|
||||
+ sprom_onchip = bcma_sprom_onchip_available(bus);
|
||||
+ if (sprom_onchip) {
|
||||
+ /* determine offset */
|
||||
+ offset = bcma_sprom_onchip_offset(bus);
|
||||
+ }
|
||||
+ if (!offset) {
|
||||
+ if (!offset || !sprom_onchip) {
|
||||
+ /*
|
||||
+ * Maybe there is no SPROM on the device?
|
||||
+ * Now we ask the arch code if there is some sprom
|
||||
|
@ -2882,7 +3222,19 @@
|
|||
};
|
||||
|
||||
struct bcma_chipinfo {
|
||||
@@ -130,14 +131,19 @@ struct bcma_device {
|
||||
@@ -25,6 +26,11 @@ struct bcma_chipinfo {
|
||||
u8 pkg;
|
||||
};
|
||||
|
||||
+struct bcma_boardinfo {
|
||||
+ u16 vendor;
|
||||
+ u16 type;
|
||||
+};
|
||||
+
|
||||
enum bcma_clkmode {
|
||||
BCMA_CLKMODE_FAST,
|
||||
BCMA_CLKMODE_DYNAMIC,
|
||||
@@ -130,14 +136,19 @@ struct bcma_device {
|
||||
|
||||
struct device dev;
|
||||
struct device *dma_dev;
|
||||
|
@ -2902,7 +3254,7 @@
|
|||
void *drvdata;
|
||||
struct list_head list;
|
||||
};
|
||||
@@ -157,7 +163,7 @@ struct bcma_driver {
|
||||
@@ -157,7 +168,7 @@ struct bcma_driver {
|
||||
|
||||
int (*probe)(struct bcma_device *dev);
|
||||
void (*remove)(struct bcma_device *dev);
|
||||
|
@ -2911,7 +3263,7 @@
|
|||
int (*resume)(struct bcma_device *dev);
|
||||
void (*shutdown)(struct bcma_device *dev);
|
||||
|
||||
@@ -165,12 +171,17 @@ struct bcma_driver {
|
||||
@@ -165,12 +176,17 @@ struct bcma_driver {
|
||||
};
|
||||
extern
|
||||
int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
|
||||
|
@ -2933,7 +3285,12 @@
|
|||
struct bcma_bus {
|
||||
/* The MMIO area. */
|
||||
void __iomem *mmio;
|
||||
@@ -190,71 +201,96 @@ struct bcma_bus {
|
||||
@@ -187,74 +203,101 @@ struct bcma_bus {
|
||||
|
||||
struct bcma_chipinfo chipinfo;
|
||||
|
||||
+ struct bcma_boardinfo boardinfo;
|
||||
+
|
||||
struct bcma_device *mapped_core;
|
||||
struct list_head cores;
|
||||
u8 nr_cores;
|
||||
|
@ -3303,7 +3660,7 @@
|
|||
+#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -53,6 +53,35 @@ struct pci_dev;
|
||||
@@ -53,11 +53,47 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_SBTOPCI1_MASK 0xFC000000
|
||||
#define BCMA_CORE_PCI_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
|
||||
#define BCMA_CORE_PCI_SBTOPCI2_MASK 0xC0000000
|
||||
|
@ -3339,7 +3696,19 @@
|
|||
#define BCMA_CORE_PCI_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
|
||||
#define BCMA_CORE_PCI_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
|
||||
#define BCMA_CORE_PCI_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
|
||||
@@ -72,20 +101,114 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
|
||||
#define BCMA_CORE_PCI_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
|
||||
+#define BCMA_CORE_PCI_SPROM_PI_OFFSET 0 /* first word */
|
||||
+#define BCMA_CORE_PCI_SPROM_PI_MASK 0xf000 /* bit 15:12 */
|
||||
+#define BCMA_CORE_PCI_SPROM_PI_SHIFT 12 /* bit 15:12 */
|
||||
+#define BCMA_CORE_PCI_SPROM_MISC_CONFIG 5 /* word 5 */
|
||||
+#define BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */
|
||||
+#define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
|
||||
+#define BCMA_CORE_PCI_SPROM_CLKREQ_ENB 0x0800 /* bit 11 */
|
||||
|
||||
/* SBtoPCIx */
|
||||
#define BCMA_CORE_PCI_SBTOPCI_MEM 0x00000000
|
||||
@@ -72,20 +108,118 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_SBTOPCI_RC_READL 0x00000010 /* Memory read line */
|
||||
#define BCMA_CORE_PCI_SBTOPCI_RC_READM 0x00000020 /* Memory read multiple */
|
||||
|
||||
|
@ -3375,6 +3744,7 @@
|
|||
+#define BCMA_CORE_PCI_DLLP_LRREG 0x120 /* Link Replay */
|
||||
+#define BCMA_CORE_PCI_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */
|
||||
+#define BCMA_CORE_PCI_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */
|
||||
+#define BCMA_CORE_PCI_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */
|
||||
+#define BCMA_CORE_PCI_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */
|
||||
+#define BCMA_CORE_PCI_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */
|
||||
+#define BCMA_CORE_PCI_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */
|
||||
|
@ -3443,17 +3813,20 @@
|
|||
};
|
||||
|
||||
/* Register access */
|
||||
+#define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset)
|
||||
#define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset)
|
||||
+#define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
|
||||
#define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
|
||||
|
||||
-extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
+extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
|
||||
+extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+
|
||||
+extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
+extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
+
|
||||
|
||||
#endif /* LINUX_BCMA_DRIVER_PCI_H_ */
|
||||
--- a/include/linux/bcma/bcma_regs.h
|
||||
+++ b/include/linux/bcma/bcma_regs.h
|
||||
|
|
|
@ -1,3 +1,14 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -29,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
||||
--- a/drivers/ssb/driver_chipcommon_pmu.c
|
||||
+++ b/drivers/ssb/driver_chipcommon_pmu.c
|
||||
@@ -13,6 +13,9 @@
|
||||
|
@ -160,7 +171,26 @@
|
|||
&clkctl_n, &clkctl_m);
|
||||
--- a/drivers/ssb/pci.c
|
||||
+++ b/drivers/ssb/pci.c
|
||||
@@ -331,7 +331,6 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -178,6 +178,18 @@ err_pci:
|
||||
#define SPEX(_outvar, _offset, _mask, _shift) \
|
||||
SPEX16(_outvar, _offset, _mask, _shift)
|
||||
|
||||
+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
|
||||
+ do { \
|
||||
+ SPEX(_field[0], _offset + 0, _mask, _shift); \
|
||||
+ SPEX(_field[1], _offset + 2, _mask, _shift); \
|
||||
+ SPEX(_field[2], _offset + 4, _mask, _shift); \
|
||||
+ SPEX(_field[3], _offset + 6, _mask, _shift); \
|
||||
+ SPEX(_field[4], _offset + 8, _mask, _shift); \
|
||||
+ SPEX(_field[5], _offset + 10, _mask, _shift); \
|
||||
+ SPEX(_field[6], _offset + 12, _mask, _shift); \
|
||||
+ SPEX(_field[7], _offset + 14, _mask, _shift); \
|
||||
+ } while (0)
|
||||
+
|
||||
|
||||
static inline u8 ssb_crc8(u8 crc, u8 data)
|
||||
{
|
||||
@@ -331,7 +343,6 @@ static void sprom_extract_r123(struct ss
|
||||
{
|
||||
int i;
|
||||
u16 v;
|
||||
|
@ -168,8 +198,24 @@
|
|||
u16 loc[3];
|
||||
|
||||
if (out->revision == 3) /* rev 3 moved MAC */
|
||||
@@ -390,20 +389,12 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -361,8 +372,9 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
|
||||
SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
|
||||
SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
|
||||
- SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
- SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
+ if (out->revision == 1)
|
||||
+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
+ SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
|
||||
SSB_SPROM1_BINF_ANTA_SHIFT);
|
||||
SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
|
||||
@@ -388,22 +400,16 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
|
||||
if (out->revision >= 2)
|
||||
SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
- gain = r123_extract_antgain(out->revision, in,
|
||||
|
@ -195,7 +241,27 @@
|
|||
}
|
||||
|
||||
/* Revs 4 5 and 8 have partially shared layout */
|
||||
@@ -504,16 +495,14 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -464,14 +470,17 @@ static void sprom_extract_r45(struct ssb
|
||||
SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
|
||||
SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
|
||||
SSB_SPROM4_ETHPHY_ET1A_SHIFT);
|
||||
+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
|
||||
if (out->revision == 4) {
|
||||
- SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
|
||||
SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
|
||||
} else {
|
||||
- SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
|
||||
@@ -504,16 +513,14 @@ static void sprom_extract_r45(struct ssb
|
||||
}
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -216,7 +282,7 @@
|
|||
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
@@ -523,7 +512,13 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -523,14 +530,22 @@ static void sprom_extract_r45(struct ssb
|
||||
static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
|
||||
{
|
||||
int i;
|
||||
|
@ -231,7 +297,17 @@
|
|||
|
||||
/* extract the MAC address */
|
||||
for (i = 0; i < 3; i++) {
|
||||
@@ -596,16 +591,69 @@ static void sprom_extract_r8(struct ssb_
|
||||
v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
|
||||
*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
|
||||
}
|
||||
- SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
|
||||
@@ -596,17 +611,127 @@ static void sprom_extract_r8(struct ssb_
|
||||
SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -249,7 +325,7 @@
|
|||
SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
|
||||
- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
|
||||
- sizeof(out->antenna_gain.ghz5));
|
||||
+
|
||||
|
||||
+ /* Extract cores power info info */
|
||||
+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
|
||||
+ o = pwr_info_offset[i];
|
||||
|
@ -304,9 +380,75 @@
|
|||
+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
|
||||
+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
|
||||
+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
|
||||
|
||||
+
|
||||
+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
|
||||
+ SSB_SPROM8_LEDDC_ON_SHIFT);
|
||||
+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
|
||||
+ SSB_SPROM8_LEDDC_OFF_SHIFT);
|
||||
+
|
||||
+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
|
||||
+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
|
||||
+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
|
||||
+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
|
||||
+
|
||||
+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
|
||||
+
|
||||
+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
|
||||
+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
|
||||
+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
|
||||
+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
|
||||
+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
|
||||
+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
|
||||
+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
|
||||
+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
|
||||
+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
|
||||
+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
|
||||
+
|
||||
+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
|
||||
+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
|
||||
+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
|
||||
+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
|
||||
+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
|
||||
+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
|
||||
+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
|
||||
+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
|
||||
+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
|
||||
+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
|
||||
+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
/* TODO - get remaining rev 8 stuff needed */
|
||||
@@ -736,7 +861,6 @@ static void ssb_pci_get_boardinfo(struct
|
||||
{
|
||||
bi->vendor = bus->host_pci->subsystem_vendor;
|
||||
bi->type = bus->host_pci->subsystem_device;
|
||||
- bi->rev = bus->host_pci->revision;
|
||||
}
|
||||
|
||||
int ssb_pci_get_invariants(struct ssb_bus *bus,
|
||||
--- a/drivers/ssb/pcmcia.c
|
||||
+++ b/drivers/ssb/pcmcia.c
|
||||
@@ -676,14 +676,10 @@ static int ssb_pcmcia_do_get_invariants(
|
||||
|
@ -428,7 +570,7 @@
|
|||
u8 rssisav2g; /* 2GHz RSSI params */
|
||||
u8 rssismc2g;
|
||||
u8 rssismf2g;
|
||||
@@ -82,19 +91,97 @@ struct ssb_sprom {
|
||||
@@ -82,26 +91,103 @@ struct ssb_sprom {
|
||||
u16 boardflags2_hi; /* Board flags (bits 48-63) */
|
||||
/* TODO store board flags in a single u64 */
|
||||
|
||||
|
@ -438,19 +580,21 @@
|
|||
* on each band. Values in dBm/4 (Q5.2). Negative gain means the
|
||||
* loss in the connectors is bigger than the gain. */
|
||||
struct {
|
||||
+ s8 a0, a1, a2, a3;
|
||||
+ } antenna_gain;
|
||||
+
|
||||
+ struct {
|
||||
struct {
|
||||
- struct {
|
||||
- s8 a0, a1, a2, a3;
|
||||
- } ghz24; /* 2.4GHz band */
|
||||
+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
|
||||
+ } ghz2;
|
||||
struct {
|
||||
- struct {
|
||||
- s8 a0, a1, a2, a3;
|
||||
- } ghz5; /* 5GHz band */
|
||||
- } antenna_gain;
|
||||
+ s8 a0, a1, a2, a3;
|
||||
} antenna_gain;
|
||||
|
||||
- /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
|
||||
+ struct {
|
||||
+ struct {
|
||||
+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
|
||||
+ } ghz2;
|
||||
+ struct {
|
||||
+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
|
||||
+ } ghz5;
|
||||
+ } fem;
|
||||
|
@ -500,8 +644,7 @@
|
|||
+ u8 measpower1;
|
||||
+ u8 measpower2;
|
||||
+ u8 pcieingress_war;
|
||||
|
||||
- /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
|
||||
+
|
||||
+ /* power per rate from sromrev 9 */
|
||||
+ u16 cckbw202gpo;
|
||||
+ u16 cckbw20ul2gpo;
|
||||
|
@ -532,6 +675,13 @@
|
|||
};
|
||||
|
||||
/* Information about the PCB the circuitry is soldered on. */
|
||||
struct ssb_boardinfo {
|
||||
u16 vendor;
|
||||
u16 type;
|
||||
- u8 rev;
|
||||
};
|
||||
|
||||
|
||||
--- a/include/linux/ssb/ssb_driver_gige.h
|
||||
+++ b/include/linux/ssb/ssb_driver_gige.h
|
||||
@@ -2,6 +2,7 @@
|
||||
|
@ -544,8 +694,53 @@
|
|||
|
||||
--- a/include/linux/ssb/ssb_regs.h
|
||||
+++ b/include/linux/ssb/ssb_regs.h
|
||||
@@ -432,6 +432,56 @@
|
||||
@@ -228,6 +228,7 @@
|
||||
#define SSB_SPROM1_AGAIN_BG_SHIFT 0
|
||||
#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */
|
||||
#define SSB_SPROM1_AGAIN_A_SHIFT 8
|
||||
+#define SSB_SPROM1_CCODE 0x0076
|
||||
|
||||
/* SPROM Revision 2 (inherits from rev 1) */
|
||||
#define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */
|
||||
@@ -267,6 +268,7 @@
|
||||
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
|
||||
|
||||
/* SPROM Revision 4 */
|
||||
+#define SSB_SPROM4_BOARDREV 0x0042 /* Board revision */
|
||||
#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
|
||||
#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
|
||||
#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
|
||||
@@ -389,6 +391,11 @@
|
||||
#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
|
||||
#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
|
||||
#define SSB_SPROM8_GPIOB_P3_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC 0x009A
|
||||
+#define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */
|
||||
+#define SSB_SPROM8_LEDDC_ON_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */
|
||||
+#define SSB_SPROM8_LEDDC_OFF_SHIFT 0
|
||||
#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
|
||||
#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
|
||||
#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
|
||||
@@ -404,6 +411,13 @@
|
||||
#define SSB_SPROM8_AGAIN2_SHIFT 0
|
||||
#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
|
||||
#define SSB_SPROM8_AGAIN3_SHIFT 8
|
||||
+#define SSB_SPROM8_TXRXC 0x00A2
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN 0x000f
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH 0xff00
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8
|
||||
#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
|
||||
#define SSB_SPROM8_RSSISMF2G 0x000F
|
||||
#define SSB_SPROM8_RSSISMC2G 0x00F0
|
||||
@@ -430,8 +444,87 @@
|
||||
#define SSB_SPROM8_TRI5GH_SHIFT 8
|
||||
#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
|
||||
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
|
||||
+#define SSB_SPROM8_RXPO2G_SHIFT 0
|
||||
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
|
||||
#define SSB_SPROM8_RXPO5G_SHIFT 8
|
||||
+#define SSB_SPROM8_FEM2G 0x00AE
|
||||
|
@ -561,10 +756,38 @@
|
|||
+#define SSB_SROM8_FEM_ANTSWLUT 0xF800
|
||||
+#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
|
||||
+#define SSB_SPROM8_THERMAL 0x00B2
|
||||
+#define SSB_SPROM8_MPWR_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET 0x00ff
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0
|
||||
+#define SSB_SPROM8_THERMAL_TRESH 0xff00
|
||||
+#define SSB_SPROM8_THERMAL_TRESH_SHIFT 8
|
||||
+/* Temp sense related entries */
|
||||
+#define SSB_SPROM8_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9
|
||||
+#define SSB_SPROM8_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8
|
||||
+/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
|
||||
+#define SSB_SPROM8_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12
|
||||
+
|
||||
+/* There are 4 blocks with power info sharing the same layout */
|
||||
+#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
|
||||
|
@ -601,7 +824,7 @@
|
|||
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
|
||||
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
|
||||
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
|
||||
@@ -456,6 +506,7 @@
|
||||
@@ -456,12 +549,23 @@
|
||||
#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
|
||||
#define SSB_SPROM8_PA1HIB1 0x00DA
|
||||
#define SSB_SPROM8_PA1HIB2 0x00DC
|
||||
|
@ -609,3 +832,19 @@
|
|||
#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
|
||||
#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
|
||||
|
||||
+#define SSB_SPROM8_2G_MCSPO 0x0152
|
||||
+#define SSB_SPROM8_5G_MCSPO 0x0162
|
||||
+#define SSB_SPROM8_5GL_MCSPO 0x0172
|
||||
+#define SSB_SPROM8_5GH_MCSPO 0x0182
|
||||
+
|
||||
+#define SSB_SPROM8_CDDPO 0x0192
|
||||
+#define SSB_SPROM8_STBCPO 0x0194
|
||||
+#define SSB_SPROM8_BW40PO 0x0196
|
||||
+#define SSB_SPROM8_BWDUPPO 0x0198
|
||||
+
|
||||
/* Values for boardflags_lo read from SPROM */
|
||||
#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
|
||||
#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
|
||||
|
|
|
@ -1,11 +0,0 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -29,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
File diff suppressed because it is too large
Load diff
|
@ -1,3 +1,14 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -29,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
||||
--- a/drivers/ssb/driver_chipcommon_pmu.c
|
||||
+++ b/drivers/ssb/driver_chipcommon_pmu.c
|
||||
@@ -13,6 +13,9 @@
|
||||
|
@ -149,7 +160,26 @@
|
|||
&clkctl_n, &clkctl_m);
|
||||
--- a/drivers/ssb/pci.c
|
||||
+++ b/drivers/ssb/pci.c
|
||||
@@ -331,7 +331,6 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -178,6 +178,18 @@ err_pci:
|
||||
#define SPEX(_outvar, _offset, _mask, _shift) \
|
||||
SPEX16(_outvar, _offset, _mask, _shift)
|
||||
|
||||
+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
|
||||
+ do { \
|
||||
+ SPEX(_field[0], _offset + 0, _mask, _shift); \
|
||||
+ SPEX(_field[1], _offset + 2, _mask, _shift); \
|
||||
+ SPEX(_field[2], _offset + 4, _mask, _shift); \
|
||||
+ SPEX(_field[3], _offset + 6, _mask, _shift); \
|
||||
+ SPEX(_field[4], _offset + 8, _mask, _shift); \
|
||||
+ SPEX(_field[5], _offset + 10, _mask, _shift); \
|
||||
+ SPEX(_field[6], _offset + 12, _mask, _shift); \
|
||||
+ SPEX(_field[7], _offset + 14, _mask, _shift); \
|
||||
+ } while (0)
|
||||
+
|
||||
|
||||
static inline u8 ssb_crc8(u8 crc, u8 data)
|
||||
{
|
||||
@@ -331,7 +343,6 @@ static void sprom_extract_r123(struct ss
|
||||
{
|
||||
int i;
|
||||
u16 v;
|
||||
|
@ -157,8 +187,24 @@
|
|||
u16 loc[3];
|
||||
|
||||
if (out->revision == 3) /* rev 3 moved MAC */
|
||||
@@ -390,20 +389,12 @@ static void sprom_extract_r123(struct ss
|
||||
@@ -361,8 +372,9 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
|
||||
SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
|
||||
SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
|
||||
- SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
- SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
+ if (out->revision == 1)
|
||||
+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
|
||||
+ SSB_SPROM1_BINF_CCODE_SHIFT);
|
||||
SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
|
||||
SSB_SPROM1_BINF_ANTA_SHIFT);
|
||||
SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
|
||||
@@ -388,22 +400,16 @@ static void sprom_extract_r123(struct ss
|
||||
SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
|
||||
if (out->revision >= 2)
|
||||
SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
- gain = r123_extract_antgain(out->revision, in,
|
||||
|
@ -184,7 +230,27 @@
|
|||
}
|
||||
|
||||
/* Revs 4 5 and 8 have partially shared layout */
|
||||
@@ -504,16 +495,14 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -464,14 +470,17 @@ static void sprom_extract_r45(struct ssb
|
||||
SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
|
||||
SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
|
||||
SSB_SPROM4_ETHPHY_ET1A_SHIFT);
|
||||
+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
|
||||
if (out->revision == 4) {
|
||||
- SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
|
||||
SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
|
||||
} else {
|
||||
- SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
|
||||
@@ -504,16 +513,14 @@ static void sprom_extract_r45(struct ssb
|
||||
}
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -205,7 +271,7 @@
|
|||
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
@@ -523,7 +512,13 @@ static void sprom_extract_r45(struct ssb
|
||||
@@ -523,14 +530,22 @@ static void sprom_extract_r45(struct ssb
|
||||
static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
|
||||
{
|
||||
int i;
|
||||
|
@ -220,7 +286,17 @@
|
|||
|
||||
/* extract the MAC address */
|
||||
for (i = 0; i < 3; i++) {
|
||||
@@ -596,16 +591,46 @@ static void sprom_extract_r8(struct ssb_
|
||||
v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
|
||||
*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
|
||||
}
|
||||
- SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0);
|
||||
+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
|
||||
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
|
||||
SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
|
||||
SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
|
||||
@@ -596,16 +611,46 @@ static void sprom_extract_r8(struct ssb_
|
||||
SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
|
||||
|
||||
/* Extract the antenna gain values. */
|
||||
|
@ -273,6 +349,78 @@
|
|||
|
||||
/* Extract FEM info */
|
||||
SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
|
||||
@@ -630,6 +675,63 @@ static void sprom_extract_r8(struct ssb_
|
||||
SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
|
||||
SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
|
||||
|
||||
+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
|
||||
+ SSB_SPROM8_LEDDC_ON_SHIFT);
|
||||
+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
|
||||
+ SSB_SPROM8_LEDDC_OFF_SHIFT);
|
||||
+
|
||||
+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
|
||||
+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
|
||||
+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
|
||||
+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
|
||||
+
|
||||
+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
|
||||
+
|
||||
+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
|
||||
+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
|
||||
+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
|
||||
+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
|
||||
+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
|
||||
+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
|
||||
+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
|
||||
+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
|
||||
+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
|
||||
+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
|
||||
+
|
||||
+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
|
||||
+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
|
||||
+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
|
||||
+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
|
||||
+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
|
||||
+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
|
||||
+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
|
||||
+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
|
||||
+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
|
||||
+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
|
||||
+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
|
||||
sprom_extract_r458(out, in);
|
||||
|
||||
/* TODO - get remaining rev 8 stuff needed */
|
||||
@@ -759,7 +861,6 @@ static void ssb_pci_get_boardinfo(struct
|
||||
{
|
||||
bi->vendor = bus->host_pci->subsystem_vendor;
|
||||
bi->type = bus->host_pci->subsystem_device;
|
||||
- bi->rev = bus->host_pci->revision;
|
||||
}
|
||||
|
||||
int ssb_pci_get_invariants(struct ssb_bus *bus,
|
||||
--- a/drivers/ssb/pcmcia.c
|
||||
+++ b/drivers/ssb/pcmcia.c
|
||||
@@ -676,14 +676,10 @@ static int ssb_pcmcia_do_get_invariants(
|
||||
|
@ -414,7 +562,7 @@
|
|||
} antenna_gain;
|
||||
|
||||
struct {
|
||||
@@ -103,7 +109,79 @@ struct ssb_sprom {
|
||||
@@ -103,14 +109,85 @@ struct ssb_sprom {
|
||||
} ghz5;
|
||||
} fem;
|
||||
|
||||
|
@ -495,6 +643,13 @@
|
|||
};
|
||||
|
||||
/* Information about the PCB the circuitry is soldered on. */
|
||||
struct ssb_boardinfo {
|
||||
u16 vendor;
|
||||
u16 type;
|
||||
- u8 rev;
|
||||
};
|
||||
|
||||
|
||||
--- a/include/linux/ssb/ssb_driver_gige.h
|
||||
+++ b/include/linux/ssb/ssb_driver_gige.h
|
||||
@@ -2,6 +2,7 @@
|
||||
|
@ -507,10 +662,96 @@
|
|||
|
||||
--- a/include/linux/ssb/ssb_regs.h
|
||||
+++ b/include/linux/ssb/ssb_regs.h
|
||||
@@ -449,6 +449,39 @@
|
||||
#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
|
||||
#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
|
||||
#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
|
||||
@@ -228,6 +228,7 @@
|
||||
#define SSB_SPROM1_AGAIN_BG_SHIFT 0
|
||||
#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */
|
||||
#define SSB_SPROM1_AGAIN_A_SHIFT 8
|
||||
+#define SSB_SPROM1_CCODE 0x0076
|
||||
|
||||
/* SPROM Revision 2 (inherits from rev 1) */
|
||||
#define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */
|
||||
@@ -267,6 +268,7 @@
|
||||
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
|
||||
|
||||
/* SPROM Revision 4 */
|
||||
+#define SSB_SPROM4_BOARDREV 0x0042 /* Board revision */
|
||||
#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
|
||||
#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
|
||||
#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
|
||||
@@ -389,6 +391,11 @@
|
||||
#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
|
||||
#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
|
||||
#define SSB_SPROM8_GPIOB_P3_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC 0x009A
|
||||
+#define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */
|
||||
+#define SSB_SPROM8_LEDDC_ON_SHIFT 8
|
||||
+#define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */
|
||||
+#define SSB_SPROM8_LEDDC_OFF_SHIFT 0
|
||||
#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
|
||||
#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
|
||||
#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
|
||||
@@ -404,6 +411,13 @@
|
||||
#define SSB_SPROM8_AGAIN2_SHIFT 0
|
||||
#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
|
||||
#define SSB_SPROM8_AGAIN3_SHIFT 8
|
||||
+#define SSB_SPROM8_TXRXC 0x00A2
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN 0x000f
|
||||
+#define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0
|
||||
+#define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH 0xff00
|
||||
+#define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8
|
||||
#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
|
||||
#define SSB_SPROM8_RSSISMF2G 0x000F
|
||||
#define SSB_SPROM8_RSSISMC2G 0x00F0
|
||||
@@ -430,6 +444,7 @@
|
||||
#define SSB_SPROM8_TRI5GH_SHIFT 8
|
||||
#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
|
||||
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
|
||||
+#define SSB_SPROM8_RXPO2G_SHIFT 0
|
||||
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
|
||||
#define SSB_SPROM8_RXPO5G_SHIFT 8
|
||||
#define SSB_SPROM8_FEM2G 0x00AE
|
||||
@@ -445,10 +460,71 @@
|
||||
#define SSB_SROM8_FEM_ANTSWLUT 0xF800
|
||||
#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
|
||||
#define SSB_SPROM8_THERMAL 0x00B2
|
||||
-#define SSB_SPROM8_MPWR_RAWTS 0x00B4
|
||||
-#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
|
||||
-#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
|
||||
-#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET 0x00ff
|
||||
+#define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0
|
||||
+#define SSB_SPROM8_THERMAL_TRESH 0xff00
|
||||
+#define SSB_SPROM8_THERMAL_TRESH_SHIFT 8
|
||||
+/* Temp sense related entries */
|
||||
+#define SSB_SPROM8_RAWTS 0x00B4
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff
|
||||
+#define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00
|
||||
+#define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9
|
||||
+#define SSB_SPROM8_OPT_CORRX 0x00B6
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300
|
||||
+#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8
|
||||
+/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP 0x00B8
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
|
||||
+#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
|
||||
+#define SSB_SPROM8_TEMPDELTA 0x00BA
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
|
||||
+#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00
|
||||
+#define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000
|
||||
+#define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12
|
||||
+
|
||||
+/* There are 4 blocks with power info sharing the same layout */
|
||||
+#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
|
||||
|
@ -547,7 +788,7 @@
|
|||
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
|
||||
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
|
||||
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
|
||||
@@ -473,6 +506,7 @@
|
||||
@@ -473,12 +549,23 @@
|
||||
#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
|
||||
#define SSB_SPROM8_PA1HIB1 0x00DA
|
||||
#define SSB_SPROM8_PA1HIB2 0x00DC
|
||||
|
@ -555,3 +796,19 @@
|
|||
#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
|
||||
#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
|
||||
#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
|
||||
|
||||
+#define SSB_SPROM8_2G_MCSPO 0x0152
|
||||
+#define SSB_SPROM8_5G_MCSPO 0x0162
|
||||
+#define SSB_SPROM8_5GL_MCSPO 0x0172
|
||||
+#define SSB_SPROM8_5GH_MCSPO 0x0182
|
||||
+
|
||||
+#define SSB_SPROM8_CDDPO 0x0192
|
||||
+#define SSB_SPROM8_STBCPO 0x0194
|
||||
+#define SSB_SPROM8_BW40PO 0x0196
|
||||
+#define SSB_SPROM8_BWDUPPO 0x0198
|
||||
+
|
||||
/* Values for boardflags_lo read from SPROM */
|
||||
#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
|
||||
#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
|
||||
|
|
|
@ -1,11 +0,0 @@
|
|||
--- a/drivers/ssb/b43_pci_bridge.c
|
||||
+++ b/drivers/ssb/b43_pci_bridge.c
|
||||
@@ -29,6 +29,8 @@ static const struct pci_device_id b43_pc
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
|
||||
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
|
|
@ -34,6 +34,25 @@
|
|||
#endif /* CONFIG_BCMA_DRIVER_PCI_HOSTMODE */
|
||||
|
||||
#endif
|
||||
--- a/drivers/bcma/core.c
|
||||
+++ b/drivers/bcma/core.c
|
||||
@@ -30,6 +30,7 @@ void bcma_core_disable(struct bcma_devic
|
||||
udelay(10);
|
||||
|
||||
bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
|
||||
+ bcma_aread32(core, BCMA_RESET_CTL);
|
||||
udelay(1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_disable);
|
||||
@@ -77,7 +78,7 @@ void bcma_core_set_clockmode(struct bcma
|
||||
pr_err("HT force timeout\n");
|
||||
break;
|
||||
case BCMA_CLKMODE_DYNAMIC:
|
||||
- pr_warn("Dynamic clockmode not supported yet!\n");
|
||||
+ bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT);
|
||||
break;
|
||||
}
|
||||
}
|
||||
--- a/drivers/bcma/driver_chipcommon_pmu.c
|
||||
+++ b/drivers/bcma/driver_chipcommon_pmu.c
|
||||
@@ -80,6 +80,7 @@ static void bcma_pmu_resources_init(stru
|
||||
|
@ -57,7 +76,7 @@
|
|||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
@@ -16,40 +17,41 @@
|
||||
@@ -16,40 +17,39 @@
|
||||
* R/W ops.
|
||||
**************************************************/
|
||||
|
||||
|
@ -72,7 +91,7 @@
|
|||
+ return pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_DATA);
|
||||
}
|
||||
|
||||
#if 0
|
||||
-#if 0
|
||||
static void bcma_pcie_write(struct bcma_drv_pci *pc, u32 address, u32 data)
|
||||
{
|
||||
- pcicore_write32(pc, 0x130, address);
|
||||
|
@ -82,7 +101,7 @@
|
|||
+ pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_ADDR);
|
||||
+ pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
#endif
|
||||
-#endif
|
||||
|
||||
static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
{
|
||||
|
@ -115,7 +134,7 @@
|
|||
break;
|
||||
msleep(1);
|
||||
}
|
||||
@@ -57,79 +59,84 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
@@ -57,79 +57,84 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
|
||||
static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
{
|
||||
|
@ -231,7 +250,7 @@
|
|||
}
|
||||
|
||||
/**************************************************
|
||||
@@ -138,72 +145,53 @@ static void bcma_pcie_mdio_write(struct
|
||||
@@ -138,72 +143,90 @@ static void bcma_pcie_mdio_write(struct
|
||||
|
||||
static u8 bcma_pcicore_polarity_workaround(struct bcma_drv_pci *pc)
|
||||
{
|
||||
|
@ -266,6 +285,41 @@
|
|||
+ bcma_pcie_mdio_write(pc, BCMA_CORE_PCI_MDIODATA_DEV_PLL,
|
||||
+ BCMA_CORE_PCI_SERDES_PLL_CTRL,
|
||||
+ tmp & ~BCMA_CORE_PCI_PLL_CTRL_FREQDET_EN);
|
||||
+}
|
||||
+
|
||||
+static void bcma_core_pci_fixcfg(struct bcma_drv_pci *pc)
|
||||
+{
|
||||
+ struct bcma_device *core = pc->core;
|
||||
+ u16 val16, core_index;
|
||||
+ uint regoff;
|
||||
+
|
||||
+ regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_PI_OFFSET);
|
||||
+ core_index = (u16)core->core_index;
|
||||
+
|
||||
+ val16 = pcicore_read16(pc, regoff);
|
||||
+ if (((val16 & BCMA_CORE_PCI_SPROM_PI_MASK) >> BCMA_CORE_PCI_SPROM_PI_SHIFT)
|
||||
+ != core_index) {
|
||||
+ val16 = (core_index << BCMA_CORE_PCI_SPROM_PI_SHIFT) |
|
||||
+ (val16 & ~BCMA_CORE_PCI_SPROM_PI_MASK);
|
||||
+ pcicore_write16(pc, regoff, val16);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+/* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */
|
||||
+/* Needs to happen when coming out of 'standby'/'hibernate' */
|
||||
+static void bcma_core_pci_config_fixup(struct bcma_drv_pci *pc)
|
||||
+{
|
||||
+ u16 val16;
|
||||
+ uint regoff;
|
||||
+
|
||||
+ regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_MISC_CONFIG);
|
||||
+
|
||||
+ val16 = pcicore_read16(pc, regoff);
|
||||
+
|
||||
+ if (!(val16 & BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST)) {
|
||||
+ val16 |= BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST;
|
||||
+ pcicore_write16(pc, regoff, val16);
|
||||
+ }
|
||||
}
|
||||
|
||||
/**************************************************
|
||||
|
@ -275,7 +329,9 @@
|
|||
-static void bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
|
||||
+static void __devinit bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
|
||||
{
|
||||
+ bcma_core_pci_fixcfg(pc);
|
||||
bcma_pcicore_serdes_workaround(pc);
|
||||
+ bcma_core_pci_config_fixup(pc);
|
||||
}
|
||||
|
||||
-static bool bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc)
|
||||
|
@ -327,6 +383,24 @@
|
|||
}
|
||||
|
||||
int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, struct bcma_device *core,
|
||||
@@ -236,3 +259,17 @@ out:
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
+
|
||||
+void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+{
|
||||
+ u32 w;
|
||||
+
|
||||
+ w = bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
+ if (extend)
|
||||
+ w |= BCMA_CORE_PCI_ASPMTIMER_EXTEND;
|
||||
+ else
|
||||
+ w &= ~BCMA_CORE_PCI_ASPMTIMER_EXTEND;
|
||||
+ bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
+ bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
--- a/drivers/bcma/driver_pci_host.c
|
||||
+++ b/drivers/bcma/driver_pci_host.c
|
||||
@@ -2,13 +2,588 @@
|
||||
|
@ -452,7 +526,7 @@
|
|||
+ if (unlikely(!addr))
|
||||
+ goto out;
|
||||
+ err = -ENOMEM;
|
||||
+ mmio = ioremap_nocache(addr, len);
|
||||
+ mmio = ioremap_nocache(addr, sizeof(val));
|
||||
+ if (!mmio)
|
||||
+ goto out;
|
||||
+
|
||||
|
@ -504,7 +578,7 @@
|
|||
+ addr = pc->core->addr + BCMA_CORE_PCI_PCICFG0;
|
||||
+ addr |= (func << 8);
|
||||
+ addr |= (off & 0xfc);
|
||||
+ mmio = ioremap_nocache(addr, len);
|
||||
+ mmio = ioremap_nocache(addr, sizeof(val));
|
||||
+ if (!mmio)
|
||||
+ goto out;
|
||||
+ }
|
||||
|
@ -513,7 +587,7 @@
|
|||
+ if (unlikely(!addr))
|
||||
+ goto out;
|
||||
+ err = -ENOMEM;
|
||||
+ mmio = ioremap_nocache(addr, len);
|
||||
+ mmio = ioremap_nocache(addr, sizeof(val));
|
||||
+ if (!mmio)
|
||||
+ goto out;
|
||||
+
|
||||
|
@ -824,8 +898,8 @@
|
|||
+ /* Ok, ready to run, register it to the system.
|
||||
+ * The following needs change, if we want to port hostmode
|
||||
+ * to non-MIPS platform. */
|
||||
+ io_map_base = (unsigned long)ioremap_nocache(BCMA_SOC_PCI_MEM,
|
||||
+ 0x04000000);
|
||||
+ io_map_base = (unsigned long)ioremap_nocache(pc_host->mem_resource.start,
|
||||
+ resource_size(&pc_host->mem_resource));
|
||||
+ pc_host->pci_controller.io_map_base = io_map_base;
|
||||
+ set_io_port_base(pc_host->pci_controller.io_map_base);
|
||||
+ /* Give some time to the PCI controller to configure itself with the new
|
||||
|
@ -933,6 +1007,34 @@
|
|||
{
|
||||
struct bcma_bus *bus;
|
||||
int err = -ENOMEM;
|
||||
@@ -201,6 +201,9 @@ static int bcma_host_pci_probe(struct pc
|
||||
bus->hosttype = BCMA_HOSTTYPE_PCI;
|
||||
bus->ops = &bcma_host_pci_ops;
|
||||
|
||||
+ bus->boardinfo.vendor = bus->host_pci->subsystem_vendor;
|
||||
+ bus->boardinfo.type = bus->host_pci->subsystem_device;
|
||||
+
|
||||
/* Register */
|
||||
err = bcma_bus_register(bus);
|
||||
if (err)
|
||||
@@ -222,7 +225,7 @@ err_kfree_bus:
|
||||
return err;
|
||||
}
|
||||
|
||||
-static void bcma_host_pci_remove(struct pci_dev *dev)
|
||||
+static void __devexit bcma_host_pci_remove(struct pci_dev *dev)
|
||||
{
|
||||
struct bcma_bus *bus = pci_get_drvdata(dev);
|
||||
|
||||
@@ -277,7 +280,7 @@ static struct pci_driver bcma_pci_bridge
|
||||
.name = "bcma-pci-bridge",
|
||||
.id_table = bcma_pci_bridge_tbl,
|
||||
.probe = bcma_host_pci_probe,
|
||||
- .remove = bcma_host_pci_remove,
|
||||
+ .remove = __devexit_p(bcma_host_pci_remove),
|
||||
.driver.pm = BCMA_PM_OPS,
|
||||
};
|
||||
|
||||
--- a/drivers/bcma/main.c
|
||||
+++ b/drivers/bcma/main.c
|
||||
@@ -13,6 +13,12 @@
|
||||
|
@ -993,7 +1095,104 @@
|
|||
if (err) {
|
||||
--- a/drivers/bcma/scan.c
|
||||
+++ b/drivers/bcma/scan.c
|
||||
@@ -212,6 +212,17 @@ static struct bcma_device *bcma_find_cor
|
||||
@@ -19,7 +19,14 @@ struct bcma_device_id_name {
|
||||
u16 id;
|
||||
const char *name;
|
||||
};
|
||||
-struct bcma_device_id_name bcma_device_names[] = {
|
||||
+
|
||||
+static const struct bcma_device_id_name bcma_arm_device_names[] = {
|
||||
+ { BCMA_CORE_ARM_1176, "ARM 1176" },
|
||||
+ { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
|
||||
+ { BCMA_CORE_ARM_CM3, "ARM CM3" },
|
||||
+};
|
||||
+
|
||||
+static const struct bcma_device_id_name bcma_bcm_device_names[] = {
|
||||
{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
|
||||
{ BCMA_CORE_INVALID, "Invalid" },
|
||||
{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
|
||||
@@ -27,7 +34,6 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_SRAM, "SRAM" },
|
||||
{ BCMA_CORE_SDRAM, "SDRAM" },
|
||||
{ BCMA_CORE_PCI, "PCI" },
|
||||
- { BCMA_CORE_MIPS, "MIPS" },
|
||||
{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
|
||||
{ BCMA_CORE_V90, "V90" },
|
||||
{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
|
||||
@@ -44,7 +50,6 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_PHY_A, "PHY A" },
|
||||
{ BCMA_CORE_PHY_B, "PHY B" },
|
||||
{ BCMA_CORE_PHY_G, "PHY G" },
|
||||
- { BCMA_CORE_MIPS_3302, "MIPS 3302" },
|
||||
{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
|
||||
{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
|
||||
{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
|
||||
@@ -58,15 +63,11 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_PHY_N, "PHY N" },
|
||||
{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
|
||||
{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
|
||||
- { BCMA_CORE_ARM_1176, "ARM 1176" },
|
||||
- { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
|
||||
{ BCMA_CORE_PHY_LP, "PHY LP" },
|
||||
{ BCMA_CORE_PMU, "PMU" },
|
||||
{ BCMA_CORE_PHY_SSN, "PHY SSN" },
|
||||
{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
|
||||
- { BCMA_CORE_ARM_CM3, "ARM CM3" },
|
||||
{ BCMA_CORE_PHY_HT, "PHY HT" },
|
||||
- { BCMA_CORE_MIPS_74K, "MIPS 74K" },
|
||||
{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
|
||||
{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
|
||||
{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
|
||||
@@ -79,16 +80,41 @@ struct bcma_device_id_name bcma_device_n
|
||||
{ BCMA_CORE_SHIM, "SHIM" },
|
||||
{ BCMA_CORE_DEFAULT, "Default" },
|
||||
};
|
||||
-const char *bcma_device_name(struct bcma_device_id *id)
|
||||
+
|
||||
+static const struct bcma_device_id_name bcma_mips_device_names[] = {
|
||||
+ { BCMA_CORE_MIPS, "MIPS" },
|
||||
+ { BCMA_CORE_MIPS_3302, "MIPS 3302" },
|
||||
+ { BCMA_CORE_MIPS_74K, "MIPS 74K" },
|
||||
+};
|
||||
+
|
||||
+static const char *bcma_device_name(const struct bcma_device_id *id)
|
||||
{
|
||||
- int i;
|
||||
+ const struct bcma_device_id_name *names;
|
||||
+ int size, i;
|
||||
|
||||
- if (id->manuf == BCMA_MANUF_BCM) {
|
||||
- for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
|
||||
- if (bcma_device_names[i].id == id->id)
|
||||
- return bcma_device_names[i].name;
|
||||
- }
|
||||
+ /* search manufacturer specific names */
|
||||
+ switch (id->manuf) {
|
||||
+ case BCMA_MANUF_ARM:
|
||||
+ names = bcma_arm_device_names;
|
||||
+ size = ARRAY_SIZE(bcma_arm_device_names);
|
||||
+ break;
|
||||
+ case BCMA_MANUF_BCM:
|
||||
+ names = bcma_bcm_device_names;
|
||||
+ size = ARRAY_SIZE(bcma_bcm_device_names);
|
||||
+ break;
|
||||
+ case BCMA_MANUF_MIPS:
|
||||
+ names = bcma_mips_device_names;
|
||||
+ size = ARRAY_SIZE(bcma_mips_device_names);
|
||||
+ break;
|
||||
+ default:
|
||||
+ return "UNKNOWN";
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < size; i++) {
|
||||
+ if (names[i].id == id->id)
|
||||
+ return names[i].name;
|
||||
}
|
||||
+
|
||||
return "UNKNOWN";
|
||||
}
|
||||
|
||||
@@ -212,6 +238,17 @@ static struct bcma_device *bcma_find_cor
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -1011,7 +1210,7 @@
|
|||
static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
|
||||
struct bcma_device_id *match, int core_num,
|
||||
struct bcma_device *core)
|
||||
@@ -353,6 +364,7 @@ static int bcma_get_next_core(struct bcm
|
||||
@@ -353,6 +390,7 @@ static int bcma_get_next_core(struct bcm
|
||||
void bcma_init_bus(struct bcma_bus *bus)
|
||||
{
|
||||
s32 tmp;
|
||||
|
@ -1019,7 +1218,7 @@
|
|||
|
||||
if (bus->init_done)
|
||||
return;
|
||||
@@ -363,9 +375,12 @@ void bcma_init_bus(struct bcma_bus *bus)
|
||||
@@ -363,9 +401,12 @@ void bcma_init_bus(struct bcma_bus *bus)
|
||||
bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
|
||||
|
||||
tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
|
||||
|
@ -1035,7 +1234,7 @@
|
|||
bus->init_done = true;
|
||||
}
|
||||
|
||||
@@ -392,6 +407,7 @@ int bcma_bus_scan(struct bcma_bus *bus)
|
||||
@@ -392,6 +433,7 @@ int bcma_bus_scan(struct bcma_bus *bus)
|
||||
bcma_scan_switch_core(bus, erombase);
|
||||
|
||||
while (eromptr < eromend) {
|
||||
|
@ -1043,7 +1242,7 @@
|
|||
struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
|
||||
if (!core)
|
||||
return -ENOMEM;
|
||||
@@ -414,6 +430,8 @@ int bcma_bus_scan(struct bcma_bus *bus)
|
||||
@@ -414,6 +456,8 @@ int bcma_bus_scan(struct bcma_bus *bus)
|
||||
|
||||
core->core_index = core_num++;
|
||||
bus->nr_cores++;
|
||||
|
@ -1122,7 +1321,7 @@
|
|||
|
||||
/**************************************************
|
||||
* R/W ops.
|
||||
@@ -124,10 +176,21 @@ static int bcma_sprom_valid(const u16 *s
|
||||
@@ -124,10 +176,37 @@ static int bcma_sprom_valid(const u16 *s
|
||||
* SPROM extraction.
|
||||
**************************************************/
|
||||
|
||||
|
@ -1130,6 +1329,22 @@
|
|||
+
|
||||
+#define SPEX(_field, _offset, _mask, _shift) \
|
||||
+ bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
|
||||
+
|
||||
+#define SPEX32(_field, _offset, _mask, _shift) \
|
||||
+ bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
|
||||
+ sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
|
||||
+
|
||||
+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
|
||||
+ do { \
|
||||
+ SPEX(_field[0], _offset + 0, _mask, _shift); \
|
||||
+ SPEX(_field[1], _offset + 2, _mask, _shift); \
|
||||
+ SPEX(_field[2], _offset + 4, _mask, _shift); \
|
||||
+ SPEX(_field[3], _offset + 6, _mask, _shift); \
|
||||
+ SPEX(_field[4], _offset + 8, _mask, _shift); \
|
||||
+ SPEX(_field[5], _offset + 10, _mask, _shift); \
|
||||
+ SPEX(_field[6], _offset + 12, _mask, _shift); \
|
||||
+ SPEX(_field[7], _offset + 14, _mask, _shift); \
|
||||
+ } while (0)
|
||||
+
|
||||
static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
|
||||
{
|
||||
|
@ -1145,7 +1360,7 @@
|
|||
|
||||
bus->sprom.revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] &
|
||||
SSB_SPROM_REVISION_REV;
|
||||
@@ -137,85 +200,229 @@ static void bcma_sprom_extract_r8(struct
|
||||
@@ -137,85 +216,363 @@ static void bcma_sprom_extract_r8(struct
|
||||
*(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v);
|
||||
}
|
||||
|
||||
|
@ -1257,7 +1472,8 @@
|
|||
+ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0);
|
||||
+ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0);
|
||||
+
|
||||
+ SPEX(country_code, SSB_SPROM8_CCODE, ~0, 0);
|
||||
+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
|
||||
+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
|
||||
+
|
||||
+ /* Extract cores power info info */
|
||||
+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
|
||||
|
@ -1312,6 +1528,136 @@
|
|||
+ SSB_SROM8_FEM_TR_ISO_SHIFT);
|
||||
+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT,
|
||||
+ SSB_SROM8_FEM_ANTSWLUT_SHIFT);
|
||||
+
|
||||
+ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
|
||||
+ SSB_SPROM8_ANTAVAIL_A_SHIFT);
|
||||
+ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
|
||||
+ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
|
||||
+ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
|
||||
+ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
|
||||
+ SSB_SPROM8_ITSSI_BG_SHIFT);
|
||||
+ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
|
||||
+ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
|
||||
+ SSB_SPROM8_ITSSI_A_SHIFT);
|
||||
+ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
|
||||
+ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
|
||||
+ SSB_SPROM8_MAXP_AL_SHIFT);
|
||||
+ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
|
||||
+ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
|
||||
+ SSB_SPROM8_GPIOA_P1_SHIFT);
|
||||
+ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
|
||||
+ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
|
||||
+ SSB_SPROM8_GPIOB_P3_SHIFT);
|
||||
+ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
|
||||
+ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
|
||||
+ SSB_SPROM8_TRI5G_SHIFT);
|
||||
+ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
|
||||
+ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
|
||||
+ SSB_SPROM8_TRI5GH_SHIFT);
|
||||
+ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G,
|
||||
+ SSB_SPROM8_RXPO2G_SHIFT);
|
||||
+ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
|
||||
+ SSB_SPROM8_RXPO5G_SHIFT);
|
||||
+ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
|
||||
+ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
|
||||
+ SSB_SPROM8_RSSISMC2G_SHIFT);
|
||||
+ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
|
||||
+ SSB_SPROM8_RSSISAV2G_SHIFT);
|
||||
+ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
|
||||
+ SSB_SPROM8_BXA2G_SHIFT);
|
||||
+ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
|
||||
+ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
|
||||
+ SSB_SPROM8_RSSISMC5G_SHIFT);
|
||||
+ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
|
||||
+ SSB_SPROM8_RSSISAV5G_SHIFT);
|
||||
+ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
|
||||
+ SSB_SPROM8_BXA5G_SHIFT);
|
||||
+
|
||||
+ SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0);
|
||||
+ SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0);
|
||||
+ SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0);
|
||||
+ SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0);
|
||||
+ SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0);
|
||||
+ SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0);
|
||||
+ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0);
|
||||
+ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0);
|
||||
+ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0);
|
||||
+ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0);
|
||||
+ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0);
|
||||
+ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0);
|
||||
+ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0);
|
||||
+ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0);
|
||||
+ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0);
|
||||
+ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0);
|
||||
+ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0);
|
||||
+
|
||||
+ /* Extract the antenna gain values. */
|
||||
+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
|
||||
+ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
|
||||
+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
|
||||
+ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
|
||||
+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
|
||||
+ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
|
||||
+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
|
||||
+ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
|
||||
+
|
||||
+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
|
||||
+ SSB_SPROM8_LEDDC_ON_SHIFT);
|
||||
+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
|
||||
+ SSB_SPROM8_LEDDC_OFF_SHIFT);
|
||||
+
|
||||
+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
|
||||
+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
|
||||
+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
|
||||
+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
|
||||
+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
|
||||
+
|
||||
+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
|
||||
+
|
||||
+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
|
||||
+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
|
||||
+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
|
||||
+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
|
||||
+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
|
||||
+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
|
||||
+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
|
||||
+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
|
||||
+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
|
||||
+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
|
||||
+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
|
||||
+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
|
||||
+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
|
||||
+
|
||||
+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
|
||||
+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
|
||||
+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
|
||||
+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
|
||||
+
|
||||
+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
|
||||
+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
|
||||
+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
|
||||
+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
|
||||
+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL,
|
||||
+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
|
||||
+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
|
||||
+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
|
||||
+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
|
||||
+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
|
@ -1421,16 +1767,19 @@
|
|||
- if (!(bus->drv_cc.capabilities & BCMA_CC_CAP_SPROM))
|
||||
- return -ENOENT;
|
||||
+ if (!bcma_sprom_ext_available(bus)) {
|
||||
+ bool sprom_onchip;
|
||||
+
|
||||
+ /*
|
||||
+ * External SPROM takes precedence so check
|
||||
+ * on-chip OTP only when no external SPROM
|
||||
+ * is present.
|
||||
+ */
|
||||
+ if (bcma_sprom_onchip_available(bus)) {
|
||||
+ sprom_onchip = bcma_sprom_onchip_available(bus);
|
||||
+ if (sprom_onchip) {
|
||||
+ /* determine offset */
|
||||
+ offset = bcma_sprom_onchip_offset(bus);
|
||||
+ }
|
||||
+ if (!offset) {
|
||||
+ if (!offset || !sprom_onchip) {
|
||||
+ /*
|
||||
+ * Maybe there is no SPROM on the device?
|
||||
+ * Now we ask the arch code if there is some sprom
|
||||
|
@ -1443,7 +1792,7 @@
|
|||
|
||||
sprom = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
|
||||
GFP_KERNEL);
|
||||
@@ -225,11 +432,7 @@ int bcma_sprom_get(struct bcma_bus *bus)
|
||||
@@ -225,11 +582,7 @@ int bcma_sprom_get(struct bcma_bus *bus)
|
||||
if (bus->chipinfo.id == 0x4331)
|
||||
bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false);
|
||||
|
||||
|
@ -1458,7 +1807,19 @@
|
|||
if (bus->chipinfo.id == 0x4331)
|
||||
--- a/include/linux/bcma/bcma.h
|
||||
+++ b/include/linux/bcma/bcma.h
|
||||
@@ -136,6 +136,7 @@ struct bcma_device {
|
||||
@@ -26,6 +26,11 @@ struct bcma_chipinfo {
|
||||
u8 pkg;
|
||||
};
|
||||
|
||||
+struct bcma_boardinfo {
|
||||
+ u16 vendor;
|
||||
+ u16 type;
|
||||
+};
|
||||
+
|
||||
enum bcma_clkmode {
|
||||
BCMA_CLKMODE_FAST,
|
||||
BCMA_CLKMODE_DYNAMIC,
|
||||
@@ -136,6 +141,7 @@ struct bcma_device {
|
||||
bool dev_registered;
|
||||
|
||||
u8 core_index;
|
||||
|
@ -1466,7 +1827,7 @@
|
|||
|
||||
u32 addr;
|
||||
u32 wrap;
|
||||
@@ -175,6 +176,12 @@ int __bcma_driver_register(struct bcma_d
|
||||
@@ -175,6 +181,12 @@ int __bcma_driver_register(struct bcma_d
|
||||
|
||||
extern void bcma_driver_unregister(struct bcma_driver *drv);
|
||||
|
||||
|
@ -1479,7 +1840,13 @@
|
|||
struct bcma_bus {
|
||||
/* The MMIO area. */
|
||||
void __iomem *mmio;
|
||||
@@ -195,6 +202,7 @@ struct bcma_bus {
|
||||
@@ -191,10 +203,13 @@ struct bcma_bus {
|
||||
|
||||
struct bcma_chipinfo chipinfo;
|
||||
|
||||
+ struct bcma_boardinfo boardinfo;
|
||||
+
|
||||
struct bcma_device *mapped_core;
|
||||
struct list_head cores;
|
||||
u8 nr_cores;
|
||||
u8 init_done:1;
|
||||
|
@ -1487,7 +1854,7 @@
|
|||
|
||||
struct bcma_drv_cc drv_cc;
|
||||
struct bcma_drv_pci drv_pci;
|
||||
@@ -282,6 +290,7 @@ static inline void bcma_maskset16(struct
|
||||
@@ -282,6 +297,7 @@ static inline void bcma_maskset16(struct
|
||||
bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
|
||||
}
|
||||
|
||||
|
@ -1560,7 +1927,7 @@
|
|||
#define BCMA_CC_PMU5_MAINPLL_CPU 1
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -53,6 +53,35 @@ struct pci_dev;
|
||||
@@ -53,11 +53,47 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_SBTOPCI1_MASK 0xFC000000
|
||||
#define BCMA_CORE_PCI_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
|
||||
#define BCMA_CORE_PCI_SBTOPCI2_MASK 0xC0000000
|
||||
|
@ -1596,7 +1963,19 @@
|
|||
#define BCMA_CORE_PCI_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
|
||||
#define BCMA_CORE_PCI_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
|
||||
#define BCMA_CORE_PCI_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
|
||||
@@ -72,20 +101,114 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
|
||||
#define BCMA_CORE_PCI_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
|
||||
+#define BCMA_CORE_PCI_SPROM_PI_OFFSET 0 /* first word */
|
||||
+#define BCMA_CORE_PCI_SPROM_PI_MASK 0xf000 /* bit 15:12 */
|
||||
+#define BCMA_CORE_PCI_SPROM_PI_SHIFT 12 /* bit 15:12 */
|
||||
+#define BCMA_CORE_PCI_SPROM_MISC_CONFIG 5 /* word 5 */
|
||||
+#define BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */
|
||||
+#define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
|
||||
+#define BCMA_CORE_PCI_SPROM_CLKREQ_ENB 0x0800 /* bit 11 */
|
||||
|
||||
/* SBtoPCIx */
|
||||
#define BCMA_CORE_PCI_SBTOPCI_MEM 0x00000000
|
||||
@@ -72,20 +108,118 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_SBTOPCI_RC_READL 0x00000010 /* Memory read line */
|
||||
#define BCMA_CORE_PCI_SBTOPCI_RC_READM 0x00000020 /* Memory read multiple */
|
||||
|
||||
|
@ -1632,6 +2011,7 @@
|
|||
+#define BCMA_CORE_PCI_DLLP_LRREG 0x120 /* Link Replay */
|
||||
+#define BCMA_CORE_PCI_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */
|
||||
+#define BCMA_CORE_PCI_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */
|
||||
+#define BCMA_CORE_PCI_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */
|
||||
+#define BCMA_CORE_PCI_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */
|
||||
+#define BCMA_CORE_PCI_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */
|
||||
+#define BCMA_CORE_PCI_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */
|
||||
|
@ -1700,17 +2080,20 @@
|
|||
};
|
||||
|
||||
/* Register access */
|
||||
+#define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset)
|
||||
#define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset)
|
||||
+#define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
|
||||
#define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
|
||||
|
||||
-extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
+extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
|
||||
+extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+
|
||||
+extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
+extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
+
|
||||
|
||||
#endif /* LINUX_BCMA_DRIVER_PCI_H_ */
|
||||
--- a/include/linux/bcma/bcma_regs.h
|
||||
+++ b/include/linux/bcma/bcma_regs.h
|
||||
|
|
Loading…
Reference in a new issue