bcm53xx: backport spi-nor patches from 3.18-rc1
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 43030
This commit is contained in:
Rafał Miłecki
parent
18ae41edf0
commit
2466b04a5a
5 changed files with 107 additions and 136 deletions
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@ -0,0 +1,106 @@
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -611,6 +611,7 @@ const struct spi_device_id spi_nor_ids[]
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{ "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64, SECT_4K) },
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{ "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64, SECT_4K) },
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{ "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) },
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+ { "m25px80", INFO(0x207114, 0, 64 * 1024, 16, 0) },
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/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
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{ "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) },
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@@ -623,7 +624,6 @@ const struct spi_device_id spi_nor_ids[]
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{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, SECT_4K) },
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{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
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{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
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- { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
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{ "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
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{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
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{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
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@@ -671,11 +671,6 @@ static const struct spi_device_id *spi_n
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return ERR_PTR(-ENODEV);
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}
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-static const struct spi_device_id *jedec_probe(struct spi_nor *nor)
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-{
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- return nor->read_id(nor);
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-}
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-
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static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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@@ -920,7 +915,6 @@ int spi_nor_scan(struct spi_nor *nor, co
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enum read_mode mode)
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{
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struct flash_info *info;
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- struct flash_platform_data *data;
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struct device *dev = nor->dev;
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struct mtd_info *mtd = nor->mtd;
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struct device_node *np = dev->of_node;
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@@ -931,34 +925,12 @@ int spi_nor_scan(struct spi_nor *nor, co
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if (ret)
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return ret;
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- /* Platform data helps sort out which chip type we have, as
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- * well as how this board partitions it. If we don't have
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- * a chip ID, try the JEDEC id commands; they'll work for most
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- * newer chips, even if we don't recognize the particular chip.
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- */
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- data = dev_get_platdata(dev);
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- if (data && data->type) {
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- const struct spi_device_id *plat_id;
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-
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- for (i = 0; i < ARRAY_SIZE(spi_nor_ids) - 1; i++) {
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- plat_id = &spi_nor_ids[i];
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- if (strcmp(data->type, plat_id->name))
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- continue;
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- break;
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- }
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-
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- if (i < ARRAY_SIZE(spi_nor_ids) - 1)
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- id = plat_id;
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- else
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- dev_warn(dev, "unrecognized id %s\n", data->type);
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- }
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-
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info = (void *)id->driver_data;
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if (info->jedec_id) {
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const struct spi_device_id *jid;
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- jid = jedec_probe(nor);
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+ jid = nor->read_id(nor);
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if (IS_ERR(jid)) {
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return PTR_ERR(jid);
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} else if (jid != id) {
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@@ -990,11 +962,8 @@ int spi_nor_scan(struct spi_nor *nor, co
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write_sr(nor, 0);
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}
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- if (data && data->name)
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- mtd->name = data->name;
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- else
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+ if (!mtd->name)
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mtd->name = dev_name(dev);
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-
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mtd->type = MTD_NORFLASH;
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mtd->writesize = 1;
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mtd->flags = MTD_CAP_NORFLASH;
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@@ -1018,6 +987,7 @@ int spi_nor_scan(struct spi_nor *nor, co
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nor->wait_till_ready == spi_nor_wait_till_ready)
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nor->wait_till_ready = spi_nor_wait_till_fsr_ready;
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+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
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/* prefer "small sector" erase if possible */
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if (info->flags & SECT_4K) {
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nor->erase_opcode = SPINOR_OP_BE_4K;
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@@ -1025,7 +995,9 @@ int spi_nor_scan(struct spi_nor *nor, co
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} else if (info->flags & SECT_4K_PMC) {
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nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
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mtd->erasesize = 4096;
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- } else {
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+ } else
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+#endif
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+ {
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nor->erase_opcode = SPINOR_OP_SE;
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mtd->erasesize = info->sector_size;
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}
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@ -1,39 +0,0 @@
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -611,6 +611,7 @@ const struct spi_device_id spi_nor_ids[]
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{ "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64, SECT_4K) },
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{ "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64, SECT_4K) },
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{ "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) },
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+ { "m25px80", INFO(0x207114, 0, 64 * 1024, 16, 0) },
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/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
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{ "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) },
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@@ -623,7 +624,6 @@ const struct spi_device_id spi_nor_ids[]
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{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, SECT_4K) },
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{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
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{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
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- { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
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{ "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
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{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
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{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
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@@ -671,11 +671,6 @@ static const struct spi_device_id *spi_n
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return ERR_PTR(-ENODEV);
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}
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-static const struct spi_device_id *jedec_probe(struct spi_nor *nor)
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-{
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- return nor->read_id(nor);
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-}
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-
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static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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@@ -958,7 +953,7 @@ int spi_nor_scan(struct spi_nor *nor, co
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if (info->jedec_id) {
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const struct spi_device_id *jid;
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- jid = jedec_probe(nor);
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+ jid = nor->read_id(nor);
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if (IS_ERR(jid)) {
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return PTR_ERR(jid);
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} else if (jid != id) {
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@ -1,52 +0,0 @@
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -915,7 +915,6 @@ int spi_nor_scan(struct spi_nor *nor, co
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enum read_mode mode)
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{
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struct flash_info *info;
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- struct flash_platform_data *data;
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struct device *dev = nor->dev;
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struct mtd_info *mtd = nor->mtd;
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struct device_node *np = dev->of_node;
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@@ -926,28 +925,6 @@ int spi_nor_scan(struct spi_nor *nor, co
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if (ret)
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return ret;
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- /* Platform data helps sort out which chip type we have, as
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- * well as how this board partitions it. If we don't have
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- * a chip ID, try the JEDEC id commands; they'll work for most
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- * newer chips, even if we don't recognize the particular chip.
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- */
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- data = dev_get_platdata(dev);
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- if (data && data->type) {
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- const struct spi_device_id *plat_id;
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-
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- for (i = 0; i < ARRAY_SIZE(spi_nor_ids) - 1; i++) {
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- plat_id = &spi_nor_ids[i];
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- if (strcmp(data->type, plat_id->name))
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- continue;
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- break;
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- }
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-
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- if (i < ARRAY_SIZE(spi_nor_ids) - 1)
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- id = plat_id;
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- else
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- dev_warn(dev, "unrecognized id %s\n", data->type);
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- }
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-
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info = (void *)id->driver_data;
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if (info->jedec_id) {
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@@ -985,11 +962,8 @@ int spi_nor_scan(struct spi_nor *nor, co
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write_sr(nor, 0);
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}
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- if (data && data->name)
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- mtd->name = data->name;
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- else
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+ if (!mtd->name)
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mtd->name = dev_name(dev);
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-
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mtd->type = MTD_NORFLASH;
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mtd->writesize = 1;
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mtd->flags = MTD_CAP_NORFLASH;
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@ -1,44 +0,0 @@
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--- a/drivers/mtd/spi-nor/Kconfig
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+++ b/drivers/mtd/spi-nor/Kconfig
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@@ -7,6 +7,20 @@ menuconfig MTD_SPI_NOR
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if MTD_SPI_NOR
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+config MTD_SPI_NOR_USE_4K_SECTORS
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+ bool "Use small 4096 B erase sectors"
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+ default y
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+ help
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+ Many flash memories support erasing small (4096 B) sectors. Depending
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+ on the usage this feature may provide performance gain in comparison
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+ to erasing whole blocks (32/64 KiB).
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+ Changing small part of flash content is usually faster with small
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+ sectors. On the other hand erasing should be faster when using 64 KiB
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+ block instead of 16 × 4 KiB sectors.
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+
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+ Please note that some tools/drivers/filesystems may not work with
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+ 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
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+
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config SPI_FSL_QUADSPI
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tristate "Freescale Quad SPI controller"
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depends on ARCH_MXC
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -987,6 +987,7 @@ int spi_nor_scan(struct spi_nor *nor, co
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nor->wait_till_ready == spi_nor_wait_till_ready)
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nor->wait_till_ready = spi_nor_wait_till_fsr_ready;
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+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
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/* prefer "small sector" erase if possible */
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if (info->flags & SECT_4K) {
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nor->erase_opcode = SPINOR_OP_BE_4K;
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@@ -994,7 +995,9 @@ int spi_nor_scan(struct spi_nor *nor, co
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} else if (info->flags & SECT_4K_PMC) {
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nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
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mtd->erasesize = 4096;
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- } else {
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+ } else
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+#endif
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+ {
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nor->erase_opcode = SPINOR_OP_SE;
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mtd->erasesize = info->sector_size;
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}
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@ -1,6 +1,6 @@
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--- a/drivers/mtd/spi-nor/Kconfig
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--- a/drivers/mtd/spi-nor/Kconfig
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+++ b/drivers/mtd/spi-nor/Kconfig
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+++ b/drivers/mtd/spi-nor/Kconfig
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@@ -28,4 +28,10 @@ config SPI_FSL_QUADSPI
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@@ -14,4 +14,10 @@ config SPI_FSL_QUADSPI
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This enables support for the Quad SPI controller in master mode.
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This enables support for the Quad SPI controller in master mode.
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We only connect the NOR to this controller now.
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We only connect the NOR to this controller now.
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