ar71xx: kernel: enable PCI on QCA9556 SoC

This patch enables the PCI bus on the QCA9556 SoC, the same way it is
done on the same family SoC QCA9558.

Tested on a MikroTik RouterBoard wAPG-5HacT2HnD (wAP AC).

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
This commit is contained in:
Roger Pueyo Centelles 2018-01-08 12:30:28 +01:00 committed by Daniel Golle
parent 5352669c2c
commit 20e68f6d39
2 changed files with 24 additions and 0 deletions

View file

@ -0,0 +1,12 @@
--- a/arch/mips/ath79/pci.c
+++ b/arch/mips/ath79/pci.c
@@ -324,7 +324,8 @@ int __init ath79_register_pci(void)
QCA953X_PCI_MEM_SIZE,
0,
ATH79_IP2_IRQ(0));
- } else if (soc_is_qca9558()) {
+ } else if (soc_is_qca9558() ||
+ soc_is_qca9556()) {
pdev = ath79_register_pci_ar724x(0,
QCA955X_PCI_CFG_BASE0,
QCA955X_PCI_CTRL_BASE0,

View file

@ -0,0 +1,12 @@
--- a/arch/mips/ath79/pci.c
+++ b/arch/mips/ath79/pci.c
@@ -324,7 +324,8 @@ int __init ath79_register_pci(void)
QCA953X_PCI_MEM_SIZE,
0,
ATH79_IP2_IRQ(0));
- } else if (soc_is_qca9558()) {
+ } else if (soc_is_qca9558() ||
+ soc_is_qca9556()) {
pdev = ath79_register_pci_ar724x(0,
QCA955X_PCI_CFG_BASE0,
QCA955X_PCI_CTRL_BASE0,