nuke obsolete kernel stuff

SVN-Revision: 14875
This commit is contained in:
Felix Fietkau 2009-03-14 15:52:42 +00:00
parent b4644aedce
commit 16defbb2bd
705 changed files with 0 additions and 354417 deletions

View file

@ -1,57 +0,0 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -18,6 +18,22 @@ choice
prompt "System type"
default SGI_IP22
+config ADM5120
+ bool "Infineon/ADMtek ADM5120 SoC based machines"
+ select CEVT_R4K
+ select CSRC_R4K
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
+ select MIPS_MACHINE
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
@@ -687,6 +702,7 @@ config WR_PPMC
endchoice
+source "arch/mips/adm5120/Kconfig"
source "arch/mips/au1000/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/jazz/Kconfig"
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -174,6 +174,21 @@ cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/
load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
#
+# Infineon/ADMtek ADM5120
+#
+libs-$(CONFIG_ADM5120) += arch/mips/adm5120/prom/
+core-$(CONFIG_ADM5120) += arch/mips/adm5120/common/
+core-$(CONFIG_ADM5120_OEM_CELLVISION) += arch/mips/adm5120/cellvision/
+core-$(CONFIG_ADM5120_OEM_COMPEX) += arch/mips/adm5120/compex/
+core-$(CONFIG_ADM5120_OEM_EDIMAX) += arch/mips/adm5120/edimax/
+core-$(CONFIG_ADM5120_OEM_INFINEON) += arch/mips/adm5120/infineon/
+core-$(CONFIG_ADM5120_OEM_MIKROTIK) += arch/mips/adm5120/mikrotik/
+core-$(CONFIG_ADM5120_OEM_MOTOROLA) += arch/mips/adm5120/motorola/
+core-$(CONFIG_ADM5120_OEM_ZYXEL) += arch/mips/adm5120/zyxel/
+cflags-$(CONFIG_ADM5120) += -Iinclude/asm-mips/mach-adm5120
+load-$(CONFIG_ADM5120) += 0xffffffff80001000
+
+#
# Common Alchemy Au1x00 stuff
#
core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/

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@ -1,22 +0,0 @@
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -586,5 +586,9 @@ config MTD_PLATRAM
This selection automatically selects the map_ram driver.
+config MTD_ADM5120
+ tristate "Map driver for ADM5120 based boards"
+ depends on ADM5120
+
endmenu
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
obj-$(CONFIG_MTD_PCI) += pci.o
obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
+obj-$(CONFIG_MTD_ADM5120) += adm5120-flash.o
obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
obj-$(CONFIG_MTD_EDB7312) += edb7312.o
obj-$(CONFIG_MTD_IMPA7) += impa7.o

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@ -1,23 +0,0 @@
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -613,6 +613,10 @@ config MIPS_AU1X00_ENET
If you have an Alchemy Semi AU1X00 based system
say Y. Otherwise, say N.
+config ADM5120_ENET
+ tristate "ADM5120 Ethernet switch support"
+ depends on ADM5120
+
config SGI_IOC3_ETH
bool "SGI IOC3 Ethernet"
depends on PCI && SGI_IP27
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -186,6 +186,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
# This is also a 82596 and should probably be merged
obj-$(CONFIG_LP486E) += lp486e.o
+obj-$(CONFIG_ADM5120_ENET) += adm5120sw.o
obj-$(CONFIG_ETH16I) += eth16i.o
obj-$(CONFIG_ZORRO8390) += zorro8390.o
obj-$(CONFIG_HPLANCE) += hplance.o 7990.o

View file

@ -1,33 +0,0 @@
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -4,6 +4,10 @@
comment "USB Host Controller Drivers"
depends on USB
+config USB_ADM5120_HCD
+ tristate "ADM5120 HCD support (EXPERIMENTAL)"
+ depends on USB && ADM5120 && EXPERIMENTAL
+
config USB_C67X00_HCD
tristate "Cypress C67x00 HCD support"
depends on USB
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -10,6 +10,7 @@ isp1760-objs := isp1760-hcd.o isp1760-if
obj-$(CONFIG_PCI) += pci-quirks.o
+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o
obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_USB_UHCI_HCD) += host/
obj-$(CONFIG_USB_SL811_HCD) += host/
obj-$(CONFIG_USB_U132_HCD) += host/
obj-$(CONFIG_USB_R8A66597_HCD) += host/
+obj-$(CONFIG_USB_ADM5120_HCD) += host/
obj-$(CONFIG_USB_C67X00_HCD) += c67x00/

View file

@ -1,19 +0,0 @@
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -48,3 +48,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-
obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
+obj-$(CONFIG_ADM5120) += pci-adm5120.o
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1707,6 +1707,9 @@
#define PCI_VENDOR_ID_ESDGMBH 0x12fe
#define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
+#define PCI_VENDOR_ID_ADMTEK 0x1317
+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120
+
#define PCI_VENDOR_ID_SIIG 0x131f
#define PCI_SUBVENDOR_ID_SIIG 0x131f
#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000

View file

@ -1,22 +0,0 @@
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -207,4 +207,12 @@ config LEDS_TRIGGER_NETDEV
This allows LEDs to be controlled by network device activity.
If unsure, say Y.
+config LEDS_TRIGGER_ADM5120_SWITCH
+ tristate "LED ADM5120 Switch Port Status Trigger"
+ depends on LEDS_TRIGGERS && ADM5120
+ help
+ This allows LEDs to be controlled by the port states of
+ the ADM5120 built-in Ethernet Switch
+ If unsure, say N.
+
endif # NEW_LEDS
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_LEDS_TRIGGER_HEARTBEAT) +=
obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o
obj-$(CONFIG_LEDS_TRIGGER_MORSE) += ledtrig-morse.o
obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o
+obj-$(CONFIG_LEDS_TRIGGER_ADM5120_SWITCH) += ledtrig-adm5120-switch.o

View file

@ -1,91 +0,0 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -47,12 +47,19 @@
#define MANUFACTURER_AMD 0x0001
#define MANUFACTURER_ATMEL 0x001F
#define MANUFACTURER_SST 0x00BF
+#define MANUFACTURER_MACRONIX 0x00C2
#define SST49LF004B 0x0060
#define SST49LF040B 0x0050
#define SST49LF008A 0x005a
#define AT49BV6416 0x00d6
#define MANUFACTURER_SAMSUNG 0x00ec
+/* Macronix */
+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */
+#define MX29LV160T 0x22C4 /* MX29LV160 Top-boot chip */
+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */
+#define MX29LV320T 0x22A7 /* MX29LV320 Top-boot chip */
+
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
@@ -243,6 +250,41 @@ static void fixup_s29gl032n_sectors(stru
}
}
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+/*
+ * Some Macronix chips has no/bad bootblock information in the CFI table
+ */
+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
+{
+ struct map_info *map = mtd->priv;
+ struct cfi_private *cfi = map->fldrv_priv;
+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
+ __u8 t;
+
+ switch (cfi->id) {
+ /* TODO: put affected chip ids here */
+ case MX29LV160B:
+ case MX29LV320B:
+ t = 2; /* Bottom boot */
+ break;
+ case MX29LV160T:
+ case MX29LV320T:
+ t = 3; /* Top boot */
+ break;
+ default:
+ return;
+ }
+
+ if (extp->TopBottom == t)
+ /* boot location detected by the CFI layer is correct */
+ return;
+
+ extp->TopBottom = t;
+ printk("%s: Macronix chip detected, id:0x%04X, boot location forced "
+ "to %s\n", map->name, cfi->id, (t == 2) ? "bottom" : "top");
+}
+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
+
static struct cfi_fixup cfi_fixup_table[] = {
{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
#ifdef AMD_BOOTLOC_BUG
@@ -278,6 +320,9 @@ static struct cfi_fixup fixup_table[] =
*/
{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
{ CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL },
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
+#endif
{ 0, 0, NULL, NULL }
};
--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
@@ -196,6 +196,14 @@ config MTD_CFI_AMDSTD
provides support for one of those command sets, used on chips
including the AMD Am29LV320.
+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+ bool "Fix boot-block location for Macronix flash chips"
+ depends on MTD_CFI_AMDSTD
+ help
+ Some Macronix flash chips have no/wrong boot-block location in the
+ CFI table, and the driver may detect the type incorrectly. Select
+ this if your board has such chip.
+
config MTD_CFI_STAA
tristate "Support for ST (Advanced Architecture) flash chips"
depends on MTD_GEN_PROBE

View file

@ -1,68 +0,0 @@
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -121,6 +121,10 @@
#define UPD29F064115 0x221C
/* PMC */
+#define PM39LV512 0x001B
+#define PM39LV010 0x001C
+#define PM39LV020 0x003D
+#define PM39LV040 0x003E
#define PM49FL002 0x006D
#define PM49FL004 0x006E
#define PM49FL008 0x006A
@@ -1173,6 +1177,54 @@ static const struct amd_flash_info jedec
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1),
}
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV512,
+ .name = "PMC Pm39LV512",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_64KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,16),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV010,
+ .name = "PMC Pm39LV010",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_128KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,32),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV020,
+ .name = "PMC Pm39LV020",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_256KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,64),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV040,
+ .name = "PMC Pm39LV040",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_512KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,128),
+ }
}, {
.mfr_id = MANUFACTURER_PMC,
.dev_id = PM49FL002,

View file

@ -1,24 +0,0 @@
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -57,6 +57,11 @@ config MTD_ROOTFS_SPLIT
depends on MTD_PARTITIONS
default y
+config MTD_TRXSPLIT
+ bool "Automatically find and split TRX partitions"
+ depends on MTD_PARTITIONS
+ default n
+
config MTD_REDBOOT_PARTS
tristate "RedBoot partition table parsing"
depends on MTD_PARTITIONS
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -8,6 +8,7 @@ mtd-y := mtdcore.o mtdsuper.o
mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
+obj-$(CONFIG_MTD_TRXSPLIT) += trxsplit.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o

View file

@ -1,28 +0,0 @@
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_PATA_BF54X) += pata_bf54x.o
obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o
obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o
obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o
+obj-$(CONFIG_PATA_RB153_CF) += pata_rb153_cf.o
# Should be last but two libata driver
obj-$(CONFIG_PATA_ACPI) += pata_acpi.o
# Should be last but one libata driver
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -566,6 +566,15 @@ config PATA_RADISYS
If unsure, say N.
+config PATA_RB153_CF
+ tristate "RouterBOARD 153 Compact Flash support"
+ depends on ADM5120_MACH_RB_153
+ help
+ This option enables support for a Compact Flash connected on
+ the RouterBOARD 153.
+
+ If unsure, say N.
+
config PATA_RB532
tristate "RouterBoard 532 PATA CompactFlash support"
depends on MIKROTIK_RB532

View file

@ -1,15 +0,0 @@
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -126,7 +126,12 @@
/*
* Reserved space for exception handlers.
* Necessary for machines which link their kernels at KSEG0.
+ * Use as temporary storage for the kernel command line, so that it
+ * can be updated easily without having to relink the kernel.
*/
+
+EXPORT(_image_cmdline)
+ .ascii "CMDLINE:"
.fill 0x400
#endif

View file

@ -1,378 +0,0 @@
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -52,11 +52,10 @@
#include <asm/io.h>
-#define UART_NR 8
-
#define SERIAL_AMBA_MAJOR 204
#define SERIAL_AMBA_MINOR 16
-#define SERIAL_AMBA_NR UART_NR
+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
+#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME
#define AMBA_ISR_PASS_LIMIT 256
@@ -82,9 +81,9 @@ static void pl010_stop_tx(struct uart_po
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr &= ~UART010_CR_TIE;
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_start_tx(struct uart_port *port)
@@ -92,9 +91,9 @@ static void pl010_start_tx(struct uart_p
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr |= UART010_CR_TIE;
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_stop_rx(struct uart_port *port)
@@ -102,9 +101,9 @@ static void pl010_stop_rx(struct uart_po
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_enable_ms(struct uart_port *port)
@@ -112,9 +111,9 @@ static void pl010_enable_ms(struct uart_
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr |= UART010_CR_MSIE;
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_rx_chars(struct uart_amba_port *uap)
@@ -122,9 +121,9 @@ static void pl010_rx_chars(struct uart_a
struct tty_struct *tty = uap->port.info->tty;
unsigned int status, ch, flag, rsr, max_count = 256;
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
while (UART_RX_DATA(status) && max_count--) {
- ch = readb(uap->port.membase + UART01x_DR);
+ ch = __raw_readl(uap->port.membase + UART01x_DR);
flag = TTY_NORMAL;
uap->port.icount.rx++;
@@ -133,9 +132,9 @@ static void pl010_rx_chars(struct uart_a
* Note that the error handling code is
* out of the main execution path
*/
- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
if (unlikely(rsr & UART01x_RSR_ANY)) {
- writel(0, uap->port.membase + UART01x_ECR);
+ __raw_writel(0, uap->port.membase + UART01x_ECR);
if (rsr & UART01x_RSR_BE) {
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
@@ -165,7 +164,7 @@ static void pl010_rx_chars(struct uart_a
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
ignore_char:
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
}
spin_unlock(&uap->port.lock);
tty_flip_buffer_push(tty);
@@ -178,7 +177,7 @@ static void pl010_tx_chars(struct uart_a
int count;
if (uap->port.x_char) {
- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
uap->port.icount.tx++;
uap->port.x_char = 0;
return;
@@ -190,7 +189,7 @@ static void pl010_tx_chars(struct uart_a
count = uap->port.fifosize >> 1;
do {
- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
uap->port.icount.tx++;
if (uart_circ_empty(xmit))
@@ -208,9 +207,9 @@ static void pl010_modem_status(struct ua
{
unsigned int status, delta;
- writel(0, uap->port.membase + UART010_ICR);
+ __raw_writel(0, uap->port.membase + UART010_ICR);
- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
delta = status ^ uap->old_status;
uap->old_status = status;
@@ -238,7 +237,7 @@ static irqreturn_t pl010_int(int irq, vo
spin_lock(&uap->port.lock);
- status = readb(uap->port.membase + UART010_IIR);
+ status = __raw_readl(uap->port.membase + UART010_IIR);
if (status) {
do {
if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
@@ -251,7 +250,7 @@ static irqreturn_t pl010_int(int irq, vo
if (pass_counter-- == 0)
break;
- status = readb(uap->port.membase + UART010_IIR);
+ status = __raw_readl(uap->port.membase + UART010_IIR);
} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
UART010_IIR_TIS));
handled = 1;
@@ -265,7 +264,7 @@ static irqreturn_t pl010_int(int irq, vo
static unsigned int pl010_tx_empty(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
- unsigned int status = readb(uap->port.membase + UART01x_FR);
+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
}
@@ -275,7 +274,7 @@ static unsigned int pl010_get_mctrl(stru
unsigned int result = 0;
unsigned int status;
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
if (status & UART01x_FR_DCD)
result |= TIOCM_CAR;
if (status & UART01x_FR_DSR)
@@ -301,12 +300,12 @@ static void pl010_break_ctl(struct uart_
unsigned int lcr_h;
spin_lock_irqsave(&uap->port.lock, flags);
- lcr_h = readb(uap->port.membase + UART010_LCRH);
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
if (break_state == -1)
lcr_h |= UART01x_LCRH_BRK;
else
lcr_h &= ~UART01x_LCRH_BRK;
- writel(lcr_h, uap->port.membase + UART010_LCRH);
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
spin_unlock_irqrestore(&uap->port.lock, flags);
}
@@ -334,12 +333,12 @@ static int pl010_startup(struct uart_por
/*
* initialise the old status of the modem signals
*/
- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
/*
* Finally, enable interrupts
*/
- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
uap->port.membase + UART010_CR);
return 0;
@@ -362,10 +361,10 @@ static void pl010_shutdown(struct uart_p
/*
* disable all interrupts, disable the port
*/
- writel(0, uap->port.membase + UART010_CR);
+ __raw_writel(0, uap->port.membase + UART010_CR);
/* disable break condition and fifos */
- writel(readb(uap->port.membase + UART010_LCRH) &
+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
uap->port.membase + UART010_LCRH);
@@ -387,7 +386,7 @@ pl010_set_termios(struct uart_port *port
/*
* Ask the core to calculate the divisor for us.
*/
- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
quot = uart_get_divisor(port, baud);
switch (termios->c_cflag & CSIZE) {
@@ -450,25 +449,25 @@ pl010_set_termios(struct uart_port *port
uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
/* first, disable everything */
- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
if (UART_ENABLE_MS(port, termios->c_cflag))
old_cr |= UART010_CR_MSIE;
- writel(0, uap->port.membase + UART010_CR);
+ __raw_writel(0, uap->port.membase + UART010_CR);
/* Set baud rate */
quot -= 1;
- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
/*
* ----------v----------v----------v----------v-----
* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
* ----------^----------^----------^----------^-----
*/
- writel(lcr_h, uap->port.membase + UART010_LCRH);
- writel(old_cr, uap->port.membase + UART010_CR);
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
spin_unlock_irqrestore(&uap->port.lock, flags);
}
@@ -540,7 +539,7 @@ static struct uart_ops amba_pl010_pops =
.verify_port = pl010_verify_port,
};
-static struct uart_amba_port *amba_ports[UART_NR];
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
@@ -550,10 +549,10 @@ static void pl010_console_putchar(struct
unsigned int status;
do {
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
barrier();
} while (!UART_TX_READY(status));
- writel(ch, uap->port.membase + UART01x_DR);
+ __raw_writel(ch, uap->port.membase + UART01x_DR);
}
static void
@@ -567,8 +566,8 @@ pl010_console_write(struct console *co,
/*
* First save the CR then disable the interrupts
*/
- old_cr = readb(uap->port.membase + UART010_CR);
- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
uart_console_write(&uap->port, s, count, pl010_console_putchar);
@@ -577,10 +576,10 @@ pl010_console_write(struct console *co,
* and restore the TCR
*/
do {
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
barrier();
} while (status & UART01x_FR_BUSY);
- writel(old_cr, uap->port.membase + UART010_CR);
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
clk_disable(uap->clk);
}
@@ -589,9 +588,9 @@ static void __init
pl010_console_get_options(struct uart_amba_port *uap, int *baud,
int *parity, int *bits)
{
- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
unsigned int lcr_h, quot;
- lcr_h = readb(uap->port.membase + UART010_LCRH);
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
*parity = 'n';
if (lcr_h & UART01x_LCRH_PEN) {
@@ -606,8 +605,8 @@ pl010_console_get_options(struct uart_am
else
*bits = 8;
- quot = readb(uap->port.membase + UART010_LCRL) |
- readb(uap->port.membase + UART010_LCRM) << 8;
+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
*baud = uap->port.uartclk / (16 * (quot + 1));
}
}
@@ -625,7 +624,7 @@ static int __init pl010_console_setup(st
* if so, search for the first available port that does have
* console support.
*/
- if (co->index >= UART_NR)
+ if (co->index >= SERIAL_AMBA_NR)
co->index = 0;
uap = amba_ports[co->index];
if (!uap)
@@ -643,7 +642,7 @@ static int __init pl010_console_setup(st
static struct uart_driver amba_reg;
static struct console amba_console = {
- .name = "ttyAM",
+ .name = SERIAL_AMBA_NAME,
.write = pl010_console_write,
.device = uart_console_device,
.setup = pl010_console_setup,
@@ -659,11 +658,11 @@ static struct console amba_console = {
static struct uart_driver amba_reg = {
.owner = THIS_MODULE,
- .driver_name = "ttyAM",
- .dev_name = "ttyAM",
+ .driver_name = SERIAL_AMBA_NAME,
+ .dev_name = SERIAL_AMBA_NAME,
.major = SERIAL_AMBA_MAJOR,
.minor = SERIAL_AMBA_MINOR,
- .nr = UART_NR,
+ .nr = SERIAL_AMBA_NR,
.cons = AMBA_CONSOLE,
};
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -287,10 +287,25 @@ config SERIAL_AMBA_PL010
help
This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
an Integrator/AP or Integrator/PP2 platform, or if you have a
- Cirrus Logic EP93xx CPU, say Y or M here.
+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
If unsure, say N.
+config SERIAL_AMBA_PL010_NUMPORTS
+ int "Maximum number of AMBA PL010 serial ports"
+ depends on SERIAL_AMBA_PL010
+ default "8"
+ ---help---
+ Set this to the number of serial ports you want the AMBA PL010 driver
+ to support.
+
+config SERIAL_AMBA_PL010_PORTNAME
+ string "Name of the AMBA PL010 serial ports"
+ depends on SERIAL_AMBA_PL010
+ default "ttyAM"
+ ---help---
+ ::: To be written :::
+
config SERIAL_AMBA_PL010_CONSOLE
bool "Support for console on AMBA serial port"
depends on SERIAL_AMBA_PL010=y

View file

@ -1,13 +0,0 @@
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -17,6 +17,10 @@
#include <asm/io.h>
#include <asm/sizes.h>
+#ifndef NO_IRQ
+#define NO_IRQ (-1)
+#endif
+
#define to_amba_device(d) container_of(d, struct amba_device, dev)
#define to_amba_driver(d) container_of(d, struct amba_driver, drv)

View file

@ -1,46 +0,0 @@
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -42,6 +42,12 @@ config PCI_DEBUG
When in doubt, say N.
+config PCI_DISABLE_COMMON_QUIRKS
+ bool "PCI disable common quirks"
+ depends on PCI
+ help
+ If you don't know what to do here, say N.
+
config HT_IRQ
bool "Interrupts on hypertransport devices"
default y
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -24,6 +24,7 @@
#include <linux/kallsyms.h>
#include "pci.h"
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
/* The Mellanox Tavor device gives false positive parity errors
* Mark this device with a broken_parity_status, to allow
* PCI scanning code to "skip" this now blacklisted device.
@@ -1495,6 +1496,7 @@ static void __devinit fixup_rev1_53c810(
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end)
{
@@ -1561,6 +1563,7 @@ void pci_fixup_device(enum pci_fixup_pas
}
EXPORT_SYMBOL(pci_fixup_device);
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
/* Enable 1k I/O space granularity on the Intel P64H2 */
static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
{
@@ -1934,3 +1937,4 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AT
quirk_msi_intx_disable_bug);
#endif /* CONFIG_PCI_MSI */
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */

View file

@ -1,27 +0,0 @@
--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
@@ -43,13 +43,17 @@ static void gpio_led_set(struct led_clas
container_of(led_cdev, struct gpio_led_data, cdev);
int level;
- if (value == LED_OFF)
- level = 0;
- else
- level = 1;
-
- if (led_dat->active_low)
- level = !level;
+ switch (value) {
+ case LED_OFF:
+ level = led_dat->active_low ? 1 : 0;
+ break;
+ case LED_FULL:
+ level = led_dat->active_low ? 0 : 1;
+ break;
+ default:
+ level = value;
+ break;
+ }
/* Setting GPIOs with I2C/etc requires a task context, and we don't
* seem to have a reliable way to know if we're already in one; so

View file

@ -1,31 +0,0 @@
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -632,6 +632,18 @@ config SBC_EPX_C3_WATCHDOG
# MIPS Architecture
+config ADM5120_WDT
+ tristate "Infineon ADM5120 SoC hardware watchdog"
+ depends on WATCHDOG && ADM5120
+ help
+ This is a driver for hardware watchdog integrated in Infineon
+ ADM5120 SoC. This watchdog simply watches your kernel to make sure
+ it doesn't freeze, and if it does, it reboots your computer after a
+ certain amount of time.
+
+ To compile this driver as a module, choose M here: the module will be
+ called adm5120_wdt.
+
config INDYDOG
tristate "Indy/I2 Hardware Watchdog"
depends on SGI_HAS_INDYDOG
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc
# M68KNOMMU Architecture
# MIPS Architecture
+obj-$(CONFIG_ADM5120_WDT) += adm5120_wdt.o
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o

View file

@ -1,190 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ATM_DRIVERS=y
CONFIG_BASE_SMALL=0
CONFIG_BITREVERSE=y
CONFIG_BOOT_ELF32=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BT is not set
CONFIG_CMDLINE="init=/etc/preinit rootfstype=squashfs,jffs2,"
CONFIG_CPMAC=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_FIXED_MII_100_FDX=y
# CONFIG_FIXED_MII_10_FDX is not set
CONFIG_FIXED_PHY=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HID_SUPPORT=n
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_AR7_PARTS=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_START=0x10000000
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEVICES_MULTIQUEUE is not set
CONFIG_NET_ACT_POLICE=y
CONFIG_NET_SCH_FIFO=y
# CONFIG_NF_CT_PROTO_GRE is not set
# CONFIG_NF_NAT_PROTO_GRE is not set
CONFIG_NO_EXCEPT_FILL=y
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PCI is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_RTC is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_WAIT_SCAN is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_KGDB=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USER_NS is not set
# CONFIG_VGASTATE is not set
CONFIG_VLYNQ=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,198 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ATM_DRIVERS=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
CONFIG_BOOT_ELF32=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BT is not set
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="init=/etc/preinit rootfstype=squashfs,jffs2,"
CONFIG_CPMAC=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_FIXED_PHY=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
CONFIG_KALLSYMS=y
# CONFIG_LEDS_ALIX is not set
CONFIG_LEDS_GPIO=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MDIO_BITBANG is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_AR7_PARTS=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_START=0x10000000
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
CONFIG_NO_EXCEPT_FILL=y
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_RTC is not set
CONFIG_RTC_LIB=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_WAIT_SCAN is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
CONFIG_SLABINFO=y
CONFIG_SLUB=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SSB_POSSIBLE=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_KGDB=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USER_NS is not set
# CONFIG_VGASTATE is not set
CONFIG_VLYNQ=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,214 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATM_DRIVERS=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
CONFIG_BOOT_ELF32=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BT is not set
CONFIG_CEVT_R4K=y
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="init=/etc/preinit rootfstype=squashfs,jffs2,"
CONFIG_CPMAC=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CRYPTO_AEAD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CSRC_R4K=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_FIXED_PHY=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_IDE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KALLSYMS=y
# CONFIG_LEDS_ALIX is not set
CONFIG_LEDS_GPIO=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_LZO_COMPRESS is not set
# CONFIG_LZO_DECOMPRESS is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MDIO_BITBANG is not set
# CONFIG_MEMSTICK is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_AR7_PARTS=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_START=0x10000000
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
CONFIG_NO_EXCEPT_FILL=y
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_RTC is not set
CONFIG_RTC_LIB=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
CONFIG_SLABINFO=y
CONFIG_SLUB=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_SOUND is not set
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SSB_POSSIBLE=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_KGDB=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_DEV is not set
CONFIG_VLYNQ=y
# CONFIG_W1 is not set
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,94 +0,0 @@
Index: linux-2.6.23.17/arch/mips/Kconfig
===================================================================
--- linux-2.6.23.17.orig/arch/mips/Kconfig
+++ linux-2.6.23.17/arch/mips/Kconfig
@@ -15,6 +15,22 @@ choice
prompt "System type"
default SGI_IP22
+config AR7
+ bool "Texas Instruments AR7"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select NO_EXCEPT_FILL
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_KGDB
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_GPIO
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
Index: linux-2.6.23.17/arch/mips/kernel/traps.c
===================================================================
--- linux-2.6.23.17.orig/arch/mips/kernel/traps.c
+++ linux-2.6.23.17/arch/mips/kernel/traps.c
@@ -1075,10 +1075,23 @@ void *set_except_vector(int n, void *add
exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) {
- *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
- }
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */
+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */
+ *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */
+ *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
+ *(volatile u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }
+ }
return (void *)old_handler;
}
Index: linux-2.6.23.17/arch/mips/Makefile
===================================================================
--- linux-2.6.23.17.orig/arch/mips/Makefile
+++ linux-2.6.23.17/arch/mips/Makefile
@@ -161,6 +161,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
#
#
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7) += arch/mips/ar7/
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
+load-$(CONFIG_AR7) += 0xffffffff94100000
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
Index: linux-2.6.23.17/include/asm-mips/page.h
===================================================================
--- linux-2.6.23.17.orig/include/asm-mips/page.h
+++ linux-2.6.23.17/include/asm-mips/page.h
@@ -184,8 +184,10 @@ typedef struct { unsigned long pgprot; }
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
+ PHYS_OFFSET)
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
+ PHYS_OFFSET)
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>

View file

@ -1,43 +0,0 @@
Index: linux-2.6.23.17/drivers/mtd/Kconfig
===================================================================
--- linux-2.6.23.17.orig/drivers/mtd/Kconfig
+++ linux-2.6.23.17/drivers/mtd/Kconfig
@@ -160,6 +160,12 @@ config MTD_AFS_PARTS
for your particular device. It won't happen automatically. The
'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
+config MTD_AR7_PARTS
+ tristate "TI AR7 partitioning support"
+ depends on MTD_PARTITIONS
+ ---help---
+ TI AR7 partitioning support
+
comment "User Modules And Translation Layers"
config MTD_CHAR
Index: linux-2.6.23.17/drivers/mtd/Makefile
===================================================================
--- linux-2.6.23.17.orig/drivers/mtd/Makefile
+++ linux-2.6.23.17/drivers/mtd/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
# 'Users' - code which presents functionality to userspace.
obj-$(CONFIG_MTD_CHAR) += mtdchar.o
Index: linux-2.6.23.17/drivers/mtd/maps/physmap.c
===================================================================
--- linux-2.6.23.17.orig/drivers/mtd/maps/physmap.c
+++ linux-2.6.23.17/drivers/mtd/maps/physmap.c
@@ -74,7 +74,8 @@ static int physmap_flash_remove(struct p
static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
#ifdef CONFIG_MTD_PARTITIONS
-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
+static const char *part_probe_types[] = {"cmdlinepart", "RedBoot",
+ "ar7part", NULL };
#endif
static int physmap_flash_probe(struct platform_device *dev)

View file

@ -1,32 +0,0 @@
Index: linux-2.6.23.17/drivers/char/Kconfig
===================================================================
--- linux-2.6.23.17.orig/drivers/char/Kconfig
+++ linux-2.6.23.17/drivers/char/Kconfig
@@ -928,6 +928,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
Index: linux-2.6.23.17/drivers/char/Makefile
===================================================================
--- linux-2.6.23.17.orig/drivers/char/Makefile
+++ linux-2.6.23.17/drivers/char/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_COBALT_LCD) += lcd.o
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

View file

@ -1,21 +0,0 @@
Index: linux-2.6.23.17/drivers/Kconfig
===================================================================
--- linux-2.6.23.17.orig/drivers/Kconfig
+++ linux-2.6.23.17/drivers/Kconfig
@@ -93,4 +93,6 @@ source "drivers/kvm/Kconfig"
source "drivers/uio/Kconfig"
source "drivers/lguest/Kconfig"
+
+source "drivers/vlynq/Kconfig"
endmenu
Index: linux-2.6.23.17/drivers/Makefile
===================================================================
--- linux-2.6.23.17.orig/drivers/Makefile
+++ linux-2.6.23.17/drivers/Makefile
@@ -89,4 +89,5 @@ obj-$(CONFIG_DMA_ENGINE) += dma/
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_OF) += of/
+obj-$(CONFIG_VLYNQ) += vlynq/
obj-$(CONFIG_GPIO_DEVICE) += gpio/

View file

@ -1,29 +0,0 @@
Index: linux-2.6.23.17/drivers/char/watchdog/Kconfig
===================================================================
--- linux-2.6.23.17.orig/drivers/char/watchdog/Kconfig
+++ linux-2.6.23.17/drivers/char/watchdog/Kconfig
@@ -583,6 +583,12 @@ config SBC_EPX_C3_WATCHDOG
# MIPS Architecture
+config AR7_WDT
+ tristate "TI AR7 Watchdog Timer"
+ depends on WATCHDOG && AR7
+ help
+ Hardware driver for the TI AR7 Watchdog Timer.
+
config INDYDOG
tristate "Indy/I2 Hardware Watchdog"
depends on SGI_IP22
Index: linux-2.6.23.17/drivers/char/watchdog/Makefile
===================================================================
--- linux-2.6.23.17.orig/drivers/char/watchdog/Makefile
+++ linux-2.6.23.17/drivers/char/watchdog/Makefile
@@ -87,6 +87,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc
# M68KNOMMU Architecture
# MIPS Architecture
+obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o

View file

@ -1,32 +0,0 @@
Index: linux-2.6.23.17/drivers/net/Kconfig
===================================================================
--- linux-2.6.23.17.orig/drivers/net/Kconfig
+++ linux-2.6.23.17/drivers/net/Kconfig
@@ -1965,6 +1965,15 @@ config SC92031
To compile this driver as a module, choose M here: the module
will be called sc92031. This is recommended.
+config CPMAC
+ tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)"
+ depends on NET_ETHERNET && EXPERIMENTAL && AR7
+ select PHYLIB
+ select FIXED_PHY
+ select FIXED_MII_100_FDX
+ help
+ TI AR7 CPMAC Ethernet support
+
config NET_POCKET
bool "Pocket and portable adapters"
depends on PARPORT
Index: linux-2.6.23.17/drivers/net/Makefile
===================================================================
--- linux-2.6.23.17.orig/drivers/net/Makefile
+++ linux-2.6.23.17/drivers/net/Makefile
@@ -156,6 +156,7 @@ obj-$(CONFIG_8139CP) += 8139cp.o
obj-$(CONFIG_8139TOO) += 8139too.o
obj-$(CONFIG_ZNET) += znet.o
obj-$(CONFIG_LAN_SAA9730) += saa9730.o
+obj-$(CONFIG_CPMAC) += cpmac.o
obj-$(CONFIG_DEPCA) += depca.o
obj-$(CONFIG_EWRK3) += ewrk3.o
obj-$(CONFIG_ATP) += atp.o

View file

@ -1,93 +0,0 @@
Index: linux-2.6.23.17/drivers/net/phy/fixed.c
===================================================================
--- linux-2.6.23.17.orig/drivers/net/phy/fixed.c
+++ linux-2.6.23.17/drivers/net/phy/fixed.c
@@ -189,6 +189,19 @@ static struct phy_driver fixed_mdio_driv
.driver = { .owner = THIS_MODULE,},
};
+static void fixed_mdio_release (struct device * dev)
+{
+ struct phy_device *phydev = container_of(dev, struct phy_device, dev);
+ struct mii_bus *bus = phydev->bus;
+ struct fixed_info *fixed = bus->priv;
+
+ kfree(phydev);
+ kfree(bus->dev);
+ kfree(bus);
+ kfree(fixed->regs);
+ kfree(fixed);
+}
+
/*-----------------------------------------------------------------------------
* This func is used to create all the necessary stuff, bind
* the fixed phy driver and register all it on the mdio_bus_type.
@@ -224,6 +237,12 @@ static int fixed_mdio_register_device(in
}
fixed->regs = kzalloc(MII_REGS_NUM*sizeof(int), GFP_KERNEL);
+ if (NULL == fixed->regs) {
+ kfree(dev);
+ kfree(new_bus);
+ kfree(fixed);
+ return -ENOMEM;
+ }
fixed->regs_num = MII_REGS_NUM;
fixed->phy_status.speed = speed;
fixed->phy_status.duplex = duplex;
@@ -252,8 +271,11 @@ static int fixed_mdio_register_device(in
fixed->phydev = phydev;
if(NULL == phydev) {
- err = -ENOMEM;
- goto device_create_fail;
+ kfree(dev);
+ kfree(new_bus);
+ kfree(fixed->regs);
+ kfree(fixed);
+ return -ENOMEM;
}
phydev->irq = PHY_IGNORE_INTERRUPT;
@@ -265,8 +287,33 @@ static int fixed_mdio_register_device(in
else
snprintf(phydev->dev.bus_id, BUS_ID_SIZE,
"fixed@%d:%d", speed, duplex);
+
phydev->bus = new_bus;
+#if 1
+ phydev->dev.driver = &fixed_mdio_driver.driver;
+ phydev->dev.release = fixed_mdio_release;
+
+ err = phydev->dev.driver->probe(&phydev->dev);
+ if(err < 0) {
+ printk(KERN_ERR "Phy %s: problems with fixed driver\n",
+ phydev->dev.bus_id);
+ kfree(phydev);
+ kfree(dev);
+ kfree(new_bus);
+ kfree(fixed->regs);
+ kfree(fixed);
+ return err;
+ }
+
+ err = device_register(&phydev->dev);
+ if(err) {
+ printk(KERN_ERR "Phy %s failed to register\n",
+ phydev->dev.bus_id);
+ }
+
+ return 0;
+#else
err = device_register(&phydev->dev);
if(err) {
printk(KERN_ERR "Phy %s failed to register\n",
@@ -303,6 +350,7 @@ device_create_fail:
kfree(fixed);
return err;
+#endif
}
#endif

View file

@ -1,57 +0,0 @@
Index: linux-2.6.23.17/drivers/serial/8250.c
===================================================================
--- linux-2.6.23.17.orig/drivers/serial/8250.c
+++ linux-2.6.23.17/drivers/serial/8250.c
@@ -267,6 +267,13 @@ static const struct serial8250_config ua
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
@@ -2455,7 +2462,11 @@ static void serial8250_console_putchar(s
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_out(up, UART_TX, ch);
}
Index: linux-2.6.23.17/include/linux/serial_core.h
===================================================================
--- linux-2.6.23.17.orig/include/linux/serial_core.h
+++ linux-2.6.23.17/include/linux/serial_core.h
@@ -40,6 +40,7 @@
#define PORT_NS16550A 14
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
+#define PORT_AR7 16
#define PORT_MAX_8250 16 /* max port ID */
/*
Index: linux-2.6.23.17/include/linux/serialP.h
===================================================================
--- linux-2.6.23.17.orig/include/linux/serialP.h
+++ linux-2.6.23.17/include/linux/serialP.h
@@ -135,6 +135,10 @@ struct rs_multiport_struct {
* the interrupt line _up_ instead of down, so if we register the IRQ
* while the UART is in that state, we die in an IRQ storm. */
#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
+#elif defined(CONFIG_AR7)
+/* This is how it is set up by bootloader... */
+#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1 \
+ | UART_MCR_RTS | UART_MCR_DTR)
#else
#define ALPHA_KLUDGE_MCR 0
#endif

View file

@ -1,94 +0,0 @@
Index: linux-2.6.24.7/arch/mips/Kconfig
===================================================================
--- linux-2.6.24.7.orig/arch/mips/Kconfig
+++ linux-2.6.24.7/arch/mips/Kconfig
@@ -16,6 +16,24 @@ choice
prompt "System type"
default SGI_IP22
+config AR7
+ bool "Texas Instruments AR7"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select CEVT_R4K
+ select CSRC_R4K
+ select IRQ_CPU
+ select NO_EXCEPT_FILL
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_KGDB
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_GPIO
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
Index: linux-2.6.24.7/arch/mips/kernel/traps.c
===================================================================
--- linux-2.6.24.7.orig/arch/mips/kernel/traps.c
+++ linux-2.6.24.7/arch/mips/kernel/traps.c
@@ -1093,9 +1093,22 @@ void *set_except_vector(int n, void *add
exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) {
- *(u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */
+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */
+ *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */
+ *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
+ *(u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }
}
return (void *)old_handler;
}
Index: linux-2.6.24.7/arch/mips/Makefile
===================================================================
--- linux-2.6.24.7.orig/arch/mips/Makefile
+++ linux-2.6.24.7/arch/mips/Makefile
@@ -159,6 +159,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
#
#
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7) += arch/mips/ar7/
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
+load-$(CONFIG_AR7) += 0xffffffff94100000
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
Index: linux-2.6.24.7/include/asm-mips/page.h
===================================================================
--- linux-2.6.24.7.orig/include/asm-mips/page.h
+++ linux-2.6.24.7/include/asm-mips/page.h
@@ -184,8 +184,10 @@ typedef struct { unsigned long pgprot; }
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
+ PHYS_OFFSET)
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
+ PHYS_OFFSET)
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>

View file

@ -1,43 +0,0 @@
Index: linux-2.6.24.7/drivers/mtd/Kconfig
===================================================================
--- linux-2.6.24.7.orig/drivers/mtd/Kconfig
+++ linux-2.6.24.7/drivers/mtd/Kconfig
@@ -160,6 +160,12 @@ config MTD_AFS_PARTS
for your particular device. It won't happen automatically. The
'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
+config MTD_AR7_PARTS
+ tristate "TI AR7 partitioning support"
+ depends on MTD_PARTITIONS
+ ---help---
+ TI AR7 partitioning support
+
comment "User Modules And Translation Layers"
config MTD_CHAR
Index: linux-2.6.24.7/drivers/mtd/Makefile
===================================================================
--- linux-2.6.24.7.orig/drivers/mtd/Makefile
+++ linux-2.6.24.7/drivers/mtd/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
# 'Users' - code which presents functionality to userspace.
obj-$(CONFIG_MTD_CHAR) += mtdchar.o
Index: linux-2.6.24.7/drivers/mtd/maps/physmap.c
===================================================================
--- linux-2.6.24.7.orig/drivers/mtd/maps/physmap.c
+++ linux-2.6.24.7/drivers/mtd/maps/physmap.c
@@ -74,7 +74,8 @@ static int physmap_flash_remove(struct p
static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
#ifdef CONFIG_MTD_PARTITIONS
-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
+static const char *part_probe_types[] = {"cmdlinepart", "RedBoot",
+ "ar7part", NULL };
#endif
static int physmap_flash_probe(struct platform_device *dev)

View file

@ -1,32 +0,0 @@
Index: linux-2.6.24.7/drivers/char/Kconfig
===================================================================
--- linux-2.6.24.7.orig/drivers/char/Kconfig
+++ linux-2.6.24.7/drivers/char/Kconfig
@@ -904,6 +904,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
Index: linux-2.6.24.7/drivers/char/Makefile
===================================================================
--- linux-2.6.24.7.orig/drivers/char/Makefile
+++ linux-2.6.24.7/drivers/char/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_COBALT_LCD) += lcd.o
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

View file

@ -1,24 +0,0 @@
Index: linux-2.6.24.7/drivers/Kconfig
===================================================================
--- linux-2.6.24.7.orig/drivers/Kconfig
+++ linux-2.6.24.7/drivers/Kconfig
@@ -96,5 +96,7 @@ source "drivers/kvm/Kconfig"
source "drivers/uio/Kconfig"
+source "drivers/vlynq/Kconfig"
+
source "drivers/virtio/Kconfig"
endmenu
Index: linux-2.6.24.7/drivers/Makefile
===================================================================
--- linux-2.6.24.7.orig/drivers/Makefile
+++ linux-2.6.24.7/drivers/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_DCA) += dca/
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_OF) += of/
+obj-$(CONFIG_VLYNQ) += vlynq/
obj-$(CONFIG_SSB) += ssb/
obj-$(CONFIG_VIRTIO) += virtio/
obj-$(CONFIG_GPIO_DEVICE) += gpio/

View file

@ -1,268 +0,0 @@
Index: linux-2.6.24.7/drivers/net/cpmac.c
===================================================================
--- linux-2.6.24.7.orig/drivers/net/cpmac.c
+++ linux-2.6.24.7/drivers/net/cpmac.c
@@ -38,6 +38,7 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <asm/gpio.h>
+#include <asm/atomic.h>
MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>");
MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
@@ -207,6 +208,7 @@ struct cpmac_priv {
struct work_struct reset_work;
struct platform_device *pdev;
struct napi_struct napi;
+ atomic_t reset_pending;
};
static irqreturn_t cpmac_irq(int, void *);
@@ -455,6 +457,9 @@ static int cpmac_start_xmit(struct sk_bu
struct cpmac_desc *desc;
struct cpmac_priv *priv = netdev_priv(dev);
+ if (unlikely(atomic_read(&priv->reset_pending)))
+ return NETDEV_TX_BUSY;
+
if (unlikely(skb_padto(skb, ETH_ZLEN)))
return NETDEV_TX_OK;
@@ -634,14 +639,14 @@ static void cpmac_clear_tx(struct net_de
priv->desc_ring[i].dataflags = 0;
if (priv->desc_ring[i].skb) {
dev_kfree_skb_any(priv->desc_ring[i].skb);
- if (netif_subqueue_stopped(dev, i))
- netif_wake_subqueue(dev, i);
+ priv->desc_ring[i].skb = NULL;
}
}
}
static void cpmac_hw_error(struct work_struct *work)
{
+ int i;
struct cpmac_priv *priv =
container_of(work, struct cpmac_priv, reset_work);
@@ -650,8 +655,47 @@ static void cpmac_hw_error(struct work_s
spin_unlock(&priv->rx_lock);
cpmac_clear_tx(priv->dev);
cpmac_hw_start(priv->dev);
- napi_enable(&priv->napi);
- netif_start_queue(priv->dev);
+ barrier();
+ atomic_dec(&priv->reset_pending);
+
+ for (i = 0; i < CPMAC_QUEUES; i++) {
+ netif_wake_subqueue(priv->dev, i);
+ }
+ netif_wake_queue(priv->dev);
+ cpmac_write(priv->regs, CPMAC_MAC_INT_ENABLE, 3);
+}
+
+static void cpmac_check_status(struct net_device *dev)
+{
+ struct cpmac_priv *priv = netdev_priv(dev);
+
+ u32 macstatus = cpmac_read(priv->regs, CPMAC_MAC_STATUS);
+ int rx_channel = (macstatus >> 8) & 7;
+ int rx_code = (macstatus >> 12) & 15;
+ int tx_channel = (macstatus >> 16) & 7;
+ int tx_code = (macstatus >> 20) & 15;
+
+ if (rx_code || tx_code) {
+ if (netif_msg_drv(priv) && net_ratelimit()) {
+ /* Can't find any documentation on what these error codes actually are.
+ * So just log them and hope..
+ */
+ if (rx_code)
+ printk(KERN_WARNING "%s: host error %d on rx channel %d (macstatus %08x), resetting\n",
+ dev->name, rx_code, rx_channel, macstatus);
+ if (tx_code)
+ printk(KERN_WARNING "%s: host error %d on tx channel %d (macstatus %08x), resetting\n",
+ dev->name, tx_code, tx_channel, macstatus);
+ }
+
+ netif_stop_queue(dev);
+ cpmac_hw_stop(dev);
+ if (schedule_work(&priv->reset_work))
+ atomic_inc(&priv->reset_pending);
+ if (unlikely(netif_msg_hw(priv)))
+ cpmac_dump_regs(dev);
+ }
+ cpmac_write(priv->regs, CPMAC_MAC_INT_CLEAR, 0xff);
}
static irqreturn_t cpmac_irq(int irq, void *dev_id)
@@ -661,9 +705,6 @@ static irqreturn_t cpmac_irq(int irq, vo
int queue;
u32 status;
- if (!dev)
- return IRQ_NONE;
-
priv = netdev_priv(dev);
status = cpmac_read(priv->regs, CPMAC_MAC_INT_VECTOR);
@@ -685,49 +726,33 @@ static irqreturn_t cpmac_irq(int irq, vo
cpmac_write(priv->regs, CPMAC_MAC_EOI_VECTOR, 0);
- if (unlikely(status & (MAC_INT_HOST | MAC_INT_STATUS))) {
- if (netif_msg_drv(priv) && net_ratelimit())
- printk(KERN_ERR "%s: hw error, resetting...\n",
- dev->name);
- netif_stop_queue(dev);
- napi_disable(&priv->napi);
- cpmac_hw_stop(dev);
- schedule_work(&priv->reset_work);
- if (unlikely(netif_msg_hw(priv)))
- cpmac_dump_regs(dev);
- }
+ if (unlikely(status & (MAC_INT_HOST | MAC_INT_STATUS)))
+ cpmac_check_status(dev);
return IRQ_HANDLED;
}
static void cpmac_tx_timeout(struct net_device *dev)
{
- struct cpmac_priv *priv = netdev_priv(dev);
int i;
+ struct cpmac_priv *priv = netdev_priv(dev);
spin_lock(&priv->lock);
dev->stats.tx_errors++;
spin_unlock(&priv->lock);
if (netif_msg_tx_err(priv) && net_ratelimit())
printk(KERN_WARNING "%s: transmit timeout\n", dev->name);
- /*
- * FIXME: waking up random queue is not the best thing to
- * do... on the other hand why we got here at all?
- */
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
- for (i = 0; i < CPMAC_QUEUES; i++)
- if (priv->desc_ring[i].skb) {
- priv->desc_ring[i].dataflags = 0;
- dev_kfree_skb_any(priv->desc_ring[i].skb);
- netif_wake_subqueue(dev, i);
- break;
- }
-#else
- priv->desc_ring[0].dataflags = 0;
- if (priv->desc_ring[0].skb)
- dev_kfree_skb_any(priv->desc_ring[0].skb);
- netif_wake_queue(dev);
-#endif
+
+ atomic_inc(&priv->reset_pending);
+ barrier();
+ cpmac_clear_tx(dev);
+ barrier();
+ atomic_dec(&priv->reset_pending);
+
+ netif_wake_queue(priv->dev);
+ for (i = 0; i < CPMAC_QUEUES; i++) {
+ netif_wake_subqueue(dev, i);
+ }
}
static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
@@ -848,15 +873,6 @@ static void cpmac_adjust_link(struct net
spin_unlock(&priv->lock);
}
-static int cpmac_link_update(struct net_device *dev,
- struct fixed_phy_status *status)
-{
- status->link = 1;
- status->speed = 100;
- status->duplex = 1;
- return 0;
-}
-
static int cpmac_open(struct net_device *dev)
{
int i, size, res;
@@ -923,6 +939,7 @@ static int cpmac_open(struct net_device
goto fail_irq;
}
+ atomic_set(&priv->reset_pending, 0);
INIT_WORK(&priv->reset_work, cpmac_hw_error);
cpmac_hw_start(dev);
@@ -999,11 +1016,11 @@ static int external_switch;
static int __devinit cpmac_probe(struct platform_device *pdev)
{
int rc, phy_id, i;
+ int mdio_bus_id = cpmac_mii.id;
struct resource *mem;
struct cpmac_priv *priv;
struct net_device *dev;
struct plat_cpmac_data *pdata;
- struct fixed_info *fixed_phy;
DECLARE_MAC_BUF(mac);
pdata = pdev->dev.platform_data;
@@ -1017,9 +1034,23 @@ static int __devinit cpmac_probe(struct
}
if (phy_id == PHY_MAX_ADDR) {
- if (external_switch || dumb_switch)
+ if (external_switch || dumb_switch) {
+ struct fixed_phy_status status = {};
+
+ mdio_bus_id = 0;
+
+ /*
+ * FIXME: this should be in the platform code!
+ * Since there is not platform code at all (that is,
+ * no mainline users of that driver), place it here
+ * for now.
+ */
phy_id = 0;
- else {
+ status.link = 1;
+ status.duplex = 1;
+ status.speed = 100;
+ fixed_phy_add(PHY_POLL, phy_id, &status);
+ } else {
printk(KERN_ERR "cpmac: no PHY present\n");
return -ENODEV;
}
@@ -1063,32 +1094,8 @@ static int __devinit cpmac_probe(struct
priv->msg_enable = netif_msg_init(debug_level, 0xff);
memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
- if (phy_id == 31) {
- snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, cpmac_mii.id,
- phy_id);
- } else {
- /* Let's try to get a free fixed phy... */
- for (i = 0; i < MAX_PHY_AMNT; i++) {
- fixed_phy = fixed_mdio_get_phydev(i);
- if (!fixed_phy)
- continue;
- if (!fixed_phy->phydev->attached_dev) {
- strncpy(priv->phy_name,
- fixed_phy->phydev->dev.bus_id,
- BUS_ID_SIZE);
- fixed_mdio_set_link_update(fixed_phy->phydev,
- &cpmac_link_update);
- goto phy_found;
- }
- }
- if (netif_msg_drv(priv))
- printk(KERN_ERR "%s: Could not find fixed PHY\n",
- dev->name);
- rc = -ENODEV;
- goto fail;
- }
+ snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
-phy_found:
priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0,
PHY_INTERFACE_MODE_MII);
if (IS_ERR(priv->phy)) {

View file

@ -1,95 +0,0 @@
From 0daaa095cefd9d7091a7ccce2ff89f1ff4feae7a Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Wed, 5 Mar 2008 14:52:26 +0300
Subject: [PATCH] AR7/cpmac: convert to new fixed phy infrastructure, now for real
This patch converts platform code to register fixed phys early.
cpmac driver modified to blindly accept fixed phy id (that is equal
to platform device id).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/mips/ar7/platform.c | 17 +++++++++++++++++
drivers/net/cpmac.c | 19 +++----------------
2 files changed, 20 insertions(+), 16 deletions(-)
Index: linux-2.6.24.7/arch/mips/ar7/platform.c
===================================================================
--- linux-2.6.24.7.orig/arch/mips/ar7/platform.c
+++ linux-2.6.24.7/arch/mips/ar7/platform.c
@@ -33,6 +33,8 @@
#include <linux/vlynq.h>
#include <linux/leds.h>
#include <linux/string.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
#include <asm/addrspace.h>
#include <asm/ar7/ar7.h>
@@ -205,6 +207,13 @@ static struct physmap_flash_data physmap
.width = 2,
};
+/* lets assume this is suitable for both high and low cpmacs links */
+static struct fixed_phy_status fixed_phy_status __initdata = {
+ .link = 1,
+ .speed = 100,
+ .duplex = 1,
+};
+
static struct plat_cpmac_data cpmac_low_data = {
.reset_bit = 17,
.power_bit = 20,
@@ -506,6 +515,10 @@ static int __init ar7_register_devices(v
}
if (ar7_has_high_cpmac()) {
+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(1, cpmac_high_data.dev_addr);
res = platform_device_register(&cpmac_high);
if (res)
@@ -514,6 +527,10 @@ static int __init ar7_register_devices(v
cpmac_low_data.phy_mask = 0xffffffff;
}
+ res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(0, cpmac_low_data.dev_addr);
res = platform_device_register(&cpmac_low);
if (res)
Index: linux-2.6.24.7/drivers/net/cpmac.c
===================================================================
--- linux-2.6.24.7.orig/drivers/net/cpmac.c
+++ linux-2.6.24.7/drivers/net/cpmac.c
@@ -1035,23 +1035,10 @@ static int __devinit cpmac_probe(struct
if (phy_id == PHY_MAX_ADDR) {
if (external_switch || dumb_switch) {
- struct fixed_phy_status status = {};
-
- mdio_bus_id = 0;
-
- /*
- * FIXME: this should be in the platform code!
- * Since there is not platform code at all (that is,
- * no mainline users of that driver), place it here
- * for now.
- */
- phy_id = 0;
- status.link = 1;
- status.duplex = 1;
- status.speed = 100;
- fixed_phy_add(PHY_POLL, phy_id, &status);
+ mdio_bus_id = 0; /* fixed phys bus */
+ phy_id = pdev->id;
} else {
- printk(KERN_ERR "cpmac: no PHY present\n");
+ dev_err(&pdev->dev, "no PHY present\n");
return -ENODEV;
}
}

View file

@ -1,180 +0,0 @@
Index: linux-2.6.24.7/drivers/net/cpmac.c
===================================================================
--- linux-2.6.24.7.orig/drivers/net/cpmac.c
+++ linux-2.6.24.7/drivers/net/cpmac.c
@@ -187,6 +187,7 @@ struct cpmac_desc {
#define CPMAC_EOQ 0x1000
struct sk_buff *skb;
struct cpmac_desc *next;
+ struct cpmac_desc *prev;
dma_addr_t mapping;
dma_addr_t data_mapping;
};
@@ -242,6 +243,16 @@ static void cpmac_dump_desc(struct net_d
printk("\n");
}
+static void cpmac_dump_all_desc(struct net_device *dev)
+{
+ struct cpmac_priv *priv = netdev_priv(dev);
+ struct cpmac_desc *dump = priv->rx_head;
+ do {
+ cpmac_dump_desc(dev, dump);
+ dump = dump->next;
+ } while (dump != priv->rx_head);
+}
+
static void cpmac_dump_skb(struct net_device *dev, struct sk_buff *skb)
{
int i;
@@ -413,21 +424,40 @@ static struct sk_buff *cpmac_rx_one(stru
static int cpmac_poll(struct napi_struct *napi, int budget)
{
struct sk_buff *skb;
- struct cpmac_desc *desc;
- int received = 0;
+ struct cpmac_desc *desc, *restart;
struct cpmac_priv *priv = container_of(napi, struct cpmac_priv, napi);
+ int received = 0, processed = 0;
spin_lock(&priv->rx_lock);
if (unlikely(!priv->rx_head)) {
if (netif_msg_rx_err(priv) && net_ratelimit())
printk(KERN_WARNING "%s: rx: polling, but no queue\n",
priv->dev->name);
+ spin_unlock(&priv->rx_lock);
netif_rx_complete(priv->dev, napi);
return 0;
}
desc = priv->rx_head;
+ restart = NULL;
while (((desc->dataflags & CPMAC_OWN) == 0) && (received < budget)) {
+ processed++;
+
+ if ((desc->dataflags & CPMAC_EOQ) != 0) {
+ /* The last update to eoq->hw_next didn't happen soon enough, and the
+ * receiver stopped here. Remember this descriptor so we can restart
+ * the receiver after freeing some space.
+ */
+ if (unlikely(restart)) {
+ if (netif_msg_rx_err(priv))
+ printk(KERN_ERR "%s: poll found a duplicate EOQ: %p and %p\n",
+ priv->dev->name, restart, desc);
+ goto fatal_error;
+ }
+
+ restart = desc->next;
+ }
+
skb = cpmac_rx_one(priv, desc);
if (likely(skb)) {
netif_receive_skb(skb);
@@ -436,19 +466,81 @@ static int cpmac_poll(struct napi_struct
desc = desc->next;
}
+ if (desc != priv->rx_head) {
+ /* We freed some buffers, but not the whole ring, add what we did free to the rx list */
+ desc->prev->hw_next = (u32)0;
+ priv->rx_head->prev->hw_next = priv->rx_head->mapping;
+ }
+
+ /* Optimization: If we did not actually process an EOQ (perhaps because of
+ * quota limits), check to see if the tail of the queue has EOQ set. We
+ * should immediately restart in that case so that the receiver can restart
+ * and run in parallel with more packet processing. This lets us handle slightly
+ * larger bursts before running out of ring space (assuming dev->weight < ring_size)
+ */
+ if (!restart &&
+ (priv->rx_head->prev->dataflags & (CPMAC_OWN|CPMAC_EOQ)) == CPMAC_EOQ &&
+ (priv->rx_head->dataflags & CPMAC_OWN) != 0) {
+ /* reset EOQ so the poll loop (above) doesn't try to restart this when it
+ * eventually gets to this descriptor.
+ */
+ priv->rx_head->prev->dataflags &= ~CPMAC_EOQ;
+ restart = priv->rx_head;
+ }
+
+ if (restart) {
+ priv->dev->stats.rx_errors++;
+ priv->dev->stats.rx_fifo_errors++;
+ if (netif_msg_rx_err(priv) && net_ratelimit())
+ printk(KERN_WARNING "%s: rx dma ring overrun\n", priv->dev->name);
+
+ if (unlikely((restart->dataflags & CPMAC_OWN) == 0)) {
+ if (netif_msg_drv(priv))
+ printk(KERN_ERR "%s: cpmac_poll is trying to restart rx from a descriptor that's not free: %p\n",
+ priv->dev->name, restart);
+ goto fatal_error;
+ }
+
+ cpmac_write(priv->regs, CPMAC_RX_PTR(0), restart->mapping);
+ }
+
priv->rx_head = desc;
spin_unlock(&priv->rx_lock);
if (unlikely(netif_msg_rx_status(priv)))
printk(KERN_DEBUG "%s: poll processed %d packets\n",
priv->dev->name, received);
- if (desc->dataflags & CPMAC_OWN) {
+ if (processed == 0) {
+ /* we ran out of packets to read, revert to interrupt-driven mode */
netif_rx_complete(priv->dev, napi);
- cpmac_write(priv->regs, CPMAC_RX_PTR(0), (u32)desc->mapping);
cpmac_write(priv->regs, CPMAC_RX_INT_ENABLE, 1);
return 0;
}
return 1;
+
+fatal_error:
+ /* Something went horribly wrong. Reset hardware to try to recover rather than wedging. */
+
+ if (netif_msg_drv(priv)) {
+ printk(KERN_ERR "%s: cpmac_poll is confused. Resetting hardware\n", priv->dev->name);
+ cpmac_dump_all_desc(priv->dev);
+ printk(KERN_DEBUG "%s: RX_PTR(0)=0x%08x RX_ACK(0)=0x%08x\n",
+ priv->dev->name,
+ cpmac_read(priv->regs, CPMAC_RX_PTR(0)),
+ cpmac_read(priv->regs, CPMAC_RX_ACK(0)));
+ }
+
+ spin_unlock(&priv->rx_lock);
+ netif_rx_complete(priv->dev, napi);
+ netif_stop_queue(priv->dev);
+ napi_disable(&priv->napi);
+
+ atomic_inc(&priv->reset_pending);
+ cpmac_hw_stop(priv->dev);
+ if (!schedule_work(&priv->reset_work))
+ atomic_dec(&priv->reset_pending);
+ return 0;
+
}
static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
@@ -625,8 +717,10 @@ static void cpmac_clear_rx(struct net_de
desc->dataflags = CPMAC_OWN;
dev->stats.rx_dropped++;
}
+ desc->hw_next = desc->next->mapping;
desc = desc->next;
}
+ priv->rx_head->prev->hw_next = 0;
}
static void cpmac_clear_tx(struct net_device *dev)
@@ -928,9 +1022,12 @@ static int cpmac_open(struct net_device
desc->buflen = CPMAC_SKB_SIZE;
desc->dataflags = CPMAC_OWN;
desc->next = &priv->rx_head[(i + 1) % priv->ring_size];
+ desc->next->prev = desc;
desc->hw_next = (u32)desc->next->mapping;
}
+ priv->rx_head->prev->hw_next = (u32)0;
+
if ((res = request_irq(dev->irq, cpmac_irq, IRQF_SHARED,
dev->name, dev))) {
if (netif_msg_drv(priv))

View file

@ -1,15 +0,0 @@
Index: linux-2.6.24.7/drivers/net/cpmac.c
===================================================================
--- linux-2.6.24.7.orig/drivers/net/cpmac.c
+++ linux-2.6.24.7/drivers/net/cpmac.c
@@ -1178,9 +1178,7 @@ static int __devinit cpmac_probe(struct
priv->msg_enable = netif_msg_init(debug_level, 0xff);
memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
- snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
-
- priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0,
+ priv->phy = phy_connect(dev, cpmac_mii.phy_map[phy_id]->dev.bus_id, &cpmac_adjust_link, 0,
PHY_INTERFACE_MODE_MII);
if (IS_ERR(priv->phy)) {
if (netif_msg_drv(priv))

View file

@ -1,44 +0,0 @@
Index: linux-2.6.24.7/drivers/serial/8250.c
===================================================================
--- linux-2.6.24.7.orig/drivers/serial/8250.c
+++ linux-2.6.24.7/drivers/serial/8250.c
@@ -267,6 +267,13 @@ static const struct serial8250_config ua
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
@@ -2453,7 +2460,11 @@ static void serial8250_console_putchar(s
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_out(up, UART_TX, ch);
}
Index: linux-2.6.24.7/include/linux/serial_core.h
===================================================================
--- linux-2.6.24.7.orig/include/linux/serial_core.h
+++ linux-2.6.24.7/include/linux/serial_core.h
@@ -40,7 +40,8 @@
#define PORT_NS16550A 14
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
-#define PORT_MAX_8250 16 /* max port ID */
+#define PORT_AR7 17
+#define PORT_MAX_8250 17 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed

View file

@ -1,29 +0,0 @@
Index: linux-2.6.24.7/drivers/net/cpmac.c
===================================================================
--- linux-2.6.24.7.orig/drivers/net/cpmac.c
+++ linux-2.6.24.7/drivers/net/cpmac.c
@@ -936,7 +936,8 @@ static void cpmac_adjust_link(struct net
int new_state = 0;
spin_lock(&priv->lock);
- if (priv->phy->link) {
+ if (1 /* priv->phy->link */ ) {
+ netif_carrier_on(dev);
netif_start_queue(dev);
if (priv->phy->duplex != priv->oldduplex) {
new_state = 1;
@@ -948,11 +949,11 @@ static void cpmac_adjust_link(struct net
priv->oldspeed = priv->phy->speed;
}
- if (!priv->oldlink) {
+ /*if (!priv->oldlink) {
new_state = 1;
- priv->oldlink = 1;
+ priv->oldlink = 1;*/
netif_schedule(dev);
- }
+ /*}*/
} else if (priv->oldlink) {
netif_stop_queue(dev);
new_state = 1;

View file

@ -1,86 +0,0 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -18,6 +18,24 @@
prompt "System type"
default SGI_IP22
+config AR7
+ bool "Texas Instruments AR7"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select CEVT_R4K
+ select CSRC_R4K
+ select IRQ_CPU
+ select NO_EXCEPT_FILL
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_KGDB
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_GPIO
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1112,9 +1112,22 @@
exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) {
- *(u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */
+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */
+ *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */
+ *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
+ *(u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }
}
return (void *)old_handler;
}
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -167,6 +167,13 @@
#
#
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7) += arch/mips/ar7/
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
+load-$(CONFIG_AR7) += 0xffffffff94100000
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -182,8 +182,10 @@
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
+ PHYS_OFFSET)
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
+ PHYS_OFFSET)
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>

View file

@ -1,37 +0,0 @@
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -168,6 +168,12 @@
the partition map from the children of the flash node,
as described in Documentation/powerpc/booting-without-of.txt.
+config MTD_AR7_PARTS
+ tristate "TI AR7 partitioning support"
+ depends on MTD_PARTITIONS
+ ---help---
+ TI AR7 partitioning support
+
comment "User Modules And Translation Layers"
config MTD_CHAR
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -12,6 +12,7 @@
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
+obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
# 'Users' - code which presents functionality to userspace.
obj-$(CONFIG_MTD_CHAR) += mtdchar.o
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -87,7 +87,8 @@
static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
#ifdef CONFIG_MTD_PARTITIONS
-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
+static const char *part_probe_types[] = {"cmdlinepart", "RedBoot",
+ "ar7part", NULL };
#endif
static int physmap_flash_probe(struct platform_device *dev)

View file

@ -1,28 +0,0 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -913,6 +913,15 @@
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -90,6 +90,7 @@
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

View file

@ -1,18 +0,0 @@
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -97,4 +97,6 @@
source "drivers/auxdisplay/Kconfig"
source "drivers/uio/Kconfig"
+
+source "drivers/vlynq/Kconfig"
endmenu
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -91,5 +91,6 @@
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_OF) += of/
+obj-$(CONFIG_VLYNQ) += vlynq/
obj-$(CONFIG_SSB) += ssb/
obj-$(CONFIG_VIRTIO) += virtio/

View file

@ -1,167 +0,0 @@
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -38,6 +38,7 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <asm/gpio.h>
+#include <asm/atomic.h>
MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>");
MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
@@ -207,6 +208,7 @@
struct work_struct reset_work;
struct platform_device *pdev;
struct napi_struct napi;
+ atomic_t reset_pending;
};
static irqreturn_t cpmac_irq(int, void *);
@@ -455,6 +457,9 @@
struct cpmac_desc *desc;
struct cpmac_priv *priv = netdev_priv(dev);
+ if (unlikely(atomic_read(&priv->reset_pending)))
+ return NETDEV_TX_BUSY;
+
if (unlikely(skb_padto(skb, ETH_ZLEN)))
return NETDEV_TX_OK;
@@ -634,14 +639,14 @@
priv->desc_ring[i].dataflags = 0;
if (priv->desc_ring[i].skb) {
dev_kfree_skb_any(priv->desc_ring[i].skb);
- if (netif_subqueue_stopped(dev, i))
- netif_wake_subqueue(dev, i);
+ priv->desc_ring[i].skb = NULL;
}
}
}
static void cpmac_hw_error(struct work_struct *work)
{
+ int i;
struct cpmac_priv *priv =
container_of(work, struct cpmac_priv, reset_work);
@@ -650,8 +655,47 @@
spin_unlock(&priv->rx_lock);
cpmac_clear_tx(priv->dev);
cpmac_hw_start(priv->dev);
- napi_enable(&priv->napi);
- netif_start_queue(priv->dev);
+ barrier();
+ atomic_dec(&priv->reset_pending);
+
+ for (i = 0; i < CPMAC_QUEUES; i++) {
+ netif_wake_subqueue(priv->dev, i);
+ }
+ netif_wake_queue(priv->dev);
+ cpmac_write(priv->regs, CPMAC_MAC_INT_ENABLE, 3);
+}
+
+static void cpmac_check_status(struct net_device *dev)
+{
+ struct cpmac_priv *priv = netdev_priv(dev);
+
+ u32 macstatus = cpmac_read(priv->regs, CPMAC_MAC_STATUS);
+ int rx_channel = (macstatus >> 8) & 7;
+ int rx_code = (macstatus >> 12) & 15;
+ int tx_channel = (macstatus >> 16) & 7;
+ int tx_code = (macstatus >> 20) & 15;
+
+ if (rx_code || tx_code) {
+ if (netif_msg_drv(priv) && net_ratelimit()) {
+ /* Can't find any documentation on what these error codes actually are.
+ * So just log them and hope..
+ */
+ if (rx_code)
+ printk(KERN_WARNING "%s: host error %d on rx channel %d (macstatus %08x), resetting\n",
+ dev->name, rx_code, rx_channel, macstatus);
+ if (tx_code)
+ printk(KERN_WARNING "%s: host error %d on tx channel %d (macstatus %08x), resetting\n",
+ dev->name, tx_code, tx_channel, macstatus);
+ }
+
+ netif_stop_queue(dev);
+ cpmac_hw_stop(dev);
+ if (schedule_work(&priv->reset_work))
+ atomic_inc(&priv->reset_pending);
+ if (unlikely(netif_msg_hw(priv)))
+ cpmac_dump_regs(dev);
+ }
+ cpmac_write(priv->regs, CPMAC_MAC_INT_CLEAR, 0xff);
}
static irqreturn_t cpmac_irq(int irq, void *dev_id)
@@ -682,49 +726,33 @@
cpmac_write(priv->regs, CPMAC_MAC_EOI_VECTOR, 0);
- if (unlikely(status & (MAC_INT_HOST | MAC_INT_STATUS))) {
- if (netif_msg_drv(priv) && net_ratelimit())
- printk(KERN_ERR "%s: hw error, resetting...\n",
- dev->name);
- netif_stop_queue(dev);
- napi_disable(&priv->napi);
- cpmac_hw_stop(dev);
- schedule_work(&priv->reset_work);
- if (unlikely(netif_msg_hw(priv)))
- cpmac_dump_regs(dev);
- }
+ if (unlikely(status & (MAC_INT_HOST | MAC_INT_STATUS)))
+ cpmac_check_status(dev);
return IRQ_HANDLED;
}
static void cpmac_tx_timeout(struct net_device *dev)
{
- struct cpmac_priv *priv = netdev_priv(dev);
int i;
+ struct cpmac_priv *priv = netdev_priv(dev);
spin_lock(&priv->lock);
dev->stats.tx_errors++;
spin_unlock(&priv->lock);
if (netif_msg_tx_err(priv) && net_ratelimit())
printk(KERN_WARNING "%s: transmit timeout\n", dev->name);
- /*
- * FIXME: waking up random queue is not the best thing to
- * do... on the other hand why we got here at all?
- */
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
- for (i = 0; i < CPMAC_QUEUES; i++)
- if (priv->desc_ring[i].skb) {
- priv->desc_ring[i].dataflags = 0;
- dev_kfree_skb_any(priv->desc_ring[i].skb);
- netif_wake_subqueue(dev, i);
- break;
- }
-#else
- priv->desc_ring[0].dataflags = 0;
- if (priv->desc_ring[0].skb)
- dev_kfree_skb_any(priv->desc_ring[0].skb);
- netif_wake_queue(dev);
-#endif
+
+ atomic_inc(&priv->reset_pending);
+ barrier();
+ cpmac_clear_tx(dev);
+ barrier();
+ atomic_dec(&priv->reset_pending);
+
+ netif_wake_queue(priv->dev);
+ for (i = 0; i < CPMAC_QUEUES; i++) {
+ netif_wake_subqueue(dev, i);
+ }
}
static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
@@ -911,6 +939,7 @@
goto fail_irq;
}
+ atomic_set(&priv->reset_pending, 0);
INIT_WORK(&priv->reset_work, cpmac_hw_error);
cpmac_hw_start(dev);

View file

@ -1,11 +0,0 @@
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1874,7 +1874,7 @@
config CPMAC
tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)"
- depends on NET_ETHERNET && EXPERIMENTAL && AR7 && BROKEN
+ depends on NET_ETHERNET && EXPERIMENTAL && AR7
select PHYLIB
help
TI AR7 CPMAC Ethernet support

View file

@ -1,91 +0,0 @@
From 0daaa095cefd9d7091a7ccce2ff89f1ff4feae7a Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Wed, 5 Mar 2008 14:52:26 +0300
Subject: [PATCH] AR7/cpmac: convert to new fixed phy infrastructure, now for real
This patch converts platform code to register fixed phys early.
cpmac driver modified to blindly accept fixed phy id (that is equal
to platform device id).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/mips/ar7/platform.c | 17 +++++++++++++++++
drivers/net/cpmac.c | 19 +++----------------
2 files changed, 20 insertions(+), 16 deletions(-)
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -33,6 +33,8 @@
#include <linux/vlynq.h>
#include <linux/leds.h>
#include <linux/string.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
#include <asm/addrspace.h>
#include <asm/ar7/ar7.h>
@@ -205,6 +207,13 @@
.width = 2,
};
+/* lets assume this is suitable for both high and low cpmacs links */
+static struct fixed_phy_status fixed_phy_status __initdata = {
+ .link = 1,
+ .speed = 100,
+ .duplex = 1,
+};
+
static struct plat_cpmac_data cpmac_low_data = {
.reset_bit = 17,
.power_bit = 20,
@@ -506,6 +515,10 @@
}
if (ar7_has_high_cpmac()) {
+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(1, cpmac_high_data.dev_addr);
res = platform_device_register(&cpmac_high);
if (res)
@@ -514,6 +527,10 @@
cpmac_low_data.phy_mask = 0xffffffff;
}
+ res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(0, cpmac_low_data.dev_addr);
res = platform_device_register(&cpmac_low);
if (res)
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -1035,23 +1035,10 @@
if (phy_id == PHY_MAX_ADDR) {
if (external_switch || dumb_switch) {
- struct fixed_phy_status status = {};
-
- mdio_bus_id = 0;
-
- /*
- * FIXME: this should be in the platform code!
- * Since there is not platform code at all (that is,
- * no mainline users of that driver), place it here
- * for now.
- */
- phy_id = 0;
- status.link = 1;
- status.duplex = 1;
- status.speed = 100;
- fixed_phy_add(PHY_POLL, phy_id, &status);
+ mdio_bus_id = 0; /* fixed phys bus */
+ phy_id = pdev->id;
} else {
- printk(KERN_ERR "cpmac: no PHY present\n");
+ dev_err(&pdev->dev, "no PHY present\n");
return -ENODEV;
}
}

View file

@ -1,178 +0,0 @@
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -187,6 +187,7 @@
#define CPMAC_EOQ 0x1000
struct sk_buff *skb;
struct cpmac_desc *next;
+ struct cpmac_desc *prev;
dma_addr_t mapping;
dma_addr_t data_mapping;
};
@@ -242,6 +243,16 @@
printk("\n");
}
+static void cpmac_dump_all_desc(struct net_device *dev)
+{
+ struct cpmac_priv *priv = netdev_priv(dev);
+ struct cpmac_desc *dump = priv->rx_head;
+ do {
+ cpmac_dump_desc(dev, dump);
+ dump = dump->next;
+ } while (dump != priv->rx_head);
+}
+
static void cpmac_dump_skb(struct net_device *dev, struct sk_buff *skb)
{
int i;
@@ -413,21 +424,40 @@
static int cpmac_poll(struct napi_struct *napi, int budget)
{
struct sk_buff *skb;
- struct cpmac_desc *desc;
- int received = 0;
+ struct cpmac_desc *desc, *restart;
struct cpmac_priv *priv = container_of(napi, struct cpmac_priv, napi);
+ int received = 0, processed = 0;
spin_lock(&priv->rx_lock);
if (unlikely(!priv->rx_head)) {
if (netif_msg_rx_err(priv) && net_ratelimit())
printk(KERN_WARNING "%s: rx: polling, but no queue\n",
priv->dev->name);
+ spin_unlock(&priv->rx_lock);
netif_rx_complete(priv->dev, napi);
return 0;
}
desc = priv->rx_head;
+ restart = NULL;
while (((desc->dataflags & CPMAC_OWN) == 0) && (received < budget)) {
+ processed++;
+
+ if ((desc->dataflags & CPMAC_EOQ) != 0) {
+ /* The last update to eoq->hw_next didn't happen soon enough, and the
+ * receiver stopped here. Remember this descriptor so we can restart
+ * the receiver after freeing some space.
+ */
+ if (unlikely(restart)) {
+ if (netif_msg_rx_err(priv))
+ printk(KERN_ERR "%s: poll found a duplicate EOQ: %p and %p\n",
+ priv->dev->name, restart, desc);
+ goto fatal_error;
+ }
+
+ restart = desc->next;
+ }
+
skb = cpmac_rx_one(priv, desc);
if (likely(skb)) {
netif_receive_skb(skb);
@@ -436,19 +466,81 @@
desc = desc->next;
}
+ if (desc != priv->rx_head) {
+ /* We freed some buffers, but not the whole ring, add what we did free to the rx list */
+ desc->prev->hw_next = (u32)0;
+ priv->rx_head->prev->hw_next = priv->rx_head->mapping;
+ }
+
+ /* Optimization: If we did not actually process an EOQ (perhaps because of
+ * quota limits), check to see if the tail of the queue has EOQ set. We
+ * should immediately restart in that case so that the receiver can restart
+ * and run in parallel with more packet processing. This lets us handle slightly
+ * larger bursts before running out of ring space (assuming dev->weight < ring_size)
+ */
+ if (!restart &&
+ (priv->rx_head->prev->dataflags & (CPMAC_OWN|CPMAC_EOQ)) == CPMAC_EOQ &&
+ (priv->rx_head->dataflags & CPMAC_OWN) != 0) {
+ /* reset EOQ so the poll loop (above) doesn't try to restart this when it
+ * eventually gets to this descriptor.
+ */
+ priv->rx_head->prev->dataflags &= ~CPMAC_EOQ;
+ restart = priv->rx_head;
+ }
+
+ if (restart) {
+ priv->dev->stats.rx_errors++;
+ priv->dev->stats.rx_fifo_errors++;
+ if (netif_msg_rx_err(priv) && net_ratelimit())
+ printk(KERN_WARNING "%s: rx dma ring overrun\n", priv->dev->name);
+
+ if (unlikely((restart->dataflags & CPMAC_OWN) == 0)) {
+ if (netif_msg_drv(priv))
+ printk(KERN_ERR "%s: cpmac_poll is trying to restart rx from a descriptor that's not free: %p\n",
+ priv->dev->name, restart);
+ goto fatal_error;
+ }
+
+ cpmac_write(priv->regs, CPMAC_RX_PTR(0), restart->mapping);
+ }
+
priv->rx_head = desc;
spin_unlock(&priv->rx_lock);
if (unlikely(netif_msg_rx_status(priv)))
printk(KERN_DEBUG "%s: poll processed %d packets\n",
priv->dev->name, received);
- if (desc->dataflags & CPMAC_OWN) {
+ if (processed == 0) {
+ /* we ran out of packets to read, revert to interrupt-driven mode */
netif_rx_complete(priv->dev, napi);
- cpmac_write(priv->regs, CPMAC_RX_PTR(0), (u32)desc->mapping);
cpmac_write(priv->regs, CPMAC_RX_INT_ENABLE, 1);
return 0;
}
return 1;
+
+fatal_error:
+ /* Something went horribly wrong. Reset hardware to try to recover rather than wedging. */
+
+ if (netif_msg_drv(priv)) {
+ printk(KERN_ERR "%s: cpmac_poll is confused. Resetting hardware\n", priv->dev->name);
+ cpmac_dump_all_desc(priv->dev);
+ printk(KERN_DEBUG "%s: RX_PTR(0)=0x%08x RX_ACK(0)=0x%08x\n",
+ priv->dev->name,
+ cpmac_read(priv->regs, CPMAC_RX_PTR(0)),
+ cpmac_read(priv->regs, CPMAC_RX_ACK(0)));
+ }
+
+ spin_unlock(&priv->rx_lock);
+ netif_rx_complete(priv->dev, napi);
+ netif_stop_queue(priv->dev);
+ napi_disable(&priv->napi);
+
+ atomic_inc(&priv->reset_pending);
+ cpmac_hw_stop(priv->dev);
+ if (!schedule_work(&priv->reset_work))
+ atomic_dec(&priv->reset_pending);
+ return 0;
+
}
static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
@@ -625,8 +717,10 @@
desc->dataflags = CPMAC_OWN;
dev->stats.rx_dropped++;
}
+ desc->hw_next = desc->next->mapping;
desc = desc->next;
}
+ priv->rx_head->prev->hw_next = 0;
}
static void cpmac_clear_tx(struct net_device *dev)
@@ -928,9 +1022,12 @@
desc->buflen = CPMAC_SKB_SIZE;
desc->dataflags = CPMAC_OWN;
desc->next = &priv->rx_head[(i + 1) % priv->ring_size];
+ desc->next->prev = desc;
desc->hw_next = (u32)desc->next->mapping;
}
+ priv->rx_head->prev->hw_next = (u32)0;
+
if ((res = request_irq(dev->irq, cpmac_irq, IRQF_SHARED,
dev->name, dev))) {
if (netif_msg_drv(priv))

View file

@ -1,13 +0,0 @@
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -1178,9 +1178,7 @@
priv->msg_enable = netif_msg_init(debug_level, 0xff);
memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
- snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
-
- priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0,
+ priv->phy = phy_connect(dev, cpmac_mii.phy_map[phy_id]->dev.bus_id, &cpmac_adjust_link, 0,
PHY_INTERFACE_MODE_MII);
if (IS_ERR(priv->phy)) {
if (netif_msg_drv(priv))

View file

@ -1,54 +0,0 @@
--- a/drivers/mtd/ar7part.c
+++ b/drivers/mtd/ar7part.c
@@ -34,6 +34,10 @@
#define LOADER_MAGIC1 le32_to_cpu(0xfeedfa42)
#define LOADER_MAGIC2 le32_to_cpu(0xfeed1281)
+#ifndef SQUASHFS_MAGIC
+#define SQUASHFS_MAGIC 0x73717368
+#endif
+
struct ar7_bin_rec {
unsigned int checksum;
unsigned int length;
@@ -47,7 +51,8 @@
unsigned long origin)
{
struct ar7_bin_rec header;
- unsigned int offset, len;
+ unsigned int offset;
+ size_t len;
unsigned int pre_size = master->erasesize, post_size = 0;
unsigned int root_offset = ROOT_OFFSET;
@@ -66,7 +71,7 @@
do { /* Try 10 blocks starting from master->erasesize */
offset = pre_size;
master->read(master, offset,
- sizeof(header), &len, (u8 *)&header);
+ sizeof(header), &len, (uint8_t *)&header);
if (!strncmp((char *)&header, "TIENV0.8", 8))
ar7_parts[1].offset = pre_size;
if (header.checksum == LOADER_MAGIC1)
@@ -88,7 +93,7 @@
while (header.length) {
offset += sizeof(header) + header.length;
master->read(master, offset, sizeof(header),
- &len, (u8 *)&header);
+ &len, (uint8_t *)&header);
}
root_offset = offset + sizeof(header) + 4;
break;
@@ -96,10 +101,10 @@
while (header.length) {
offset += sizeof(header) + header.length;
master->read(master, offset, sizeof(header),
- &len, (u8 *)&header);
+ &len, (uint8_t *)&header);
}
root_offset = offset + sizeof(header) + 4 + 0xff;
- root_offset &= ~(u32)0xff;
+ root_offset &= ~(uint32_t)0xff;
break;
default:
printk(KERN_WARNING "Unknown magic: %08x\n", header.checksum);

View file

@ -1,40 +0,0 @@
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -267,6 +267,13 @@
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
@@ -2457,7 +2464,11 @@
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_out(up, UART_TX, ch);
}
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -40,7 +40,8 @@
#define PORT_NS16550A 14
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
-#define PORT_MAX_8250 16 /* max port ID */
+#define PORT_AR7 17
+#define PORT_MAX_8250 17 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed

View file

@ -1,27 +0,0 @@
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -936,7 +936,8 @@
int new_state = 0;
spin_lock(&priv->lock);
- if (priv->phy->link) {
+ if (1 /* priv->phy->link */) {
+ netif_carrier_on(dev);
netif_start_queue(dev);
if (priv->phy->duplex != priv->oldduplex) {
new_state = 1;
@@ -948,11 +949,11 @@
priv->oldspeed = priv->phy->speed;
}
- if (!priv->oldlink) {
+ /*if (!priv->oldlink) {
new_state = 1;
- priv->oldlink = 1;
+ priv->oldlink = 1;*/
netif_schedule(dev);
- }
+ /*}*/
} else if (priv->oldlink) {
netif_stop_queue(dev);
new_state = 1;

View file

@ -1,299 +0,0 @@
# CONFIG_AEABI is not set
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y
# CONFIG_ARCH_AT91RM9200DK is not set
# CONFIG_ARCH_AT91SAM9260 is not set
# CONFIG_ARCH_AT91SAM9261 is not set
# CONFIG_ARCH_AT91SAM9263 is not set
# CONFIG_ARCH_AT91SAM9RL is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_VERSATILE is not set
CONFIG_ARM=y
CONFIG_ARM_AT91_ETHER=y
CONFIG_ARM_THUMB=y
# CONFIG_ARPD is not set
# CONFIG_ARTHUR is not set
# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
CONFIG_AT91_SPI=y
# CONFIG_AT91_SPIDEV is not set
CONFIG_AT91_VLIO=y
# CONFIG_ATMEL_TCLIB is not set
# CONFIG_ATM_DUMMY is not set
# CONFIG_ATM_TCP is not set
CONFIG_BASE_SMALL=0
# CONFIG_BINFMT_AOUT is not set
CONFIG_BITREVERSE=y
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BONDING is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_BT is not set
# CONFIG_CIFS_STATS is not set
# CONFIG_CLS_U32_MARK is not set
# CONFIG_CLS_U32_PERF is not set
# CONFIG_CONFIGFS_FS is not set
CONFIG_CPU_32=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_CACHE_V4WT=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_TLB_V4WBI=y
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_BLKCIPHER is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_DES is not set
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_WP512 is not set
CONFIG_DAVICOM_PHY=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DM9000 is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FIXED_PHY is not set
# CONFIG_FPE_FASTFPE is not set
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
CONFIG_FRAME_POINTER=y
CONFIG_FS_POSIX_ACL=y
# CONFIG_FW_LOADER is not set
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_TIME is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HID=y
CONFIG_HW_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_I2C is not set
# CONFIG_IEEE80211 is not set
# CONFIG_IKCONFIG is not set
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
# CONFIG_INPUT_EVDEV is not set
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_IP6_NF_MATCH_FRAG is not set
# CONFIG_IP6_NF_MATCH_HL is not set
# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
# CONFIG_IP6_NF_MATCH_OPTS is not set
# CONFIG_IP6_NF_MATCH_RT is not set
# CONFIG_IP6_NF_RAW is not set
# CONFIG_IP6_NF_TARGET_HL is not set
# CONFIG_IP6_NF_TARGET_LOG is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
# CONFIG_IP_NF_TARGET_LOG is not set
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
CONFIG_LEDS_TIMER=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=32
# CONFIG_LIBCRC32C is not set
# CONFIG_LLC2 is not set
# CONFIG_MACH_AT91RM9200EK is not set
# CONFIG_MACH_ATEB9200 is not set
# CONFIG_MACH_CARMEVA is not set
# CONFIG_MACH_CHUB is not set
# CONFIG_MACH_CSB337 is not set
# CONFIG_MACH_CSB637 is not set
# CONFIG_MACH_KAFA is not set
# CONFIG_MACH_KB9200 is not set
# CONFIG_MACH_ONEARM is not set
CONFIG_MACH_VLINK=y
# CONFIG_MMC is not set
# CONFIG_MMC_AT91 is not set
# CONFIG_MMC_BLOCK is not set
# CONFIG_MMC_DEBUG is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_AFS_PARTS is not set
CONFIG_MTD_AT91_DATAFLASH=y
CONFIG_MTD_AT91_PARTS=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CHAR=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ROOTFS_ROOT_DEV is not set
# CONFIG_MTD_ROOTFS_SPLIT is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NET_EMATCH is not set
# CONFIG_NET_IPGRE_BROADCAST is not set
# CONFIG_NET_PKTGEN is not set
# CONFIG_NET_RADIO is not set
CONFIG_NET_SCH_FIFO=y
# CONFIG_NET_SCH_NETEM is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NVRAM is not set
# CONFIG_OUTER_CACHE is not set
CONFIG_PHYLIB=y
# CONFIG_PNPACPI is not set
# CONFIG_PPPOATM is not set
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_ROMFS_FS is not set
CONFIG_RTC_LIB=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
# CONFIG_SERIAL_ATMEL_TTYAT is not set
CONFIG_SERIO=y
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SMC91X is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SOUND is not set
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_UID16=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ATM is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_GTCO is not set
# CONFIG_USB_KAWETH is not set
CONFIG_USB_MON=y
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
# CONFIG_USB_OHCI_HCD is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
# CONFIG_USB_SERIAL_FUNSOFT is not set
# CONFIG_USB_SERIAL_GARMIN is not set
# CONFIG_USB_SERIAL_IPAQ is not set
# CONFIG_USB_SERIAL_IPW is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_KOBIL_SCT is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_OMNINET is not set
# CONFIG_USB_SERIAL_SAFE is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_USBNET is not set
# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_YEALINK is not set
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VGA_CONSOLE is not set
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_WATCHDOG is not set
# CONFIG_XIP_KERNEL is not set
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0

File diff suppressed because it is too large Load diff

View file

@ -1,219 +0,0 @@
Index: linux-2.6.21.7/arch/arm/boot/compressed/head-at91rm9200.S
===================================================================
--- linux-2.6.21.7.orig/arch/arm/boot/compressed/head-at91rm9200.S
+++ linux-2.6.21.7/arch/arm/boot/compressed/head-at91rm9200.S
@@ -61,6 +61,12 @@
cmp r7, r3
beq 99f
+ @ FDL Versalink : 1053
+ mov r3, #(MACH_TYPE_VLINK & 0xff)
+ orr r3, r3, #(MACH_TYPE_VLINK & 0xff00)
+ cmp r7, r3
+ beq 99f
+
@ Ajeco 1ARM : 1075
mov r3, #(MACH_TYPE_ONEARM & 0xff)
orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00)
Index: linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
===================================================================
--- /dev/null
+++ linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
@@ -0,0 +1,160 @@
+/*
+ * linux/arch/arm/mach-at91/board-vlink.c
+ *
+ * Copyright (C) 2005 SAN People
+ * Copyright (C) 2006,2007 Guthrie Consulting
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91rm9200_mc.h>
+
+#include "generic.h"
+
+
+/*
+ * Serial port configuration.
+ * 0 .. 3 = USART0 .. USART3
+ * 4 = DBGU
+ */
+static struct at91_uart_config __initdata vlink_uart_config = {
+ .console_tty = 0, /* ttyS0 */
+ .nr_tty = 5,
+ .tty_map = { 4, 1, 0, 3, 2 } /* ttyS0, ..., ttyS4 */
+};
+
+static void __init vlink_map_io(void)
+{
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+
+ /* Setup the LEDs */
+// at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
+
+ /* Setup the serial ports and console */
+ at91_init_serial(&vlink_uart_config);
+}
+
+static void __init vlink_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
+static struct at91_eth_data __initdata vlink_eth_data = {
+ .phy_irq_pin = AT91_PIN_PC4,
+ .is_rmii = 1,
+};
+
+static struct at91_usbh_data __initdata vlink_usbh_data = {
+ .ports = 1,
+};
+
+static struct at91_udc_data __initdata vlink_udc_data = {
+ .vbus_pin = AT91_PIN_PD4,
+ .pullup_pin = AT91_PIN_PD5,
+};
+
+static struct at91_mmc_data __initdata vlink_mmc_data = {
+// .det_pin = AT91_PIN_PB27,
+ .slot_b = 0,
+ .wire4 = 1,
+// .wp_pin = AT91_PIN_PA17,
+};
+
+static struct spi_board_info vlink_spi_devices[] = {
+ { /* DataFlash chip */
+ .modalias = "mtd_dataflash",
+ .chip_select = 0,
+ .max_speed_hz = 15 * 1000 * 1000,
+ },
+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+ { /* DataFlash card */
+ .modalias = "mtd_dataflash",
+ .chip_select = 3,
+ .max_speed_hz = 15 * 1000 * 1000,
+ },
+#endif
+};
+
+static struct at91_gpio_led vlink_leds[] = {
+ {
+ .name = "led0",
+ .gpio = AT91_PIN_PB1,
+ .trigger = "heartbeat",
+ },
+ {
+ .name = "led1",
+ .gpio = AT91_PIN_PB2,
+ .trigger = "timer",
+ }
+};
+
+static void __init vlink_board_init(void)
+{
+ /* Serial */
+ at91_add_device_serial();
+ /* Ethernet */
+ at91_add_device_eth(&vlink_eth_data);
+ /* USB Host */
+ at91_add_device_usbh(&vlink_usbh_data);
+ /* USB Device */
+ at91_add_device_udc(&vlink_udc_data);
+ at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
+ /* I2C */
+ at91_add_device_i2c();
+ /* SPI */
+ at91_add_device_spi(vlink_spi_devices, ARRAY_SIZE(vlink_spi_devices));
+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+ /* DataFlash card */
+// at91_set_gpio_output(AT91_PIN_PB22, 0);
+#else
+ /* MMC */
+// at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
+ at91_add_device_mmc(0, &vlink_mmc_data);
+#endif
+ /* LEDs */
+ at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
+}
+
+MACHINE_START(VLINK, "FDL VersaLink")
+ /* Maintainer: Guthrie Consulting */
+ .phys_io = AT91_BASE_SYS,
+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+ .boot_params = AT91_SDRAM_BASE + 0x100,
+ .timer = &at91rm9200_timer,
+ .map_io = vlink_map_io,
+ .init_irq = vlink_init_irq,
+ .init_machine = vlink_board_init,
+MACHINE_END
Index: linux-2.6.21.7/arch/arm/mach-at91/Kconfig
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/Kconfig
+++ linux-2.6.21.7/arch/arm/mach-at91/Kconfig
@@ -96,6 +96,12 @@ config MACH_CHUB
help
Select this if you are using Promwad's Chub board.
+config MACH_VLINK
+ bool "Figment Design Labs VersaLink"
+ depends on ARCH_AT91RM9200
+ help
+ Select this if you are using FDL's VersaLink board
+
endif
# ----------------------------------------------------------
Index: linux-2.6.21.7/arch/arm/mach-at91/Makefile
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/Makefile
+++ linux-2.6.21.7/arch/arm/mach-at91/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_MACH_KB9200) += board-kb920
obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
obj-$(CONFIG_MACH_KAFA) += board-kafa.o
obj-$(CONFIG_MACH_CHUB) += board-chub.o
+obj-$(CONFIG_MACH_VLINK) += board-vlink.o
# AT91SAM9260 board-specific support
obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
@@ -51,6 +52,7 @@ led-$(CONFIG_MACH_CSB337) += leds.o
led-$(CONFIG_MACH_CSB637) += leds.o
led-$(CONFIG_MACH_KB9200) += leds.o
led-$(CONFIG_MACH_KAFA) += leds.o
+led-$(CONFIG_MACH_VLINK) += leds.o
obj-$(CONFIG_LEDS) += $(led-y)
# VGA support

View file

@ -1,192 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/board-vlink.c
+++ linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
@@ -61,7 +61,7 @@ static void __init vlink_map_io(void)
at91rm9200_initialize(18432000, AT91RM9200_PQFP);
/* Setup the LEDs */
-// at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
+ at91_init_leds(AT91_PIN_PC14, AT91_PIN_PC15);
/* Setup the serial ports and console */
at91_init_serial(&vlink_uart_config);
@@ -81,10 +81,12 @@ static struct at91_usbh_data __initdata
.ports = 1,
};
+/*
static struct at91_udc_data __initdata vlink_udc_data = {
.vbus_pin = AT91_PIN_PD4,
.pullup_pin = AT91_PIN_PD5,
};
+*/
static struct at91_mmc_data __initdata vlink_mmc_data = {
// .det_pin = AT91_PIN_PB27,
@@ -108,18 +110,19 @@ static struct spi_board_info vlink_spi_d
#endif
};
-static struct at91_gpio_led vlink_leds[] = {
+/*static struct at91_gpio_led vlink_leds[] = {
{
.name = "led0",
- .gpio = AT91_PIN_PB1,
+ .gpio = AT91_PIN_PC14,
.trigger = "heartbeat",
},
{
.name = "led1",
- .gpio = AT91_PIN_PB2,
+ .gpio = AT91_PIN_PC15,
.trigger = "timer",
}
};
+*/
static void __init vlink_board_init(void)
{
@@ -130,8 +133,8 @@ static void __init vlink_board_init(void
/* USB Host */
at91_add_device_usbh(&vlink_usbh_data);
/* USB Device */
- at91_add_device_udc(&vlink_udc_data);
- at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
+// at91_add_device_udc(&vlink_udc_data);
+// at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
/* I2C */
at91_add_device_i2c();
/* SPI */
@@ -145,7 +148,7 @@ static void __init vlink_board_init(void
at91_add_device_mmc(0, &vlink_mmc_data);
#endif
/* LEDs */
- at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
+// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
}
MACHINE_START(VLINK, "FDL VersaLink")
Index: linux-2.6.21.7/arch/arm/mach-at91/Makefile
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/Makefile
+++ linux-2.6.21.7/arch/arm/mach-at91/Makefile
@@ -52,7 +52,7 @@ led-$(CONFIG_MACH_CSB337) += leds.o
led-$(CONFIG_MACH_CSB637) += leds.o
led-$(CONFIG_MACH_KB9200) += leds.o
led-$(CONFIG_MACH_KAFA) += leds.o
-led-$(CONFIG_MACH_VLINK) += leds.o
+led-$(CONFIG_MACH_VLINK) += vlink_leds.o
obj-$(CONFIG_LEDS) += $(led-y)
# VGA support
Index: linux-2.6.21.7/arch/arm/mach-at91/vlink_leds.c
===================================================================
--- /dev/null
+++ linux-2.6.21.7/arch/arm/mach-at91/vlink_leds.c
@@ -0,0 +1,105 @@
+/*
+ * LED driver for Atmel AT91-based boards.
+ *
+ * Copyright (C) SAN People (Pty) Ltd
+ * Modified for FDL VersaLink Copyright (C) Guthrie Consulting
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+*/
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include <asm/mach-types.h>
+#include <asm/leds.h>
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+
+
+static inline void at91_led_on(unsigned int led)
+{
+ at91_set_gpio_value(led, 0);
+}
+
+static inline void at91_led_off(unsigned int led)
+{
+ at91_set_gpio_value(led, 1);
+}
+
+static inline void at91_led_toggle(unsigned int led)
+{
+ unsigned long is_off = at91_get_gpio_value(led);
+ if (is_off) {
+ at91_led_on(led);
+ at91_led_off(at91_leds_cpu);
+ }
+ else {
+ at91_led_on(at91_leds_cpu);
+ at91_led_off(led);
+ }
+}
+
+
+/*
+ * Handle LED events.
+ */
+
+/*
+ * VersaLink has a single bi-coloured LED which changes colour when the
+ * polarity is reversed
+ */
+static void at91_leds_event(led_event_t evt)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+
+ switch(evt) {
+ case led_start: /* System startup */
+ at91_led_toggle(at91_leds_timer);
+ break;
+
+ case led_stop: /* System stop / suspend */
+ at91_led_toggle(at91_leds_timer);
+ break;
+
+#ifdef CONFIG_LEDS_TIMER
+ case led_timer: /* Every 50 timer ticks */
+ at91_led_toggle(at91_leds_timer);
+ break;
+#endif
+
+#ifdef CONFIG_LEDS_CPU
+ case led_idle_start: /* Entering idle state */
+ at91_led_toggle(at91_leds_timer);
+ break;
+
+ case led_idle_end: /* Exit idle state */
+ at91_led_toggle(at91_leds_timer);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ local_irq_restore(flags);
+}
+
+
+static int __init leds_init(void)
+{
+ if (!at91_leds_timer || !at91_leds_cpu)
+ return -ENODEV;
+
+ leds_event = at91_leds_event;
+
+ leds_event(led_start);
+ return 0;
+}
+
+__initcall(leds_init);

View file

@ -1,363 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/gpio.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/gpio.c
+++ linux-2.6.21.7/arch/arm/mach-at91/gpio.c
@@ -27,6 +27,7 @@
static struct at91_gpio_bank *gpio;
static int gpio_banks;
+static u32 pio_gpio_pin[4] = { 0, 0, 0, 0 };
static inline void __iomem *pin_to_controller(unsigned pin)
@@ -71,9 +72,13 @@ int __init_or_module at91_set_GPIO_perip
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
+ int bank = (pin - PIN_BASE) / 32;
if (!pio)
return -EINVAL;
+
+ pio_gpio_pin[bank] |= mask;
+
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_PER);
@@ -130,10 +135,13 @@ int __init_or_module at91_set_gpio_input
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
+ int bank = (pin - PIN_BASE) / 32;
if (!pio)
return -EINVAL;
+ pio_gpio_pin[bank] |= mask;
+
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_ODR);
@@ -151,10 +159,13 @@ int __init_or_module at91_set_gpio_outpu
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
+ int bank = (pin - PIN_BASE) / 32;
if (!pio)
return -EINVAL;
+ pio_gpio_pin[bank] |= mask;
+
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + PIO_PUDR);
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
@@ -262,6 +273,18 @@ int at91_get_gpio_value(unsigned pin)
}
EXPORT_SYMBOL(at91_get_gpio_value);
+int at91_is_pin_gpio(unsigned pin)
+{
+ void __iomem *pio = pin_to_controller(pin);
+ unsigned mask = pin_to_mask(pin);
+ int bank = (pin - PIN_BASE) / 32;
+
+ if (!pio)
+ return -EINVAL;
+ return (pio_gpio_pin[bank] & mask) != 0;
+}
+EXPORT_SYMBOL(at91_is_pin_gpio);
+
/*--------------------------------------------------------------------------*/
#ifdef CONFIG_PM
Index: linux-2.6.21.7/drivers/char/Kconfig
===================================================================
--- linux-2.6.21.7.orig/drivers/char/Kconfig
+++ linux-2.6.21.7/drivers/char/Kconfig
@@ -1087,5 +1087,12 @@ config AT91_SPIDEV
The SPI driver gives user mode access to this serial
bus on the AT91RM9200 processor.
+config AT91_VLIO
+ tristate "Versalink LED and GPIO interface"
+ depends on ARCH_AT91RM9200 && MACH_VLINK
+ default n
+ help
+ Provides a handler GPIO's in userspace
+
endmenu
Index: linux-2.6.21.7/drivers/char/Makefile
===================================================================
--- linux-2.6.21.7.orig/drivers/char/Makefile
+++ linux-2.6.21.7/drivers/char/Makefile
@@ -95,6 +95,7 @@ obj-$(CONFIG_TANBAC_TB0219) += tb0219.o
obj-$(CONFIG_TELCLOCK) += tlclk.o
obj-$(CONFIG_AT91_SPI) += at91_spi.o
obj-$(CONFIG_AT91_SPIDEV) += at91_spidev.o
+obj-$(CONFIG_AT91_VLIO) += vlink_giu.o
obj-$(CONFIG_WATCHDOG) += watchdog/
obj-$(CONFIG_MWAVE) += mwave/
Index: linux-2.6.21.7/drivers/char/vlink_giu.c
===================================================================
--- /dev/null
+++ linux-2.6.21.7/drivers/char/vlink_giu.c
@@ -0,0 +1,256 @@
+/*
+ * Driver for FDL Versalink GPIO
+ *
+ * Copyright (C) 2005 Guthrie Consulting
+ * Author: Hamish Guthrie <hamish@prodigi.ch>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/proc_fs.h>
+#include <linux/fcntl.h>
+#include <linux/seq_file.h>
+#include <linux/cdev.h>
+#include <asm/arch/gpio.h>
+#include <asm/uaccess.h>
+
+static int major; /* default is dynamic major device number */
+module_param(major, int, 0);
+MODULE_PARM_DESC(major, "Major device number");
+
+#define VIO_NR_DEVS 96
+
+struct vio_dev {
+ struct cdev cdev;
+};
+
+struct vio_dev *vio_devices;
+static struct class *vio_class;
+
+static ssize_t gpio_read(struct file *file, char __user *buf, size_t len,
+ loff_t *ppos)
+{
+ unsigned int pin;
+ int retval;
+ char value = '0';
+
+ pin = iminor(file->f_dentry->d_inode);
+
+ retval = at91_get_gpio_value(PIN_BASE + pin);
+ if (retval < 0)
+ return -EFAULT;
+
+ value = retval + 0x30;
+ if (put_user(value, buf))
+ return -EFAULT;
+
+ return 1;
+}
+
+static ssize_t gpio_write(struct file *file, const char __user *data,
+ size_t len, loff_t *ppos)
+{
+ unsigned int pin;
+ size_t i;
+ char c;
+ int retval = 0;
+
+ pin = iminor(file->f_dentry->d_inode);
+
+ for (i = 0; i < len; i++) {
+ if (get_user(c, data + i))
+ return -EFAULT;
+
+ switch (c) {
+ case '0':
+ case '1':
+ retval = at91_set_gpio_value(PIN_BASE + pin, (int)c - 0x30);
+ if (retval < 0)
+ return -EFAULT;
+ break;
+ default:
+ break;
+ }
+
+ if (retval < 0)
+ break;
+ }
+
+ return i;
+}
+
+static int gpio_open(struct inode *inode, struct file *file)
+{
+ return nonseekable_open(inode, file);
+}
+
+static int gpio_release(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+static struct file_operations vio_fops = {
+ .owner = THIS_MODULE,
+ .read = gpio_read,
+ .write = gpio_write,
+ .open = gpio_open,
+ .release = gpio_release,
+};
+
+static void vio_setup_cdev(struct vio_dev *dev, int index)
+{
+ int err, devno = MKDEV(major, index);
+
+ cdev_init(&dev->cdev, &vio_fops);
+ dev->cdev.owner = THIS_MODULE;
+ dev->cdev.ops = &vio_fops;
+ err = cdev_add (&dev->cdev, devno, 1);
+ if (err)
+ printk(KERN_NOTICE "vio: Error %d adding vio%d", err, index);
+}
+
+static int vio_remove(struct platform_device *dev)
+{
+ int i;
+ dev_t devno = MKDEV(major, 0);
+
+ if (vio_devices) {
+ for(i=0; i<VIO_NR_DEVS; i++) {
+ int iodev = at91_is_pin_gpio(PIN_BASE + i);
+ if (iodev) {
+ cdev_del(&vio_devices[i].cdev);
+ class_device_destroy(vio_class, MKDEV(major, i));
+ }
+ }
+ kfree(vio_devices);
+ }
+
+ class_destroy(vio_class);
+ unregister_chrdev_region(devno, VIO_NR_DEVS);
+
+ platform_set_drvdata(dev, NULL);
+
+ return 0;
+}
+
+static int vio_probe(struct platform_device *dev)
+{
+ int retval, i, j;
+ dev_t vdev = 0;
+
+ if (major) {
+ vdev = MKDEV(major, 0);
+ retval = register_chrdev_region(vdev, VIO_NR_DEVS, "vio");
+ } else {
+ retval = alloc_chrdev_region(&vdev, 0, VIO_NR_DEVS, "vio");
+ major = MAJOR(vdev);
+ }
+ if (retval < 0) {
+ printk(KERN_WARNING "vio: can't get major %d\n", major);
+ return retval;
+ }
+
+ if (major == 0) {
+ major = retval;
+ printk(KERN_INFO "vio: major number %d\n", major);
+ }
+
+ vio_class = class_create(THIS_MODULE, "vio");
+
+ if (IS_ERR(vio_class)) {
+ printk(KERN_ERR "vio: Error creating vio class\n");
+ vio_remove(dev);
+ return PTR_ERR(vio_class);
+ }
+
+ vio_devices = kmalloc(VIO_NR_DEVS * sizeof(struct vio_dev), GFP_KERNEL);
+ if (!vio_devices) {
+ retval = -ENOMEM;
+ goto fail;
+ }
+ memset(vio_devices, 0, VIO_NR_DEVS * sizeof(struct vio_dev));
+
+ for (i=0; i<VIO_NR_DEVS/32; i++)
+ for(j=0; j<32; j++) {
+ int iodev = at91_is_pin_gpio(PIN_BASE + i*32 + j);
+ if (iodev) {
+ vio_setup_cdev(&vio_devices[i*32 + j], i*32 + j);
+ class_device_create(vio_class, NULL, MKDEV(major, i*32 + j), NULL,
+ "vio%c%d", i + 'A', j);
+ }
+ }
+
+ platform_set_drvdata(dev, vio_devices);
+
+ return 0;
+
+fail:
+ vio_remove(dev);
+ return retval;
+}
+
+static struct platform_device *vio_platform_device;
+
+static struct platform_driver vio_driver = {
+ .probe = vio_probe,
+ .remove = vio_remove,
+ .driver = {
+ .name = "vio",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init vio_init(void)
+{
+ int retval;
+
+ vio_platform_device = platform_device_register_simple("vio", -1, NULL, 0);
+ if (IS_ERR(vio_platform_device)) {
+ printk(KERN_WARNING "vio: device registration failed\n");
+ return PTR_ERR(vio_platform_device);
+ }
+
+ retval = platform_driver_register(&vio_driver);
+ if (retval < 0) {
+ printk(KERN_WARNING "vio: driver registration failed\n");
+ platform_device_unregister(vio_platform_device);
+ }
+
+ return retval;
+}
+
+static void __exit vio_exit(void)
+{
+ platform_driver_unregister(&vio_driver);
+ platform_device_unregister(vio_platform_device);
+}
+
+module_init(vio_init);
+module_exit(vio_exit);
+
+MODULE_AUTHOR("Hamish Guthrie <hamish@prodigi.ch>");
+MODULE_DESCRIPTION("FDL Versalink GPIO Driver");
+MODULE_LICENSE("GPL");

View file

@ -1,38 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/board-vlink.c
+++ linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
@@ -149,6 +149,33 @@ static void __init vlink_board_init(void
#endif
/* LEDs */
// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
+
+/* Other LED's */
+ at91_set_gpio_output(AT91_PIN_PC7, 1); // LED FRONT AP1
+ at91_set_gpio_output(AT91_PIN_PC8, 1); // LED FRONT BP1
+ at91_set_gpio_output(AT91_PIN_PB14, 1); // LED BACK AP1
+ at91_set_gpio_output(AT91_PIN_PB15, 1); // LED BACK BP1
+ at91_set_gpio_output(AT91_PIN_PB16, 1); // LED BACK AP2
+ at91_set_gpio_output(AT91_PIN_PB17, 1); // LED BACK BP2
+
+/* SIM Cards */
+ at91_set_gpio_output(AT91_PIN_PB9, 1); // ENBSC3
+ at91_set_gpio_output(AT91_PIN_PB10, 1); // ENBSC2
+ at91_set_gpio_output(AT91_PIN_PB11, 1); // ENBSC1
+
+/* GSM Module Control */
+ at91_set_gpio_output(AT91_PIN_PB12, 1); // GSMONOFF
+
+/* Test jig presence detection */
+ at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
+
+/* Power indicator */
+ at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
+
+/* USB Device control */
+ at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
+ at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
+
}
MACHINE_START(VLINK, "FDL VersaLink")

View file

@ -1,42 +0,0 @@
Index: linux-2.6.21.7/drivers/mtd/devices/at91_dataflash.c
===================================================================
--- linux-2.6.21.7.orig/drivers/mtd/devices/at91_dataflash.c
+++ linux-2.6.21.7/drivers/mtd/devices/at91_dataflash.c
@@ -173,7 +173,7 @@ static struct mtd_partition static_parti
};
#endif
-static const char *part_probes[] = { "cmdlinepart", NULL, };
+static const char *part_probes[] = { "cmdlinepart", "at91part", NULL, };
#endif
Index: linux-2.6.21.7/drivers/mtd/Kconfig
===================================================================
--- linux-2.6.21.7.orig/drivers/mtd/Kconfig
+++ linux-2.6.21.7/drivers/mtd/Kconfig
@@ -162,6 +162,12 @@ config MTD_AFS_PARTS
for your particular device. It won't happen automatically. The
'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
+config MTD_AT91_PARTS
+ tristate "Atmel AT91 partitioning support"
+ depends on MTD_PARTITIONS && ARCH_AT91RM9200 && AT91_SPI
+ ---help---
+ Atmel AT91 partitioning support
+
comment "User Modules And Translation Layers"
depends on MTD
Index: linux-2.6.21.7/drivers/mtd/Makefile
===================================================================
--- linux-2.6.21.7.orig/drivers/mtd/Makefile
+++ linux-2.6.21.7/drivers/mtd/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+obj-$(CONFIG_MTD_AT91_PARTS) += at91part.o
# 'Users' - code which presents functionality to userspace.
obj-$(CONFIG_MTD_CHAR) += mtdchar.o

View file

@ -1,162 +0,0 @@
Index: linux-2.6.21.7/drivers/serial/atmel_serial.c
===================================================================
--- linux-2.6.21.7.orig/drivers/serial/atmel_serial.c
+++ linux-2.6.21.7/drivers/serial/atmel_serial.c
@@ -174,7 +174,35 @@ static void atmel_set_mctrl(struct uart_
at91_set_gpio_value(AT91_PIN_PA21, 0);
else
at91_set_gpio_value(AT91_PIN_PA21, 1);
+
+ /*
+ * FDL VersaLink adds GPIOS to provide full modem control on
+ * USART 0 - Drive DTR and RI pins manually
+ */
+ if (mctrl & TIOCM_DTR)
+ at91_set_gpio_value(AT91_PIN_PB6, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB6, 1);
+ if (mctrl & TIOCM_RI)
+ at91_set_gpio_value(AT91_PIN_PB7, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB7, 1);
}
+
+ /*
+ * FDL VersaLink adds GPIOS to provide full modem control on
+ * USART 3 - Drive DTR and RI pins manually
+ */
+ if (port->mapbase == AT91RM9200_BASE_US3) {
+ if (mctrl & TIOCM_DTR)
+ at91_set_gpio_value(AT91_PIN_PB29, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB29, 1);
+ if (mctrl & TIOCM_RI)
+ at91_set_gpio_value(AT91_PIN_PB2, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB2, 1);
+ }
}
#endif
@@ -211,8 +239,10 @@ static u_int atmel_get_mctrl(struct uart
/*
* The control signals are active low.
*/
- if (!(status & ATMEL_US_DCD))
- ret |= TIOCM_CD;
+
+ if (!(port->mapbase == AT91RM9200_BASE_US0 || port->mapbase == AT91RM9200_BASE_US3))
+ if (!(status & ATMEL_US_DCD))
+ ret |= TIOCM_CD;
if (!(status & ATMEL_US_CTS))
ret |= TIOCM_CTS;
if (!(status & ATMEL_US_DSR))
@@ -220,6 +250,16 @@ static u_int atmel_get_mctrl(struct uart
if (!(status & ATMEL_US_RI))
ret |= TIOCM_RI;
+ /*
+ * Read the GPIO's for the FDL VersaLink special case
+ */
+ if (port->mapbase == AT91RM9200_BASE_US0)
+ if (!(at91_get_gpio_value(AT91_PIN_PA19)))
+ ret |= TIOCM_CD;
+ if (port->mapbase == AT91RM9200_BASE_US3)
+ if (!(at91_get_gpio_value(AT91_PIN_PA24)))
+ ret |= TIOCM_CD;
+
return ret;
}
@@ -511,6 +551,34 @@ static void atmel_tx_chars(struct uart_p
}
/*
+ * USART0 DCD Interrupt handler
+ */
+
+static irqreturn_t atmel_u0_DCD_interrupt(int irq, void *dev_id)
+{
+ struct uart_port *port = dev_id;
+ int status = at91_get_gpio_value(irq);
+
+ uart_handle_dcd_change(port, !(status));
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * USART3 DCD Interrupt handler
+ */
+
+static irqreturn_t atmel_u3_DCD_interrupt(int irq, void *dev_id)
+{
+ struct uart_port *port = dev_id;
+ int status = at91_get_gpio_value(irq);
+
+ uart_handle_dcd_change(port, !(status));
+
+ return IRQ_HANDLED;
+}
+
+/*
* Interrupt handler
*/
static irqreturn_t atmel_interrupt(int irq, void *dev_id)
@@ -587,6 +655,23 @@ static int atmel_startup(struct uart_por
return retval;
}
+ if (port->mapbase == AT91RM9200_BASE_US0) {
+ retval = request_irq(AT91_PIN_PA19, atmel_u0_DCD_interrupt, 0, "atmel_serial", port);
+ if (retval) {
+ printk("atmel_serial: atmel_startup - Can't get u0DCD irq\n");
+ free_irq(port->irq, port);
+ return retval;
+ }
+ }
+ if (port->mapbase == AT91RM9200_BASE_US3) {
+ retval = request_irq(AT91_PIN_PA24, atmel_u3_DCD_interrupt, 0, "atmel_serial", port);
+ if (retval) {
+ printk("atmel_serial: atmel_startup - Can't get u3DCD irq\n");
+ free_irq(port->irq, port);
+ return retval;
+ }
+ }
+
/*
* Initialize DMA (if necessary)
*/
@@ -603,6 +688,10 @@ static int atmel_startup(struct uart_por
kfree(atmel_port->pdc_rx[0].buf);
}
free_irq(port->irq, port);
+ if (port->mapbase == AT91RM9200_BASE_US0)
+ free_irq(AT91_PIN_PA19, port);
+ if (port->mapbase == AT91RM9200_BASE_US3)
+ free_irq(AT91_PIN_PA24, port);
return -ENOMEM;
}
pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
@@ -636,6 +725,10 @@ static int atmel_startup(struct uart_por
retval = atmel_open_hook(port);
if (retval) {
free_irq(port->irq, port);
+ if (port->mapbase == AT91RM9200_BASE_US0)
+ free_irq(AT91_PIN_PA19, port);
+ if (port->mapbase == AT91RM9200_BASE_US3)
+ free_irq(AT91_PIN_PA24, port);
return retval;
}
}
@@ -701,6 +794,10 @@ static void atmel_shutdown(struct uart_p
* Free the interrupt
*/
free_irq(port->irq, port);
+ if (port->mapbase == AT91RM9200_BASE_US0)
+ free_irq(AT91_PIN_PA19, port);
+ if (port->mapbase == AT91RM9200_BASE_US3)
+ free_irq(AT91_PIN_PA24, port);
/*
* If there is a specific "close" function (to unregister

View file

@ -1,36 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/at91rm9200_devices.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/at91rm9200_devices.c
+++ linux-2.6.21.7/arch/arm/mach-at91/at91rm9200_devices.c
@@ -618,7 +618,6 @@ void __init at91_init_leds(u8 cpu_led, u
#if defined(CONFIG_NEW_LEDS)
-
static struct platform_device at91_leds = {
.name = "at91_leds",
.id = -1,
@@ -724,6 +723,10 @@ static inline void configure_usart0_pins
* We need to drive the pin manually. Default is off (RTS is active low).
*/
at91_set_gpio_output(AT91_PIN_PA21, 1);
+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
+ at91_set_deglitch(AT91_PIN_PA19, 1);
}
static struct resource uart1_resources[] = {
@@ -835,6 +838,12 @@ static inline void configure_usart3_pins
{
at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
+ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
+ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
+ at91_set_deglitch(AT91_PIN_PA24, 1);
}
struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */

View file

@ -1,30 +0,0 @@
Index: linux-2.6.21.7/drivers/net/arm/at91_ether.c
===================================================================
--- linux-2.6.21.7.orig/drivers/net/arm/at91_ether.c
+++ linux-2.6.21.7/drivers/net/arm/at91_ether.c
@@ -146,6 +146,7 @@ static void update_linkspeed(struct net_
struct at91_private *lp = netdev_priv(dev);
unsigned int bmsr, bmcr, lpa, mac_cfg;
unsigned int speed, duplex;
+ unsigned long timeout = jiffies + HZ;
if (!mii_link_ok(&lp->mii)) { /* no link */
netif_carrier_off(dev);
@@ -158,8 +159,15 @@ static void update_linkspeed(struct net_
read_phy(lp->phy_address, MII_BMSR, &bmsr);
read_phy(lp->phy_address, MII_BMCR, &bmcr);
if (bmcr & BMCR_ANENABLE) { /* AutoNegotiation is enabled */
- if (!(bmsr & BMSR_ANEGCOMPLETE))
- return; /* Do nothing - another interrupt generated when negotiation complete */
+ while (!(bmsr & BMSR_ANEGCOMPLETE)) {
+ if (time_after(jiffies, timeout)) {
+ printk("at91_ether: Auto-negotiate timeout\n");
+ return;
+ }
+ read_phy(lp->phy_address, MII_BMSR, &bmsr);
+ read_phy(lp->phy_address, MII_BMCR, &bmcr);
+ cpu_relax();
+ }
read_phy(lp->phy_address, MII_LPA, &lpa);
if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100;

View file

@ -1,12 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/board-vlink.c
+++ linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
@@ -175,6 +175,7 @@ static void __init vlink_board_init(void
/* USB Device control */
at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
+ at91_set_multi_drive(AT91_PIN_PB28, 1); // Set to multi-drive
}

View file

@ -1,426 +0,0 @@
Index: linux-2.6.21.7/drivers/mmc/at91_mci.c
===================================================================
--- linux-2.6.21.7.orig/drivers/mmc/at91_mci.c
+++ linux-2.6.21.7/drivers/mmc/at91_mci.c
@@ -79,7 +79,8 @@
#define DRIVER_NAME "at91_mci"
-#undef SUPPORT_4WIRE
+//#undef SUPPORT_4WIRE
+#define SUPPORT_4WIRE
#define FL_SENT_COMMAND (1 << 0)
#define FL_SENT_STOP (1 << 1)
@@ -132,7 +133,7 @@ struct at91mci_host
/*
* Copy from sg to a dma block - used for transfers
*/
-static inline void at91mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
+static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
{
unsigned int len, i, size;
unsigned *dmabuf = host->buffer;
@@ -181,7 +182,7 @@ static inline void at91mci_sg_to_dma(str
/*
* Prepare a dma read
*/
-static void at91mci_pre_dma_read(struct at91mci_host *host)
+static void at91_mci_pre_dma_read(struct at91mci_host *host)
{
int i;
struct scatterlist *sg;
@@ -249,23 +250,24 @@ static void at91mci_pre_dma_read(struct
/*
* Handle after a dma read
*/
-static void at91mci_post_dma_read(struct at91mci_host *host)
+static int at91_mci_post_dma_read(struct at91mci_host *host)
{
struct mmc_command *cmd;
struct mmc_data *data;
+ int completed = 0;
pr_debug("post dma read\n");
cmd = host->cmd;
if (!cmd) {
pr_debug("no command\n");
- return;
+ return 1;
}
data = cmd->data;
if (!data) {
pr_debug("no data\n");
- return;
+ return 1;
}
while (host->in_use_index < host->transfer_index) {
@@ -300,39 +302,14 @@ static void at91mci_post_dma_read(struct
/* Is there another transfer to trigger? */
if (host->transfer_index < data->sg_len)
- at91mci_pre_dma_read(host);
+ at91_mci_pre_dma_read(host);
else {
+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
}
pr_debug("post dma read done\n");
-}
-
-/*
- * Handle transmitted data
- */
-static void at91_mci_handle_transmitted(struct at91mci_host *host)
-{
- struct mmc_command *cmd;
- struct mmc_data *data;
-
- pr_debug("Handling the transmit\n");
-
- /* Disable the transfer */
- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-
- /* Now wait for cmd ready */
- at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
-
- cmd = host->cmd;
- if (!cmd) return;
-
- data = cmd->data;
- if (!data) return;
-
- data->bytes_xfered = host->total_length;
+ return completed;
}
/*
@@ -340,10 +317,17 @@ static void at91_mci_handle_transmitted(
*/
static void at91_mci_enable(struct at91mci_host *host)
{
+ unsigned int mr;
+
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
- at91_mci_write(host, AT91_MCI_MR, AT91_MCI_PDCMODE | 0x34a);
+ mr = AT91_MCI_PDCMODE | 0x34a;
+
+ if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
+ mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
+
+ at91_mci_write(host, AT91_MCI_MR, mr);
/* use Slot A or B (only one at same time) */
at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
@@ -359,9 +343,8 @@ static void at91_mci_disable(struct at91
/*
* Send a command
- * return the interrupts to enable
*/
-static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
+static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
{
unsigned int cmdr, mr;
unsigned int block_length;
@@ -372,8 +355,7 @@ static unsigned int at91_mci_send_comman
host->cmd = cmd;
- /* Not sure if this is needed */
-#if 0
+ /* Needed for leaving busy state before CMD1 */
if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
pr_debug("Clearing timeout\n");
at91_mci_write(host, AT91_MCI_ARGR, 0);
@@ -383,7 +365,7 @@ static unsigned int at91_mci_send_comman
pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
}
}
-#endif
+
cmdr = cmd->opcode;
if (mmc_resp_type(cmd) == MMC_RSP_NONE)
@@ -440,50 +422,48 @@ static unsigned int at91_mci_send_comman
at91_mci_write(host, ATMEL_PDC_TCR, 0);
at91_mci_write(host, ATMEL_PDC_TNPR, 0);
at91_mci_write(host, ATMEL_PDC_TNCR, 0);
+ ier = AT91_MCI_CMDRDY;
+ } else {
+ /* zero block length in PDC mode */
+ mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
+ at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
+
+ /*
+ * Disable the PDC controller
+ */
+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
- at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
- at91_mci_write(host, AT91_MCI_CMDR, cmdr);
- return AT91_MCI_CMDRDY;
- }
-
- mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
- at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
-
- /*
- * Disable the PDC controller
- */
- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-
- if (cmdr & AT91_MCI_TRCMD_START) {
- data->bytes_xfered = 0;
- host->transfer_index = 0;
- host->in_use_index = 0;
- if (cmdr & AT91_MCI_TRDIR) {
- /*
- * Handle a read
- */
- host->buffer = NULL;
- host->total_length = 0;
+ if (cmdr & AT91_MCI_TRCMD_START) {
+ data->bytes_xfered = 0;
+ host->transfer_index = 0;
+ host->in_use_index = 0;
+ if (cmdr & AT91_MCI_TRDIR) {
+ /*
+ * Handle a read
+ */
+ host->buffer = NULL;
+ host->total_length = 0;
- at91mci_pre_dma_read(host);
- ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
- }
- else {
- /*
- * Handle a write
- */
- host->total_length = block_length * blocks;
- host->buffer = dma_alloc_coherent(NULL,
- host->total_length,
- &host->physical_address, GFP_KERNEL);
-
- at91mci_sg_to_dma(host, data);
-
- pr_debug("Transmitting %d bytes\n", host->total_length);
-
- at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
- at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
- ier = AT91_MCI_TXBUFE;
+ at91_mci_pre_dma_read(host);
+ ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
+ }
+ else {
+ /*
+ * Handle a write
+ */
+ host->total_length = block_length * blocks;
+ host->buffer = dma_alloc_coherent(NULL,
+ host->total_length,
+ &host->physical_address, GFP_KERNEL);
+
+ at91_mci_sg_to_dma(host, data);
+
+ pr_debug("Transmitting %d bytes\n", host->total_length);
+
+ at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
+ at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
+ ier = AT91_MCI_CMDRDY;
+ }
}
}
@@ -498,39 +478,24 @@ static unsigned int at91_mci_send_comman
if (cmdr & AT91_MCI_TRCMD_START) {
if (cmdr & AT91_MCI_TRDIR)
at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
- else
- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
}
- return ier;
-}
-/*
- * Wait for a command to complete
- */
-static void at91mci_process_command(struct at91mci_host *host, struct mmc_command *cmd)
-{
- unsigned int ier;
-
- ier = at91_mci_send_command(host, cmd);
-
- pr_debug("setting ier to %08X\n", ier);
-
- /* Stop on errors or the required value */
+ /* Enable selected interrupts */
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
}
/*
* Process the next step in the request
*/
-static void at91mci_process_next(struct at91mci_host *host)
+static void at91_mci_process_next(struct at91mci_host *host)
{
if (!(host->flags & FL_SENT_COMMAND)) {
host->flags |= FL_SENT_COMMAND;
- at91mci_process_command(host, host->request->cmd);
+ at91_mci_send_command(host, host->request->cmd);
}
else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
host->flags |= FL_SENT_STOP;
- at91mci_process_command(host, host->request->stop);
+ at91_mci_send_command(host, host->request->stop);
}
else
mmc_request_done(host->mmc, host->request);
@@ -539,7 +504,7 @@ static void at91mci_process_next(struct
/*
* Handle a command that has been completed
*/
-static void at91mci_completed_command(struct at91mci_host *host)
+static void at91_mci_completed_command(struct at91mci_host *host)
{
struct mmc_command *cmd = host->cmd;
unsigned int status;
@@ -583,7 +548,7 @@ static void at91mci_completed_command(st
else
cmd->error = MMC_ERR_NONE;
- at91mci_process_next(host);
+ at91_mci_process_next(host);
}
/*
@@ -595,7 +560,60 @@ static void at91_mci_request(struct mmc_
host->request = mrq;
host->flags = 0;
- at91mci_process_next(host);
+ at91_mci_process_next(host);
+}
+
+/*
+ * Handle transmitted data
+ */
+static void at91_mci_handle_transmitted(struct at91mci_host *host)
+{
+ struct mmc_command *cmd;
+ struct mmc_data *data;
+
+ pr_debug("Handling the transmit\n");
+
+ /* Disable the transfer */
+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
+
+ /* Now wait for cmd ready */
+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
+
+ cmd = host->cmd;
+ if (!cmd) return;
+
+ data = cmd->data;
+ if (!data) return;
+
+ if (cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) {
+ pr_debug("multiple write : wait for BLKE...\n");
+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
+ } else
+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
+
+ data->bytes_xfered = host->total_length;
+}
+
+
+/*Handle after command sent ready*/
+static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
+{
+ if (!host->cmd)
+ return 1;
+ else if (!host->cmd->data) {
+ if (host->flags & FL_SENT_STOP) {
+ /*After multi block write, we mus wait for NOTBUSY*/
+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
+ } else return 1;
+ } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
+ /*After sending multi-block-write command, start DMA transfer*/
+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
+ }
+
+ /* command not completed, have to wait */
+ return 0;
}
/*
@@ -698,29 +716,33 @@ static irqreturn_t at91_mci_irq(int irq,
at91_mci_handle_transmitted(host);
}
+ if (int_status & AT91_MCI_ENDRX) {
+ pr_debug("ENDRX\n");
+ at91_mci_post_dma_read(host);
+ }
+
if (int_status & AT91_MCI_RXBUFF) {
pr_debug("RX buffer full\n");
- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
+ completed = 1;
}
if (int_status & AT91_MCI_ENDTX)
pr_debug("Transmit has ended\n");
- if (int_status & AT91_MCI_ENDRX) {
- pr_debug("Receive has ended\n");
- at91mci_post_dma_read(host);
- }
-
if (int_status & AT91_MCI_NOTBUSY) {
pr_debug("Card is ready\n");
- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
+ completed = 1;
}
if (int_status & AT91_MCI_DTIP)
pr_debug("Data transfer in progress\n");
- if (int_status & AT91_MCI_BLKE)
+ if (int_status & AT91_MCI_BLKE) {
pr_debug("Block transfer has ended\n");
+ completed = 1;
+ }
if (int_status & AT91_MCI_TXRDY)
pr_debug("Ready to transmit\n");
@@ -730,14 +752,14 @@ static irqreturn_t at91_mci_irq(int irq,
if (int_status & AT91_MCI_CMDRDY) {
pr_debug("Command ready\n");
- completed = 1;
+ completed = at91_mci_handle_cmdrdy(host);
}
}
if (completed) {
pr_debug("Completed command\n");
at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
- at91mci_completed_command(host);
+ at91_mci_completed_command(host);
} else
at91_mci_write(host, AT91_MCI_IDR, int_status);

View file

@ -1,14 +0,0 @@
Index: linux-2.6.21.7/drivers/mmc/at91_mci.c
===================================================================
--- linux-2.6.21.7.orig/drivers/mmc/at91_mci.c
+++ linux-2.6.21.7/drivers/mmc/at91_mci.c
@@ -79,8 +79,7 @@
#define DRIVER_NAME "at91_mci"
-//#undef SUPPORT_4WIRE
-#define SUPPORT_4WIRE
+#undef SUPPORT_4WIRE
#define FL_SENT_COMMAND (1 << 0)
#define FL_SENT_STOP (1 << 1)

View file

@ -1,20 +0,0 @@
Index: linux-2.6.21.7/drivers/mtd/devices/at91_dataflash.c
===================================================================
--- linux-2.6.21.7.orig/drivers/mtd/devices/at91_dataflash.c
+++ linux-2.6.21.7/drivers/mtd/devices/at91_dataflash.c
@@ -161,12 +161,12 @@ static struct mtd_partition static_parti
.mask_flags = MTD_WRITEABLE, /* read-only */
},
{
- .name = "kernel",
+ .name = "knlroot",
.offset = MTDPART_OFS_NXTBLK,
- .size = 5 * 32 * 8 * 1056, /* 5 sectors */
+ .size = 0x320400, /* 5 sectors */
},
{
- .name = "filesystem",
+ .name = "jffs2",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL, /* rest = 26 sectors */
}

View file

@ -1,69 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/board-vlink.c
+++ linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
@@ -150,32 +150,38 @@ static void __init vlink_board_init(void
/* LEDs */
// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
-/* Other LED's */
- at91_set_gpio_output(AT91_PIN_PC7, 1); // LED FRONT AP1
- at91_set_gpio_output(AT91_PIN_PC8, 1); // LED FRONT BP1
- at91_set_gpio_output(AT91_PIN_PB14, 1); // LED BACK AP1
- at91_set_gpio_output(AT91_PIN_PB15, 1); // LED BACK BP1
- at91_set_gpio_output(AT91_PIN_PB16, 1); // LED BACK AP2
- at91_set_gpio_output(AT91_PIN_PB17, 1); // LED BACK BP2
-
-/* SIM Cards */
- at91_set_gpio_output(AT91_PIN_PB9, 1); // ENBSC3
- at91_set_gpio_output(AT91_PIN_PB10, 1); // ENBSC2
- at91_set_gpio_output(AT91_PIN_PB11, 1); // ENBSC1
-
-/* GSM Module Control */
- at91_set_gpio_output(AT91_PIN_PB12, 1); // GSMONOFF
-
-/* Test jig presence detection */
- at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
-
-/* Power indicator */
- at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
-
-/* USB Device control */
- at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
- at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
- at91_set_multi_drive(AT91_PIN_PB28, 1); // Set to multi-drive
+ /* Other LED's */
+ at91_set_gpio_output(AT91_PIN_PC7, 1); // LED FRONT AP1
+ at91_set_gpio_output(AT91_PIN_PC8, 1); // LED FRONT BP1
+ at91_set_gpio_output(AT91_PIN_PB14, 1); // LED BACK AP1
+ at91_set_gpio_output(AT91_PIN_PB15, 1); // LED BACK BP1
+ at91_set_gpio_output(AT91_PIN_PB16, 1); // LED BACK AP2
+ at91_set_gpio_output(AT91_PIN_PB17, 1); // LED BACK BP2
+
+ /* Test jig presence detection */
+ at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
+
+ /* SIM Cards */
+ if (at91_get_gpio_value(AT91_PIN_PB8)) {
+ at91_set_gpio_output(AT91_PIN_PB11, 0);
+ at91_set_gpio_output(AT91_PIN_PB9, 1);
+ } else {
+ at91_set_gpio_output(AT91_PIN_PB11, 1);
+ at91_set_gpio_output(AT91_PIN_PB9, 0);
+ }
+
+ at91_set_gpio_output(AT91_PIN_PB10, 1); // ENBSC2
+
+ /* GSM Module Control */
+ at91_set_gpio_output(AT91_PIN_PB12, 1); // GSMONOFF
+
+ /* Power indicator */
+ at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
+
+ /* USB Device control */
+ at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
+ at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
+ at91_set_multi_drive(AT91_PIN_PB28, 1); // Set to multi-drive
}

View file

@ -1,207 +0,0 @@
Index: linux-2.6.21.7/arch/arm/mach-at91/at91rm9200_devices.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/at91rm9200_devices.c
+++ linux-2.6.21.7/arch/arm/mach-at91/at91rm9200_devices.c
@@ -840,9 +840,9 @@ static inline void configure_usart3_pins
at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
- at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
- at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
- at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR3 */
+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI3 */
+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD3 */
at91_set_deglitch(AT91_PIN_PA24, 1);
}
Index: linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
===================================================================
--- linux-2.6.21.7.orig/arch/arm/mach-at91/board-vlink.c
+++ linux-2.6.21.7/arch/arm/mach-at91/board-vlink.c
@@ -126,6 +126,7 @@ static struct spi_board_info vlink_spi_d
static void __init vlink_board_init(void)
{
+ int v100;
/* Serial */
at91_add_device_serial();
/* Ethernet */
@@ -147,6 +148,10 @@ static void __init vlink_board_init(void
// at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
at91_add_device_mmc(0, &vlink_mmc_data);
#endif
+// Set VLink version PIN as an input with pull up (V1.5 = GND)
+ at91_set_gpio_input(AT91_PIN_PC2, 1);
+ v100 = at91_get_gpio_value(AT91_PIN_PC2);
+
/* LEDs */
// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
@@ -164,10 +169,16 @@ static void __init vlink_board_init(void
/* SIM Cards */
if (at91_get_gpio_value(AT91_PIN_PB8)) {
at91_set_gpio_output(AT91_PIN_PB11, 0);
- at91_set_gpio_output(AT91_PIN_PB9, 1);
+ if (v100)
+ at91_set_gpio_output(AT91_PIN_PB9, 1);
+ else
+ at91_set_gpio_output(AT91_PIN_PC13, 1);
} else {
at91_set_gpio_output(AT91_PIN_PB11, 1);
- at91_set_gpio_output(AT91_PIN_PB9, 0);
+ if (v100)
+ at91_set_gpio_output(AT91_PIN_PB9, 0);
+ else
+ at91_set_gpio_output(AT91_PIN_PC13, 0);
}
at91_set_gpio_output(AT91_PIN_PB10, 1); // ENBSC2
@@ -182,7 +193,18 @@ static void __init vlink_board_init(void
at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
at91_set_multi_drive(AT91_PIN_PB28, 1); // Set to multi-drive
-
+
+ if (v100)
+ { // V100
+ at91_set_gpio_input (AT91_PIN_PC12, 1); // SD Card present
+ }
+ else
+ { // DO special things for V1.5
+ at91_set_gpio_output(AT91_PIN_PB9 , 0); // USB suspend
+ at91_set_gpio_input (AT91_PIN_PC10, 1); // SD Card present
+ at91_set_gpio_output(AT91_PIN_PC11, 0); // USB Vin CTRL for modules onboard
+ at91_set_gpio_output(AT91_PIN_PC12, 0); // SIM control
+ }
}
MACHINE_START(VLINK, "FDL VersaLink")
Index: linux-2.6.21.7/drivers/char/vlink_giu.c
===================================================================
--- linux-2.6.21.7.orig/drivers/char/vlink_giu.c
+++ linux-2.6.21.7/drivers/char/vlink_giu.c
@@ -41,8 +41,7 @@ static int major; /* default is dynamic
module_param(major, int, 0);
MODULE_PARM_DESC(major, "Major device number");
-#define VIO_NR_DEVS 96
-
+#define VIO_NR_DEVS 96
struct vio_dev {
struct cdev cdev;
};
@@ -50,6 +49,53 @@ struct vio_dev {
struct vio_dev *vio_devices;
static struct class *vio_class;
+// KWJ + AJE
+#define MAX_VIO_NAMES 24
+typedef struct
+{
+ char port;
+ char pin;
+ char name100[10];
+ char name150[10];
+} VIO_NAMES;
+
+VIO_NAMES VioName[MAX_VIO_NAMES] = { //Port,PIN, V100 , V150
+ {'A',19,"port1DTR" ,"port1DTR"},
+ {'A',24,"port2DTR" ,"port2DTR"},
+ {'B',8, "jigOn" ,"jigOn"} ,
+ {'B',9, "enbSC3" ,"usbSUSPND"},
+ {'B',10,"enbSC2" ,"enbSC2"},
+ {'B',11,"enbSC1" ,"enbSC1"},
+ {'B',12,"gsmONOFF" ,"gsmONOFF"},
+ {'B',14,"ledBAP1" ,"ledBAP1"},
+ {'B',15,"ledBBP1" ,"ledBBP1"},
+ {'B',16,"ledBAP2" ,"ledBAP2"},
+ {'B',17,"ledBBP2" ,"ledBBP2"},
+ {'B',27,"udpCNX" ,"udpCNX"},
+ {'B',28,"udpPUP" ,"udpPUP"},
+ {'B',29,"port2DCD" ,"port2DCD"},
+ {'C',2, "vlVer100" ,"vlVer150"},
+ {'C',7, "ledFAP1" ,"ledFAP1"},
+ {'C',8, "ledFBP1" ,"ledFBP1"},
+ {'C',10,"vioC10" ,"sdCardON"},
+ {'C',11,"vioC11" ,"vusbCTRL"},
+ {'C',12,"sdCardON" ,"simCTRL"},
+ {'C',13,"vioC13" ,"enbSC3"},
+ {'C',14,"ledFBP2" ,"ledFBP2"},
+ {'C',15,"ledFAP2" ,"ledFAP2"},
+ {0,0,"",""}
+ };
+/* {'B',18,"gsmRIO" ,"gsmRIO"},
+ {'B',20,"gsmTX" ,"gsmTX"},
+ {'B',21,"gsmRX" ,"gsmRX"},
+ {'B',22,"gsmPIND" ,"gsmPIND"},
+ {'B',23,"gsmDCD" ,"gsmDCD"},
+ {'B',24,"gsmCTS" ,"gsmCTS"},
+ {'B',25,"gsmDSR" ,"gsmDSR"},
+ {'B',26,"gsmRTS" ,"gsmRTS"},*/
+static void lookupPINName(char version100, char *devName, char port, char pin);
+// EOF KWJ + AJE
+
static ssize_t gpio_read(struct file *file, char __user *buf, size_t len,
loff_t *ppos)
{
@@ -160,6 +206,8 @@ static int vio_probe(struct platform_dev
{
int retval, i, j;
dev_t vdev = 0;
+ char devName[30];
+ int vlinkV100;
if (major) {
vdev = MKDEV(major, 0);
@@ -185,6 +233,7 @@ static int vio_probe(struct platform_dev
vio_remove(dev);
return PTR_ERR(vio_class);
}
+ vlinkV100 = at91_get_gpio_value(AT91_PIN_PC2); // Denotes V1.5 if ground
vio_devices = kmalloc(VIO_NR_DEVS * sizeof(struct vio_dev), GFP_KERNEL);
if (!vio_devices) {
@@ -198,8 +247,10 @@ static int vio_probe(struct platform_dev
int iodev = at91_is_pin_gpio(PIN_BASE + i*32 + j);
if (iodev) {
vio_setup_cdev(&vio_devices[i*32 + j], i*32 + j);
- class_device_create(vio_class, NULL, MKDEV(major, i*32 + j), NULL,
- "vio%c%d", i + 'A', j);
+ // Lookup name of vio to create
+ lookupPINName(vlinkV100, devName, i, j);
+ class_device_create(vio_class, NULL, MKDEV(major, i*32 + j), NULL, devName);
+// "vio%c%d", i + 'A', j);
}
}
@@ -212,6 +263,29 @@ fail:
return retval;
}
+static void lookupPINName(char version100, char *devName, char port, char pin)
+{
+ int i = -1;
+ char found = 0;
+ while (!found)
+ {
+ i++;
+ if (i >= MAX_VIO_NAMES)
+ break;
+ if (VioName[i].port == port+'A' && VioName[i].pin == pin)
+ {
+ printk(KERN_ERR "vio++: %c%d=%s\n",VioName[i].port,VioName[i].pin,VioName[i].name150);
+ if (version100)
+ strcpy(devName, VioName[i].name100);
+ else
+ strcpy(devName, VioName[i].name150);
+ found = 1;
+ }
+ }
+ if (!found)
+ sprintf(devName, "vio%c%d", port + 'A', pin);
+}
+
static struct platform_device *vio_platform_device;
static struct platform_driver vio_driver = {

View file

@ -1,243 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_64BIT_PHYS_ADDR=y
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_ATM is not set
CONFIG_BASE_SMALL=0
CONFIG_BITREVERSE=y
# CONFIG_BROADCOM_PHY is not set
CONFIG_CHR_DEV_SG=m
CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=squashfs,jffs2 init=/etc/preinit"
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRAMFS=m
CONFIG_CRC16=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY=m
CONFIG_ELF_CORE=y
# CONFIG_FIXED_PHY is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
# CONFIG_HAMRADIO is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_I2C=m
CONFIG_I2C_ALGOBIT=m
CONFIG_I2C_ALGOPCA=m
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_LEDS_ALIX is not set
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_TRIGGERS is not set
# CONFIG_LEMOTE_FULONG is not set
CONFIG_MACH_ALCHEMY=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_AU1X00_ENET=y
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
CONFIG_MIPS_MTX1=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_ALCHEMY is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
CONFIG_MTD_MTX1=y
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NET_SCH_ESFQ_NFCT is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PCIPCWATCHDOG is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PPP_MPPE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_QSEMI_PHY is not set
CONFIG_RESOURCES_64BIT=y
# CONFIG_RTC is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SCSI_WAIT_SCAN=m
CONFIG_SERIAL_8250_AU1X00=y
# CONFIG_SERIAL_8250_EXTENDED is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_PCI=m
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SMC91X is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SND_AU1X00 is not set
CONFIG_SOC_AU1500=y
CONFIG_SOC_AU1X00=y
CONFIG_SOFT_WATCHDOG=m
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_STANDALONE is not set
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_KGDB=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
# CONFIG_TMD_HERMES is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_USBPCWATCHDOG is not set
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m
# CONFIG_USB_PWC is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_SERIAL_OTI6858 is not set
CONFIG_USB_UHCI_HCD=m
# CONFIG_USER_NS is not set
CONFIG_V4L_USB_DRIVERS=y
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
CONFIG_VIDEO_CAPTURE_DRIVERS=y
# CONFIG_VIDEO_CPIA2 is not set
CONFIG_VIDEO_V4L1=y
CONFIG_WDT_MTX1=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,270 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_64BIT_PHYS_ADDR=y
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
# CONFIG_ATM is not set
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BT_HCIUART_LL is not set
CONFIG_CEVT_R4K=y
CONFIG_CHR_DEV_SG=m
CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=squashfs,jffs2 init=/etc/preinit"
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRAMFS=m
CONFIG_CRC16=y
CONFIG_CSRC_R4K=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY=m
CONFIG_ELF_CORE=y
# CONFIG_FIXED_PHY is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
# CONFIG_HAMRADIO is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HID=m
# CONFIG_HIDRAW is not set
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_I2C=m
CONFIG_I2C_ALGOBIT=m
CONFIG_I2C_ALGOPCA=m
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_IRQ_CPU=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_LEDS_ALIX is not set
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_TRIGGERS is not set
# CONFIG_LEMOTE_FULONG is not set
CONFIG_MACH_ALCHEMY=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MDIO_BITBANG is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_AU1X00_ENET=y
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
CONFIG_MIPS_MTX1=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_ALCHEMY is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
CONFIG_MTD_MTX1=y
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NET_SCH_ESFQ_NFCT is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PCIPCWATCHDOG is not set
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PPP_MPPE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_QSEMI_PHY is not set
CONFIG_RESOURCES_64BIT=y
# CONFIG_RTC is not set
CONFIG_RTC_LIB=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SCSI_WAIT_SCAN=m
CONFIG_SERIAL_8250_AU1X00=y
# CONFIG_SERIAL_8250_EXTENDED is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_PCI=m
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SLABINFO=y
# CONFIG_SMC91X is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SND_AU1X00 is not set
CONFIG_SOC_AU1500=y
CONFIG_SOC_AU1X00=y
CONFIG_SOFT_WATCHDOG=m
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_STANDALONE is not set
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_KGDB=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
# CONFIG_TMD_HERMES is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_USBPCWATCHDOG is not set
CONFIG_USB=m
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m
# CONFIG_USB_PWC is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_SERIAL_CH341 is not set
# CONFIG_USB_SERIAL_OTI6858 is not set
CONFIG_USB_UHCI_HCD=m
# CONFIG_USER_NS is not set
CONFIG_V4L_USB_DRIVERS=y
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
CONFIG_VIDEO_CAPTURE_DRIVERS=y
# CONFIG_VIDEO_CPIA2 is not set
# CONFIG_VIDEO_TCM825X is not set
CONFIG_VIDEO_V4L1=y
# CONFIG_VIDEO_VP27SMPX is not set
CONFIG_WDT_MTX1=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,273 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_64BIT_PHYS_ADDR=y
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ATM is not set
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
# CONFIG_BROADCOM_PHY is not set
CONFIG_CEVT_R4K=y
CONFIG_CHR_DEV_SG=m
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=squashfs,jffs2 init=/etc/preinit"
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRAMFS=m
CONFIG_CRC16=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_AUTHENC=m
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CSRC_R4K=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY=m
# CONFIG_E1000E_ENABLED is not set
CONFIG_ELF_CORE=y
# CONFIG_FIXED_PHY is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
# CONFIG_HAMRADIO is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_IDE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_I2C=m
CONFIG_I2C_ALGOBIT=m
CONFIG_I2C_ALGOPCA=m
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_IRQ_CPU=y
CONFIG_KEXEC=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_LEDS_ALIX is not set
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_TRIGGERS is not set
# CONFIG_LEMOTE_FULONG is not set
CONFIG_LZO_COMPRESS=m
CONFIG_LZO_DECOMPRESS=m
CONFIG_MACH_ALCHEMY=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MDIO_BITBANG is not set
# CONFIG_MEMSTICK is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_AU1X00_ENET=y
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
CONFIG_MIPS_MTX1=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_ALCHEMY is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
CONFIG_MTD_MTX1=y
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NET_SCH_ESFQ_NFCT is not set
# CONFIG_NET_VENDOR_3COM is not set
CONFIG_NO_HZ=y
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
CONFIG_PCI=y
# CONFIG_PCIPCWATCHDOG is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PPP_MPPE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_R6040 is not set
# CONFIG_REALTEK_PHY is not set
CONFIG_RESOURCES_64BIT=y
# CONFIG_RTC is not set
CONFIG_RTC_LIB=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SCSI_WAIT_SCAN=m
CONFIG_SERIAL_8250_AU1X00=y
# CONFIG_SERIAL_8250_EXTENDED is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_PCI=m
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SLABINFO=y
# CONFIG_SMC91X is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_SND_AU1X00 is not set
CONFIG_SOC_AU1500=y
CONFIG_SOC_AU1X00=y
CONFIG_SOFT_WATCHDOG=m
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_STANDALONE is not set
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_KGDB=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
# CONFIG_TMD_HERMES is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_USB_R8A66597_HCD is not set
CONFIG_USB_SUPPORT=y
# CONFIG_USBPCWATCHDOG is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
CONFIG_VIDEO_CAPTURE_DRIVERS=y
CONFIG_VIDEO_V4L1=y
CONFIG_VIDEO_V4L2_COMMON=m
CONFIG_WDT_MTX1=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,19 +0,0 @@
From 8dea23a2b6dae52267b3a969e715d3f0753acf47 Mon Sep 17 00:00:00 2001
From: Florian Fainelli <florian.fainelli@telecomint.eu>
Date: Wed, 10 Oct 2007 14:54:11 +0200
Subject: [PATCH] [PATCH] Add missing generic GPIO support for au1000
With the generic GPIO support for au1000, we do not
select it in the kernel configuration.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
---
arch/mips/au1000/Kconfig | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
--- a/arch/mips/au1000/Kconfig
+++ b/arch/mips/au1000/Kconfig
@@ -135,3 +135,4 @@ config SOC_AU1X00
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_APM_EMULATION
select SYS_SUPPORTS_KGDB
+ select GENERIC_GPIO

View file

@ -1,54 +0,0 @@
This patch adds support for the GPIO connected system button on the MTX-1 boards. Default configuration is updated accordingly.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
---
--- a/arch/mips/au1000/mtx-1/platform.c
+++ b/arch/mips/au1000/mtx-1/platform.c
@@ -23,9 +23,32 @@
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
#include <asm/gpio.h>
+static struct gpio_keys_button mtx1_gpio_button[] = {
+ {
+ .gpio = 207,
+ .code = BTN_0,
+ .desc = "System button",
+ }
+};
+
+static struct gpio_keys_platform_data mtx1_buttons_data = {
+ .buttons = mtx1_gpio_button,
+ .nbuttons = ARRAY_SIZE(mtx1_gpio_button),
+};
+
+static struct platform_device mtx1_button = {
+ .name = "gpio-keys",
+ .id = -1,
+ .dev = {
+ .platform_data = &mtx1_buttons_data,
+ }
+};
+
static struct resource mtx1_wdt_res[] = {
[0] = {
.start = 15,
@@ -62,11 +85,13 @@ static struct platform_device mtx1_gpio_
static struct platform_device *mtx1_devs[] = {
&mtx1_gpio_leds,
- &mtx1_wdt
+ &mtx1_wdt,
+ &mtx1_button
};
static int __init mtx1_register_devices(void)
{
+ gpio_direction_input(207);
return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));
}

View file

@ -1,23 +0,0 @@
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -15,6 +15,9 @@
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
+ * Bjoern Riemer 2004
+ * riemer@fokus.fraunhofer.de or riemer@riemer-nt.de
+ * // fixed the link beat detection with ioctls (SIOCGMIIPHY)
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it
@@ -835,6 +838,10 @@ static int au1000_init(struct net_device
control = MAC_RX_ENABLE | MAC_TX_ENABLE;
#ifndef CONFIG_CPU_LITTLE_ENDIAN
+ /*riemer: fix for startup without cable */
+ if (!link)
+ dev->flags &= ~IFF_RUNNING;
+
control |= MAC_BIG_ENDIAN;
#endif
if (aup->phy_dev) {

View file

@ -1,11 +0,0 @@
--- a/arch/mips/au1000/mtx-1/init.c
+++ b/arch/mips/au1000/mtx-1/init.c
@@ -54,7 +54,7 @@ void __init prom_init(void)
prom_argv = (char **) fw_arg1;
prom_envp = (char **) fw_arg2;
- prom_init_cmdline();
+ strcpy(arcs_cmdline, CONFIG_CMDLINE);
memsize_str = prom_getenv("memsize");
if (!memsize_str)

View file

@ -1,11 +0,0 @@
--- a/drivers/mtd/maps/mtx-1_flash.c
+++ b/drivers/mtd/maps/mtx-1_flash.c
@@ -28,7 +28,7 @@ static struct map_info mtx1_map = {
static struct mtd_partition mtx1_partitions[] = {
{
- .name = "filesystem",
+ .name = "rootfs",
.size = 0x01C00000,
.offset = 0,
},{

View file

@ -1,15 +0,0 @@
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -1306,9 +1306,12 @@ static void set_rx_mode(struct net_devic
}
}
+#define AU1000_KNOWN_PHY_IOCTLS (SIOCGMIIPHY & 0xfff0)
static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
struct au1000_private *aup = (struct au1000_private *)dev->priv;
+ if((cmd & AU1000_KNOWN_PHY_IOCTLS) != AU1000_KNOWN_PHY_IOCTLS)
+ return -EINVAL;
if (!netif_running(dev)) return -EINVAL;

View file

@ -1,22 +0,0 @@
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -39,15 +39,15 @@
/* TBD */
static struct resource pci_io_resource = {
- .start = PCI_IO_START,
- .end = PCI_IO_END,
+ .start = (resource_size_t)PCI_IO_START,
+ .end = (resource_size_t)PCI_IO_END,
.name = "PCI IO space",
.flags = IORESOURCE_IO
};
static struct resource pci_mem_resource = {
- .start = PCI_MEM_START,
- .end = PCI_MEM_END,
+ .start = (resource_size_t)PCI_MEM_START,
+ .end = (resource_size_t)PCI_MEM_END,
.name = "PCI memory space",
.flags = IORESOURCE_MEM
};

View file

@ -1,10 +0,0 @@
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -623,6 +623,7 @@ enum soc_au1500_ints {
AU1000_RTC_MATCH1_INT,
AU1000_RTC_MATCH2_INT,
AU1500_PCI_ERR_INT,
+ AU1500_RESERVED_INT,
AU1000_USB_DEV_REQ_INT,
AU1000_USB_DEV_SUS_INT,
AU1000_USB_HOST_INT,

View file

@ -1,20 +0,0 @@
--- a/arch/mips/au1000/common/gpio.c
+++ b/arch/mips/au1000/common/gpio.c
@@ -66,7 +66,8 @@ static int au1xxx_gpio2_direction_input(
static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
{
gpio -= AU1XXX_GPIO_BASE;
- gpio2->dir = (0x01 << gpio) | (value << gpio);
+ gpio2->dir |= 0x01 << gpio;
+ gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | (value << gpio);
return 0;
}
@@ -95,6 +96,7 @@ static int au1xxx_gpio1_direction_input(
static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
{
gpio1->trioutclr = (0x01 & gpio);
+ au1xxx_gpio1_write(gpio, value);
return 0;
}

View file

@ -1,201 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_ATM is not set
# CONFIG_AX25 is not set
CONFIG_BASE_SMALL=0
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_CF_MIPS=y
# CONFIG_BT is not set
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EXT2_FS=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_IRQ_CPU=y
CONFIG_KEXEC=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
CONFIG_KORINA=y
# CONFIG_LEDS_ALIX is not set
# CONFIG_LEDS_GPIO is not set
CONFIG_LEDS_RB500=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MIKROTIK_RB500=y
# CONFIG_MINI_FO is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=4
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_BLOCK2MTD=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_CAFE is not set
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
CONFIG_MTD_NAND_IDS=y
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
# CONFIG_MTD_NAND_NANDSIM is not set
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_NAND_VERIFY_WRITE=y
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NET_SCH_ESFQ_NFCT is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PCIPCWATCHDOG is not set
CONFIG_PCI=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_RC32434_WDT=y
# CONFIG_RTC is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_WAIT_SCAN is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_SOUND is not set
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_USB is not set
# CONFIG_USER_NS is not set
# CONFIG_VGASTATE is not set
CONFIG_VIA_RHINE=y
# CONFIG_VIA_RHINE_MMIO is not set
CONFIG_VIA_RHINE_NAPI=y
# CONFIG_YAFFS_9BYTE_TAGS is not set
CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED=y
CONFIG_YAFFS_AUTO_YAFFS2=y
CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=0
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
CONFIG_YAFFS_DOES_ECC=y
CONFIG_YAFFS_ECC_WRONG_ORDER=y
CONFIG_YAFFS_FS=y
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
CONFIG_YAFFS_YAFFS1=y
CONFIG_YAFFS_YAFFS2=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -1,51 +0,0 @@
/*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* stevel@mvista.com or source@mvista.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/pci.h>
#include <asm/io.h>
#include <asm/rc32434/rc32434.h>
static int __devinitdata irq_map[2][12] = {
{ 0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1 },
{ 0, 0, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3 }
};
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int irq = 0;
if (dev->bus->number < 2 && PCI_SLOT(dev->devfn) < 12) {
irq = irq_map[dev->bus->number][PCI_SLOT(dev->devfn)];
}
return irq + GROUP4_IRQ_BASE + 4;
}

View file

@ -1,218 +0,0 @@
/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* pci_ops for IDT EB434 board
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
* Copyright 2006 Felix Fietkau <nbd@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/rc32434/rc32434.h>
#include <asm/rc32434/pci.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
#define PCI_CFG_SET(bus,slot,func,off) \
(rc32434_pci->pcicfga = (0x80000000 | \
((bus) << 16) | ((slot)<<11) | \
((func)<<8) | (off)))
static inline int config_access(unsigned char access_type, struct pci_bus *bus,
unsigned int devfn, unsigned char where,
u32 * data)
{
unsigned int slot = PCI_SLOT(devfn);
u8 func = PCI_FUNC(devfn);
/* Setup address */
PCI_CFG_SET(bus->number, slot, func, where);
rc32434_sync();
if (access_type == PCI_ACCESS_WRITE)
rc32434_pci->pcicfgd = *data;
else
*data = rc32434_pci->pcicfgd;
rc32434_sync();
return 0;
}
/*
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
int where, u8 * val)
{
u32 data;
int ret;
ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
*val = (data >> ((where & 3) << 3)) & 0xff;
return ret;
}
static int read_config_word(struct pci_bus *bus, unsigned int devfn,
int where, u16 * val)
{
u32 data;
int ret;
ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
*val = (data >> ((where & 3) << 3)) & 0xffff;
return ret;
}
static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, u32 * val)
{
int ret;
int delay = 1;
if (bus->number == 0 && PCI_SLOT(devfn) > 21)
return 0;
retry:
ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val);
/* PCI scan: check for invalid values, device may not have
* finished initializing */
if (where == PCI_VENDOR_ID) {
if (ret == 0xffffffff || ret == 0x00000000 ||
ret == 0x0000ffff || ret == 0xffff0000) {
if (delay > 4)
return 0;
delay *= 2;
msleep(delay);
goto retry;
}
}
return ret;
}
static int
write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
u8 val)
{
u32 data = 0;
if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
data = (data & ~(0xff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
u16 val)
{
u32 data = 0;
if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
data = (data & ~(0xffff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
u32 val)
{
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int pci_config_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
switch (size) {
case 1:
return read_config_byte(bus, devfn, where, (u8 *) val);
case 2:
return read_config_word(bus, devfn, where, (u16 *) val);
default:
return read_config_dword(bus, devfn, where, val);
}
}
static int pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
switch (size) {
case 1:
return write_config_byte(bus, devfn, where, (u8) val);
case 2:
return write_config_word(bus, devfn, where, (u16) val);
default:
return write_config_dword(bus, devfn, where, val);
}
}
struct pci_ops rc32434_pci_ops = {
.read = pci_config_read,
.write = pci_config_write,
};

View file

@ -1,236 +0,0 @@
/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* PCI initialization for IDT EB434 board
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/rc32434/rc32434.h>
#include <asm/rc32434/pci.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
/* define an unsigned array for the PCI registers */
unsigned int korinaCnfgRegs[25] = {
KORINA_CNFG1, KORINA_CNFG2, KORINA_CNFG3, KORINA_CNFG4,
KORINA_CNFG5, KORINA_CNFG6, KORINA_CNFG7, KORINA_CNFG8,
KORINA_CNFG9, KORINA_CNFG10, KORINA_CNFG11, KORINA_CNFG12,
KORINA_CNFG13, KORINA_CNFG14, KORINA_CNFG15, KORINA_CNFG16,
KORINA_CNFG17, KORINA_CNFG18, KORINA_CNFG19, KORINA_CNFG20,
KORINA_CNFG21, KORINA_CNFG22, KORINA_CNFG23, KORINA_CNFG24
};
static struct resource rc32434_res_pci_mem1;
static struct resource rc32434_res_pci_mem2;
static struct resource rc32434_res_pci_mem1 = {
.name = "PCI MEM1",
.start = 0x50000000,
.end = 0x5FFFFFFF,
.flags = IORESOURCE_MEM,
.parent = &rc32434_res_pci_mem1,
.sibling = NULL,
.child = &rc32434_res_pci_mem2
};
static struct resource rc32434_res_pci_mem2 = {
.name = "PCI Mem2",
.start = 0x60000000,
.end = 0x6FFFFFFF,
.flags = IORESOURCE_MEM,
.parent = &rc32434_res_pci_mem1,
.sibling = NULL,
.child = NULL
};
static struct resource rc32434_res_pci_io1 = {
.name = "PCI I/O1",
.start = 0x18800000,
.end = 0x188FFFFF,
.flags = IORESOURCE_IO,
};
extern struct pci_ops rc32434_pci_ops;
#define PCI_MEM1_START PCI_ADDR_START
#define PCI_MEM1_END PCI_ADDR_START + CPUTOPCI_MEM_WIN - 1
#define PCI_MEM2_START PCI_ADDR_START + CPUTOPCI_MEM_WIN
#define PCI_MEM2_END PCI_ADDR_START + ( 2* CPUTOPCI_MEM_WIN) - 1
#define PCI_IO1_START PCI_ADDR_START + (2 * CPUTOPCI_MEM_WIN)
#define PCI_IO1_END PCI_ADDR_START + (2* CPUTOPCI_MEM_WIN) + CPUTOPCI_IO_WIN -1
#define PCI_IO2_START PCI_ADDR_START + (2 * CPUTOPCI_MEM_WIN) + CPUTOPCI_IO_WIN
#define PCI_IO2_END PCI_ADDR_START + (2* CPUTOPCI_MEM_WIN) + (2 * CPUTOPCI_IO_WIN) -1
struct pci_controller rc32434_controller2;
struct pci_controller rc32434_controller = {
.pci_ops = &rc32434_pci_ops,
.mem_resource = &rc32434_res_pci_mem1,
.io_resource = &rc32434_res_pci_io1,
.mem_offset = 0,
.io_offset = 0,
};
#ifdef __MIPSEB__
#define PCI_ENDIAN_FLAG PCILBAC_sb_m
#else
#define PCI_ENDIAN_FLAG 0
#endif
static int __init rc32434_pcibridge_init(void)
{
unsigned int pcicValue, pcicData = 0;
unsigned int dummyRead, pciCntlVal;
int loopCount;
unsigned int pciConfigAddr;
pcicValue = rc32434_pci->pcic;
pcicValue = (pcicValue >> PCIM_SHFT) & PCIM_BIT_LEN;
if (!((pcicValue == PCIM_H_EA) ||
(pcicValue == PCIM_H_IA_FIX) ||
(pcicValue == PCIM_H_IA_RR))) {
printk("PCI init error!!!\n");
/* Not in Host Mode, return ERROR */
return -1;
}
/* Enables the Idle Grant mode, Arbiter Parking */
pcicData |=(PCIC_igm_m|PCIC_eap_m|PCIC_en_m);
rc32434_pci->pcic = pcicData; /* Enable the PCI bus Interface */
/* Zero out the PCI status & PCI Status Mask */
for(;;)
{
pcicData = rc32434_pci->pcis;
if (!(pcicData & PCIS_rip_m))
break;
}
rc32434_pci->pcis = 0;
rc32434_pci->pcism = 0xFFFFFFFF;
/* Zero out the PCI decoupled registers */
rc32434_pci->pcidac=0; /* disable PCI decoupled accesses at initialization */
rc32434_pci->pcidas=0; /* clear the status */
rc32434_pci->pcidasm=0x0000007F; /* Mask all the interrupts */
/* Mask PCI Messaging Interrupts */
rc32434_pci_msg->pciiic = 0;
rc32434_pci_msg->pciiim = 0xFFFFFFFF;
rc32434_pci_msg->pciioic = 0;
rc32434_pci_msg->pciioim = 0;
/* Setup PCILB0 as Memory Window */
rc32434_pci->pcilba[0].a = (unsigned int) (PCI_ADDR_START);
/* setup the PCI map address as same as the local address */
rc32434_pci->pcilba[0].m = (unsigned int) (PCI_ADDR_START);
/* Setup PCILBA1 as MEM */
rc32434_pci->pcilba[0].c = ( ((SIZE_256MB & 0x1f) << PCILBAC_size_b) | PCI_ENDIAN_FLAG);
dummyRead = rc32434_pci->pcilba[0].c; /* flush the CPU write Buffers */
rc32434_pci->pcilba[1].a = 0x60000000;
rc32434_pci->pcilba[1].m = 0x60000000;
/* setup PCILBA2 as IO Window*/
rc32434_pci->pcilba[1].c = (((SIZE_256MB & 0x1f) << PCILBAC_size_b )| PCI_ENDIAN_FLAG);
dummyRead = rc32434_pci->pcilba[1].c; /* flush the CPU write Buffers */
rc32434_pci->pcilba[2].a = 0x18C00000;
rc32434_pci->pcilba[2].m = 0x18FFFFFF;
/* setup PCILBA2 as IO Window*/
rc32434_pci->pcilba[2].c = (((SIZE_4MB & 0x1f) << PCILBAC_size_b) | PCI_ENDIAN_FLAG );
dummyRead = rc32434_pci->pcilba[2].c; /* flush the CPU write Buffers */
/* Setup PCILBA3 as IO Window */
rc32434_pci->pcilba[3].a = 0x18800000;
rc32434_pci->pcilba[3].m = 0x18800000;
rc32434_pci->pcilba[3].c = ( (((SIZE_1MB & 0x1ff) << PCILBAC_size_b) | PCILBAC_msi_m) | PCI_ENDIAN_FLAG);
dummyRead = rc32434_pci->pcilba[3].c; /* flush the CPU write Buffers */
pciConfigAddr=(unsigned int)(0x80000004);
for(loopCount=0;loopCount<24;loopCount++){
rc32434_pci->pcicfga=pciConfigAddr;
dummyRead=rc32434_pci->pcicfga;
rc32434_pci->pcicfgd = korinaCnfgRegs[loopCount];
dummyRead=rc32434_pci->pcicfgd;
pciConfigAddr += 4;
}
rc32434_pci->pcitc = (unsigned int)((PCITC_RTIMER_VAL&0xff) << PCITC_rtimer_b)
| ((PCITC_DTIMER_VAL&0xff) << PCITC_dtimer_b);
pciCntlVal=rc32434_pci->pcic;
pciCntlVal &=~(PCIC_tnr_m);
rc32434_pci->pcic = pciCntlVal;
pciCntlVal=rc32434_pci->pcic;
return 0;
}
/* Do platform specific device initialization at pci_enable_device() time */
int pcibios_plat_dev_init(struct pci_dev *dev)
{
if (PCI_SLOT(dev->devfn) == 6 && dev->bus->number == 0) {
/* disable prefetched memory range */
pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, 0);
pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, 0x10);
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 4);
}
return 0;
}
static int __init rc32434_pci_init(void)
{
printk("PCI: Initializing PCI\n");
ioport_resource.start = rc32434_res_pci_io1.start;
ioport_resource.end = rc32434_res_pci_io1.end;
rc32434_pcibridge_init();
register_pci_controller(&rc32434_controller);
rc32434_sync();
return 0;
}
arch_initcall(rc32434_pci_init);

View file

@ -1,5 +0,0 @@
#
# Makefile for the RB500 board specific parts of the kernel
#
obj-y += irq.o time.o setup.o serial.o prom.o gpio.o devices.o

View file

@ -1,338 +0,0 @@
/*
* RouterBoard 500 Platform devices
*
* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/platform_device.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <asm/bootinfo.h>
#include <asm/rc32434/rc32434.h>
#include <asm/rc32434/dma.h>
#include <asm/rc32434/dma_v.h>
#include <asm/rc32434/eth.h>
#include <asm/rc32434/rb.h>
#define ETH0_DMA_RX_IRQ GROUP1_IRQ_BASE + 0
#define ETH0_DMA_TX_IRQ GROUP1_IRQ_BASE + 1
#define ETH0_RX_OVR_IRQ GROUP3_IRQ_BASE + 9
#define ETH0_TX_UND_IRQ GROUP3_IRQ_BASE + 10
#define ETH0_RX_DMA_ADDR (DMA0_PhysicalAddress + 0*DMA_CHAN_OFFSET)
#define ETH0_TX_DMA_ADDR (DMA0_PhysicalAddress + 1*DMA_CHAN_OFFSET)
/* NAND definitions */
#define MEM32(x) *((volatile unsigned *) (x))
#define GPIO_RDY (1 << 0x08)
#define GPIO_WPX (1 << 0x09)
#define GPIO_ALE (1 << 0x0a)
#define GPIO_CLE (1 << 0x0b)
extern char* board_type;
static struct resource korina_dev0_res[] = {
{
.name = "korina_regs",
.start = ETH0_PhysicalAddress,
.end = ETH0_PhysicalAddress + sizeof(ETH_t),
.flags = IORESOURCE_MEM,
}, {
.name = "korina_rx",
.start = ETH0_DMA_RX_IRQ,
.end = ETH0_DMA_RX_IRQ,
.flags = IORESOURCE_IRQ
}, {
.name = "korina_tx",
.start = ETH0_DMA_TX_IRQ,
.end = ETH0_DMA_TX_IRQ,
.flags = IORESOURCE_IRQ
}, {
.name = "korina_ovr",
.start = ETH0_RX_OVR_IRQ,
.end = ETH0_RX_OVR_IRQ,
.flags = IORESOURCE_IRQ
}, {
.name = "korina_und",
.start = ETH0_TX_UND_IRQ,
.end = ETH0_TX_UND_IRQ,
.flags = IORESOURCE_IRQ
}, {
.name = "korina_dma_rx",
.start = ETH0_RX_DMA_ADDR,
.end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "korina_dma_tx",
.start = ETH0_TX_DMA_ADDR,
.end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
.flags = IORESOURCE_MEM,
}
};
static struct korina_device korina_dev0_data = {
.name = "korina0",
.mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
};
static struct platform_device korina_dev0 = {
.id = 0,
.name = "korina",
.dev.platform_data = &korina_dev0_data,
.resource = korina_dev0_res,
.num_resources = ARRAY_SIZE(korina_dev0_res),
};
#define CF_GPIO_NUM 13
static struct resource cf_slot0_res[] = {
{
.name = "cf_membase",
.flags = IORESOURCE_MEM
}, {
.name = "cf_irq",
.start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */
.end = (8 + 4 * 32 + CF_GPIO_NUM),
.flags = IORESOURCE_IRQ
}
};
static struct cf_device cf_slot0_data = {
.gpio_pin = 13
};
static struct platform_device cf_slot0 = {
.id = 0,
.name = "rb500-cf",
.dev.platform_data = &cf_slot0_data,
.resource = cf_slot0_res,
.num_resources = ARRAY_SIZE(cf_slot0_res),
};
/* Resources and device for NAND. There is no data needed and no irqs, so just define the memory used. */
/*
* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
* will not be able to find the kernel that we load. So set the oobinfo
* when creating the partitions
*/
static struct nand_ecclayout rb500_nand_ecclayout = {
.eccbytes = 6,
.eccpos = { 8, 9, 10, 13, 14, 15 },
.oobavail = 9,
.oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
};
int rb500_dev_ready(struct mtd_info *mtd)
{
return MEM32(IDT434_REG_BASE + GPIOD) & GPIO_RDY;
}
void rb500_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
unsigned char orbits, nandbits;
if (ctrl & NAND_CTRL_CHANGE) {
orbits = (ctrl & NAND_CLE) << 1;
orbits |= (ctrl & NAND_ALE) >> 1;
nandbits = (~ctrl & NAND_CLE) << 1;
nandbits |= (~ctrl & NAND_ALE) >> 1;
changeLatchU5(orbits, nandbits);
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, chip->IO_ADDR_W);
}
static struct resource nand_slot0_res[] = {
[0] = {
.name = "nand_membase",
.flags = IORESOURCE_MEM
}
};
struct platform_nand_data rb500_nand_data = {
.ctrl.dev_ready = rb500_dev_ready,
.ctrl.cmd_ctrl = rb500_cmd_ctrl,
};
static struct platform_device nand_slot0 = {
.name = "gen_nand",
.id = -1,
.resource = nand_slot0_res,
.num_resources = ARRAY_SIZE(nand_slot0_res),
.dev.platform_data = &rb500_nand_data,
};
static struct mtd_partition rb500_partition_info[] = {
{
.name = "Routerboard NAND boot",
.offset = 0,
.size = 4 * 1024 * 1024,
}, {
.name = "rootfs",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
}
};
static struct platform_device rb500_led = {
.name = "rb500-led",
.id = 0,
};
static struct gpio_keys_button rb500_gpio_btn[] = {
{
.gpio = 1,
.code = BTN_0,
.desc = "S1",
.active_low = 1,
}
};
static struct gpio_keys_platform_data rb500_gpio_btn_data = {
.buttons = rb500_gpio_btn,
.nbuttons = ARRAY_SIZE(rb500_gpio_btn),
};
static struct platform_device rb500_button = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &rb500_gpio_btn_data,
}
};
static struct platform_device *rb500_devs[] = {
&korina_dev0,
&nand_slot0,
&cf_slot0,
&rb500_led,
&rb500_button
};
static void __init parse_mac_addr(char *macstr)
{
int i, j;
unsigned char result, value;
for (i = 0; i < 6; i++) {
result = 0;
if (i != 5 && *(macstr + 2) != ':')
return;
for (j = 0; j < 2; j++) {
if (isxdigit(*macstr)
&& (value =
isdigit(*macstr) ? *macstr -
'0' : toupper(*macstr) - 'A' + 10) < 16) {
result = result * 16 + value;
macstr++;
} else
return;
}
macstr++;
korina_dev0_data.mac[i] = result;
}
}
/* DEVICE CONTROLLER 1 */
#define CFG_DC_DEV1 (void*)0xb8010010
#define CFG_DC_DEV2 (void*)0xb8010020
#define CFG_DC_DEVBASE 0x0
#define CFG_DC_DEVMASK 0x4
#define CFG_DC_DEVC 0x8
#define CFG_DC_DEVTC 0xC
/* NAND definitions */
#define NAND_CHIP_DELAY 25
static int rb500_nand_fixup(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd->priv;
if (mtd->writesize == 512)
chip->ecc.layout = &rb500_nand_ecclayout;
return 0;
}
static void __init rb500_nand_setup(void)
{
switch (mips_machtype) {
case MACH_MIKROTIK_RB532A:
changeLatchU5(LO_FOFF | LO_CEX, LO_ULED | LO_ALE | LO_CLE | LO_WPX);
break;
default:
changeLatchU5(LO_WPX | LO_FOFF | LO_CEX, LO_ULED | LO_ALE | LO_CLE);
break;
}
/* Setup NAND specific settings */
rb500_nand_data.chip.nr_chips = 1;
rb500_nand_data.chip.nr_partitions = ARRAY_SIZE(rb500_partition_info);
rb500_nand_data.chip.partitions = rb500_partition_info;
rb500_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
rb500_nand_data.chip.options = NAND_NO_AUTOINCR;
rb500_nand_data.chip.chip_fixup = &rb500_nand_fixup;
}
static int __init plat_setup_devices(void)
{
/* Look for the CF card reader */
if (!readl(CFG_DC_DEV1 + CFG_DC_DEVMASK))
rb500_devs[1] = NULL;
else {
cf_slot0_res[0].start =
readl(CFG_DC_DEV1 + CFG_DC_DEVBASE);
cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
}
/* Read the NAND resources from the device controller */
nand_slot0_res[0].start = readl(CFG_DC_DEV2 + CFG_DC_DEVBASE);
nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
/* Initialise the NAND device */
rb500_nand_setup();
return platform_add_devices(rb500_devs, ARRAY_SIZE(rb500_devs));
}
static int __init setup_kmac(char *s)
{
printk("korina mac = %s\n", s);
parse_mac_addr(s);
return 0;
}
__setup("kmac=", setup_kmac);
arch_initcall(plat_setup_devices);

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@ -1,198 +0,0 @@
/*
* Miscellaneous functions for IDT EB434 board
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
* Copyright 2006 Phil Sutter <n0-1@freewrt.org>
* Copyright 2007 Florian Fainelli <florian@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <asm/addrspace.h>
#include <asm/gpio.h>
#include <asm/rc32434/rb.h>
#define GPIO_BADDR 0x18050000
static volatile unsigned char *devCtl3Base;
static unsigned char latchU5State;
static spinlock_t clu5Lock = SPIN_LOCK_UNLOCKED;
struct rb500_gpio_reg __iomem *rb500_gpio_reg0;
EXPORT_SYMBOL(rb500_gpio_reg0);
static struct resource rb500_gpio_reg0_res[] = {
{
.name = "gpio_reg0",
.start = GPIO_BADDR,
.end = GPIO_BADDR + sizeof(struct rb500_gpio_reg),
.flags = IORESOURCE_MEM,
}
};
void set434Reg(unsigned regOffs, unsigned bit, unsigned len, unsigned val)
{
unsigned flags, data;
unsigned i = 0;
spin_lock_irqsave(&clu5Lock, flags);
data = *(volatile unsigned *) (IDT434_REG_BASE + regOffs);
for (i = 0; i != len; ++i) {
if (val & (1 << i))
data |= (1 << (i + bit));
else
data &= ~(1 << (i + bit));
}
*(volatile unsigned *) (IDT434_REG_BASE + regOffs) = data;
spin_unlock_irqrestore(&clu5Lock, flags);
}
EXPORT_SYMBOL(set434Reg);
void changeLatchU5(unsigned char orMask, unsigned char nandMask)
{
unsigned flags;
spin_lock_irqsave(&clu5Lock, flags);
latchU5State = (latchU5State | orMask) & ~nandMask;
if (!devCtl3Base)
devCtl3Base = (volatile unsigned char *)
KSEG1ADDR(*(volatile unsigned *)
KSEG1ADDR(0x18010030));
*devCtl3Base = latchU5State;
spin_unlock_irqrestore(&clu5Lock, flags);
}
EXPORT_SYMBOL(changeLatchU5);
unsigned char getLatchU5State(void)
{
return latchU5State;
}
EXPORT_SYMBOL(getLatchU5State);
int rb500_gpio_get_value(unsigned gpio)
{
return readl(&rb500_gpio_reg0->gpiod) & (1 << gpio);
}
EXPORT_SYMBOL(rb500_gpio_get_value);
void rb500_gpio_set_value(unsigned gpio, int value)
{
unsigned tmp;
tmp = readl(&rb500_gpio_reg0->gpiod) & ~(1 << gpio);
if (value)
tmp |= 1 << gpio;
writel(tmp, (void *)&rb500_gpio_reg0->gpiod);
}
EXPORT_SYMBOL(rb500_gpio_set_value);
int rb500_gpio_direction_input(unsigned gpio)
{
writel(readl(&rb500_gpio_reg0->gpiocfg) & ~(1 << gpio), (void *)&rb500_gpio_reg0->gpiocfg);
return 0;
}
EXPORT_SYMBOL(rb500_gpio_direction_input);
int rb500_gpio_direction_output(unsigned gpio, int value)
{
gpio_set_value(gpio, value);
writel(readl(&rb500_gpio_reg0->gpiocfg) | (1 << gpio), (void *)&rb500_gpio_reg0->gpiocfg);
return 0;
}
EXPORT_SYMBOL(rb500_gpio_direction_output);
void rb500_gpio_set_int_level(unsigned gpio, int value)
{
unsigned tmp;
tmp = readl(&rb500_gpio_reg0->gpioilevel) & ~(1 << gpio);
if (value)
tmp |= 1 << gpio;
writel(tmp, (void *)&rb500_gpio_reg0->gpioilevel);
}
EXPORT_SYMBOL(rb500_gpio_set_int_level);
int rb500_gpio_get_int_level(unsigned gpio)
{
return readl(&rb500_gpio_reg0->gpioilevel) & (1 << gpio);
}
EXPORT_SYMBOL(rb500_gpio_get_int_level);
void rb500_gpio_set_int_status(unsigned gpio, int value)
{
unsigned tmp;
tmp = readl(&rb500_gpio_reg0->gpioistat);
if (value)
tmp |= 1 << gpio;
writel(tmp, (void *)&rb500_gpio_reg0->gpioistat);
}
EXPORT_SYMBOL(rb500_gpio_set_int_status);
int rb500_gpio_get_int_status(unsigned gpio)
{
return readl(&rb500_gpio_reg0->gpioistat) & (1 << gpio);
}
EXPORT_SYMBOL(rb500_gpio_get_int_status);
void rb500_gpio_set_func(unsigned gpio, int value)
{
unsigned tmp;
tmp = readl(&rb500_gpio_reg0->gpiofunc);
if (value)
tmp |= 1 << gpio;
writel(tmp, (void *)&rb500_gpio_reg0->gpiofunc);
}
EXPORT_SYMBOL(rb500_gpio_set_func);
int rb500_gpio_get_func(unsigned gpio)
{
return readl(&rb500_gpio_reg0->gpiofunc) & (1 << gpio);
}
EXPORT_SYMBOL(rb500_gpio_get_func);
int __init rb500_gpio_init(void)
{
rb500_gpio_reg0 = ioremap_nocache(rb500_gpio_reg0_res[0].start,
rb500_gpio_reg0_res[0].end -
rb500_gpio_reg0_res[0].start);
if (!rb500_gpio_reg0) {
printk(KERN_ERR "rb500: cannot remap GPIO register 0\n");
return -ENXIO;
}
return 0;
}
arch_initcall(rb500_gpio_init);

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@ -1,265 +0,0 @@
/*
* BRIEF MODULE DESCRIPTION
* RC32434 interrupt routines.
*
* Copyright 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* stevel@mvista.com or source@mvista.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/time.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/rc32434/rc32434.h>
#include <asm/rc32434/gpio.h>
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
unsigned int local_bh_count[NR_CPUS];
unsigned int local_irq_count[NR_CPUS];
static unsigned int startup_irq(unsigned int irq);
static void rb500_end_irq(unsigned int irq_nr);
static void mask_and_ack_irq(unsigned int irq_nr);
static void rb500_enable_irq(unsigned int irq_nr);
static void rb500_disable_irq(unsigned int irq_nr);
extern void __init init_generic_irq(void);
extern struct rb500_gpio_reg __iomem *rb500_gpio_reg0;
typedef struct {
u32 mask; /* mask of valid bits in pending/mask registers */
volatile u32 *base_addr;
} intr_group_t;
#define RC32434_NR_IRQS (GROUP4_IRQ_BASE + 32)
#if (NR_IRQS < RC32434_NR_IRQS)
#error Too little irqs defined. Did you override <asm/irq.h> ?
#endif
static const intr_group_t intr_group[NUM_INTR_GROUPS] = {
{ 0x0000efff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET) },
{ 0x00001fff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET) },
{ 0x00000007, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET) },
{ 0x0003ffff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET) },
{ 0xffffffff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET) }
};
#define READ_PEND(base) (*(base))
#define READ_MASK(base) (*(base + 2))
#define WRITE_MASK(base, val) (*(base + 2) = (val))
static inline int irq_to_group(unsigned int irq_nr)
{
return ((irq_nr - GROUP0_IRQ_BASE) >> 5);
}
static inline int group_to_ip(unsigned int group)
{
return group + 2;
}
static inline void enable_local_irq(unsigned int ip)
{
int ipnum = 0x100 << ip;
clear_c0_cause(ipnum);
set_c0_status(ipnum);
}
static inline void disable_local_irq(unsigned int ip)
{
int ipnum = 0x100 << ip;
clear_c0_status(ipnum);
}
static inline void ack_local_irq(unsigned int ip)
{
int ipnum = 0x100 << ip;
clear_c0_cause(ipnum);
}
static void rb500_enable_irq(unsigned int irq_nr)
{
int ip = irq_nr - GROUP0_IRQ_BASE;
unsigned int group, intr_bit;
volatile unsigned int *addr;
if (ip < 0)
enable_local_irq(irq_nr);
else {
group = ip >> 5;
ip &= (1<<5)-1;
intr_bit = 1 << ip;
enable_local_irq(group_to_ip(group));
addr = intr_group[group].base_addr;
WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit);
}
}
static void rb500_disable_irq(unsigned int irq_nr)
{
int ip = irq_nr - GROUP0_IRQ_BASE;
unsigned int group, intr_bit, mask;
volatile unsigned int *addr;
if (ip < 0) {
disable_local_irq(irq_nr);
}else{
group = ip >> 5;
ip &= (1<<5) -1;
intr_bit = 1 << ip;
addr = intr_group[group].base_addr;
mask = READ_MASK(addr);
mask |= intr_bit;
WRITE_MASK(addr,mask);
/*
* if there are no more interrupts enabled in this
* group, disable corresponding IP
*/
if (mask == intr_group[group].mask)
disable_local_irq(group_to_ip(group));
}
}
static unsigned int startup_irq(unsigned int irq_nr)
{
rb500_enable_irq(irq_nr);
return 0;
}
static void shutdown_irq(unsigned int irq_nr)
{
rb500_disable_irq(irq_nr);
return;
}
static void mask_and_ack_irq(unsigned int irq_nr)
{
rb500_disable_irq(irq_nr);
ack_local_irq(group_to_ip(irq_to_group(irq_nr)));
}
static void rb500_end_irq(unsigned int irq_nr)
{
int ip = irq_nr - GROUP0_IRQ_BASE;
unsigned int intr_bit, group;
volatile unsigned int *addr;
if ((irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
printk("warning: end_irq %d did not enable (%x)\n",
irq_nr, irq_desc[irq_nr].status);
return;
}
if (ip < 0) {
enable_local_irq(irq_nr);
} else {
group = ip >> 5;
ip &= (1 << 5) - 1;
intr_bit = 1 << ip;
if (irq_nr >= GROUP4_IRQ_BASE && irq_nr <= (GROUP4_IRQ_BASE + 13)) {
rb500_gpio_reg0->gpioistat = rb500_gpio_reg0->gpioistat & ~intr_bit;
}
enable_local_irq(group_to_ip(group));
addr = intr_group[group].base_addr;
WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit);
}
}
static struct hw_interrupt_type rc32434_irq_type = {
.typename = "RB500",
.startup = startup_irq,
.shutdown = shutdown_irq,
.enable = rb500_enable_irq,
.disable = rb500_disable_irq,
.ack = mask_and_ack_irq,
.end = rb500_end_irq,
};
void __init arch_init_irq(void)
{
int i;
printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS);
memset(irq_desc, 0, sizeof(irq_desc));
for (i = 0; i < RC32434_NR_IRQS; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].chip = &rc32434_irq_type;
spin_lock_init(&irq_desc[i].lock);
}
}
/* Main Interrupt dispatcher */
asmlinkage void plat_irq_dispatch(void)
{
unsigned int ip, pend, group;
volatile unsigned int *addr;
unsigned int cp0_cause = read_c0_cause() & read_c0_status();
if (cp0_cause & CAUSEF_IP7) {
ll_timer_interrupt(7);
} else if ((ip = (cp0_cause & 0x7c00))) {
group = 21 - rc32434_clz(ip);
addr = intr_group[group].base_addr;
pend = READ_PEND(addr);
pend &= ~READ_MASK(addr); // only unmasked interrupts
pend = 39 - rc32434_clz(pend);
do_IRQ((group << 5) + pend);
}
}

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@ -1,178 +0,0 @@
/*
* prom.c
**********************************************************************
* P . Sadik Oct 10, 2003
*
* Started change log
* idt_cpu_freq is make a kernel configuration parameter
* idt_cpu_freq is exported so that other modules can use it.
* Code cleanup
**********************************************************************
* P. Sadik Oct 20, 2003
*
* Removed NVRAM code from here, since they are already available under
* nvram directory.
* Added serial port initialisation.
**********************************************************************
**********************************************************************
* P. Sadik Oct 30, 2003
*
* Added reset_cons_port
**********************************************************************
P.Christeas, 2005-2006
Port to 2.6, add 2.6 cmdline parsing
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/console.h>
#include <asm/bootinfo.h>
#include <linux/bootmem.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <asm/rc32434/ddr.h>
#define PROM_ENTRY(x) (0xbfc00000+((x)*8))
extern void __init setup_serial_port(void);
unsigned int idt_cpu_freq = 132000000;
EXPORT_SYMBOL(idt_cpu_freq);
unsigned int gpio_bootup_state = 0;
EXPORT_SYMBOL(gpio_bootup_state);
char mips_mac_address[18] = "08:00:06:05:40:01";
EXPORT_SYMBOL(mips_mac_address);
/* what to append to cmdline when button is [not] pressed */
#define GPIO_INIT_NOBUTTON ""
#define GPIO_INIT_BUTTON " 2"
#ifdef CONFIG_MIKROTIK_RB500
unsigned soft_reboot = 0;
EXPORT_SYMBOL(soft_reboot);
#endif
#define SR_NMI 0x00180000 /* NMI */
#define SERIAL_SPEED_ENTRY 0x00000001
#ifdef CONFIG_REMOTE_DEBUG
extern int remote_debug;
#endif
#define FREQ_TAG "HZ="
#define GPIO_TAG "gpio="
#define KMAC_TAG "kmac="
#define MEM_TAG "mem="
#define BOARD_TAG "board="
#define IGNORE_CMDLINE_MEM 1
#define DEBUG_DDR
#define BOARD_RB532 "500"
#define BOARD_RB532A "500r5"
void parse_soft_settings(unsigned *ptr, unsigned size);
void parse_hard_settings(unsigned *ptr, unsigned size);
void __init prom_setup_cmdline(void);
void __init prom_init(void)
{
DDR_t ddr = (DDR_t) DDR_VirtualAddress; /* define the pointer to the DDR registers */
phys_t memsize = 0-ddr->ddrmask;
/* this should be the very first message, even before serial is properly initialized */
prom_setup_cmdline();
setup_serial_port();
mips_machgroup = MACH_GROUP_MIKROTIK;
soft_reboot = read_c0_status() & SR_NMI;
pm_power_off = NULL;
/*
* give all RAM to boot allocator,
* except for the first 0x400 and the last 0x200 bytes
*/
add_memory_region(ddr->ddrbase + 0x400, memsize - 0x600, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
/* No prom memory to free */
}
static inline int match_tag(char *arg, const char *tag)
{
return (strncmp(arg, tag, strlen(tag)) == 0);
}
static inline unsigned long tag2ul(char *arg, const char *tag)
{
char *num = arg+strlen(tag);
return simple_strtoul(num, 0, 10);
}
extern char _image_cmdline;
void __init prom_setup_cmdline(void){
char cmd_line[CL_SIZE];
char *cp;
int prom_argc;
char **prom_argv, **prom_envp;
int i;
prom_argc = fw_arg0;
prom_argv = (char **) fw_arg1;
prom_envp = (char **) fw_arg2;
cp=cmd_line;
/* Note: it is common that parameters start at argv[1] and not argv[0],
however, our elf loader starts at [0] */
for(i=0;i<prom_argc;i++){
if (match_tag(prom_argv[i], FREQ_TAG)) {
idt_cpu_freq = tag2ul(prom_argv[i], FREQ_TAG);
continue;
}
#ifdef IGNORE_CMDLINE_MEM
/* parses out the "mem=xx" arg */
if (match_tag(prom_argv[i], MEM_TAG)) {
continue;
}
#endif
if (i>0) *(cp++) = ' ';
if (match_tag(prom_argv[i], BOARD_TAG)) {
char *board = prom_argv[i] + strlen(BOARD_TAG);
if (match_tag(board, BOARD_RB532A))
mips_machtype = MACH_MIKROTIK_RB532A;
else
mips_machtype = MACH_MIKROTIK_RB532;
}
if (match_tag(prom_argv[i], GPIO_TAG)) {
gpio_bootup_state = tag2ul(prom_argv[i], GPIO_TAG);
}
strcpy(cp,prom_argv[i]);
cp+=strlen(prom_argv[i]);
}
*(cp++) = ' ';
strcpy(cp,(&_image_cmdline + 8));
cp += strlen(&_image_cmdline);
i=strlen(arcs_cmdline);
if (i>0){
*(cp++) = ' ';
strcpy(cp,arcs_cmdline);
cp+=strlen(arcs_cmdline);
}
if (gpio_bootup_state&0x02)
strcpy(cp,GPIO_INIT_NOBUTTON);
else
strcpy(cp,GPIO_INIT_BUTTON);
cmd_line[CL_SIZE-1] = '\0';
strcpy(arcs_cmdline,cmd_line);
}

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@ -1,78 +0,0 @@
/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* Serial port initialisation.
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <asm/time.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/serial.h>
#include <asm/rc32434/rc32434.h>
extern unsigned int idt_cpu_freq;
static struct uart_port serial_req = {
.type = PORT_16550A,
.line = 0,
.irq = RC32434_UART0_IRQ,
//.flags = STD_COM_FLAGS,
.iotype = UPIO_MEM,
.membase = (char *) KSEG1ADDR(RC32434_UART0_BASE),
// .fifosize = 14
.regshift = 2
};
int __init setup_serial_port(void)
{
serial_req.uartclk = idt_cpu_freq;
if (early_serial_setup(&serial_req))
return -ENODEV;
return(0);
}

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@ -1,81 +0,0 @@
/*
* setup.c - boot time setup code
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/irq.h>
#include <linux/ioport.h>
#include <linux/pm.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/reboot.h>
#include <asm/addrspace.h> /* for KSEG1ADDR() */
#include <asm/time.h>
#include <asm/io.h>
#include <asm/rc32434/rc32434.h>
#include <asm/rc32434/pci.h>
#ifdef CONFIG_PCI
extern void rc32434_time_init(void);
extern int __init rc32434_pcibridge_init(void);
#endif
#define epldMask ((volatile unsigned char *)0xB900000d)
static void rb_machine_restart(char *command)
{
/* just jump to the reset vector */
* (volatile unsigned *) KSEG1ADDR(0x18008000) = 0x80000001;
((void (*)(void))KSEG1ADDR(0x1FC00000u))();
}
static void rb_machine_halt(void)
{
for(;;) continue;
}
#ifdef CONFIG_CPU_HAS_WB
void (*__wbflush) (void);
static void rb_write_buffer_flush(void)
{
__asm__ __volatile__
("sync\n\t" "nop\n\t" "loop: bc0f loop\n\t" "nop\n\t");
}
#endif
void __init plat_mem_setup(void)
{
unsigned int pciCntlVal;
board_time_init = rc32434_time_init;
#ifdef CONFIG_CPU_HAS_WB
__wbflush = rb_write_buffer_flush;
#endif
_machine_restart = rb_machine_restart;
_machine_halt = rb_machine_halt;
/*_machine_power_off = rb_machine_power_halt;*/
pm_power_off = rb_machine_halt;
set_io_port_base(KSEG1);
pciCntlVal=rc32434_pci->pcic;
pciCntlVal &= 0xFFFFFF7;
rc32434_pci->pcic = pciCntlVal;
#ifdef CONFIG_PCI
/* Enable PCI interrupts in EPLD Mask register */
*epldMask = 0x0;
*(epldMask + 1) = 0x0;
#endif
write_c0_wired(0);
}
const char *get_system_type(void)
{
return "MIPS RB500";
}

View file

@ -1,94 +0,0 @@
/*
****************************************************************************
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
***************************************************************************
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
****************************************************************************
*
* Setting up the clock on the MIPS boards.
*
****************************************************************************
* P. Sadik Oct 10, 2003
*
* Started change log.
* mips_counter_frequency is now calculated at run time, based on idt_cpu_freq.
* Code cleanup
****************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/mc146818rtc.h>
#include <linux/irq.h>
#include <linux/timex.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/debug.h>
#include <asm/rc32434/rc32434.h>
static unsigned long r4k_offset; /* Amount to incr compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
extern unsigned int mips_hpt_frequency;
extern unsigned int idt_cpu_freq;
/*
* Figure out the r4k offset, the amount to increment the compare
* register for each time tick. There is no RTC available.
*
* The RC32434 counts at half the CPU *core* speed.
*/
static unsigned long __init cal_r4koff(void)
{
mips_hpt_frequency = idt_cpu_freq * IDT_CLOCK_MULT / 2;
return (mips_hpt_frequency / HZ);
}
void __init rc32434_time_init(void)
{
unsigned int est_freq, flags;
local_irq_save(flags);
printk("calculating r4koff... ");
r4k_offset = cal_r4koff();
printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
est_freq = 2*r4k_offset*HZ;
est_freq += 5000; /* round */
est_freq -= est_freq%10000;
printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
(est_freq%1000000)*100/1000000);
local_irq_restore(flags);
}
void __init plat_timer_setup(struct irqaction *irq)
{
/* we are using the cpu counter for timer interrupts */
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
/* to generate the first timer interrupt */
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
}

View file

@ -1,3 +0,0 @@
## Makefile for the RB532 CF port
obj-y += bdev.o ata.o

View file

@ -1,487 +0,0 @@
/* CF-mips driver
This is a block driver for the direct (mmaped) interface to the CF-slot,
found in Routerboard.com's RB532 board
See SDK provided from routerboard.com.
Module adapted By P.Christeas <p_christeas@yahoo.com>, 2005-6.
Cleaned up and adapted to platform_device by Felix Fietkau <nbd@openwrt.org>
This work is redistributed under the terms of the GNU General Public License.
*/
#include <linux/kernel.h> /* printk() */
#include <linux/module.h> /* module to be loadable */
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/ioport.h> /* request_mem_region() */
#include <asm/gpio.h>
#include <asm/unaligned.h> /* ioremap() */
#include <asm/io.h> /* ioremap() */
#include <asm/rc32434/rb.h>
#include "ata.h"
#define REQUEST_MEM_REGION 0
#define DEBUG 1
#if DEBUG
#define DEBUGP printk
#else
#define DEBUGP(format, args...)
#endif
#define SECS 1000000 /* unit for wait_not_busy() is 1us */
unsigned cf_head = 0;
unsigned cf_cyl = 0;
unsigned cf_spt = 0;
unsigned cf_sectors = 0;
static unsigned cf_block_size = 1;
static void *baddr = 0;
#define DBUF32 ((volatile u32 *)((unsigned long)dev->baddr | ATA_DBUF_OFFSET))
static void cf_do_tasklet(unsigned long dev_l);
static inline void wareg(u8 val, unsigned reg, struct cf_mips_dev* dev)
{
writeb(val, dev->baddr + ATA_REG_OFFSET + reg);
}
static inline u8 rareg(unsigned reg, struct cf_mips_dev* dev)
{
return readb(dev->baddr + ATA_REG_OFFSET + reg);
}
static inline int cfrdy(struct cf_mips_dev *dev)
{
return gpio_get_value(dev->pin);
}
static inline void prepare_cf_irq(struct cf_mips_dev *dev)
{
rb500_gpio_set_int_level(1, dev->pin); /* interrupt on cf ready (not busy) */
rb500_gpio_set_int_status(0, dev->pin); /* clear interrupt status */
}
static inline int cf_present(struct cf_mips_dev* dev)
{
/* TODO: read and configure CIS into memory mapped mode
* TODO: parse CISTPL_CONFIG on CF+ cards to get base address (0x200)
* TODO: maybe adjust power saving setting for Hitachi Microdrive
*/
int i;
/* setup CFRDY GPIO as input */
rb500_gpio_set_func(dev->pin, 0);
gpio_direction_input(dev->pin);
for (i = 0; i < 0x10; ++i) {
if (rareg(i,dev) != 0xff)
return 1;
}
return 0;
}
static inline int is_busy(struct cf_mips_dev *dev)
{
return !cfrdy(dev);
}
static int wait_not_busy(int to_us, int wait_for_busy,struct cf_mips_dev *dev)
{
int us_passed = 0;
if (wait_for_busy && !is_busy(dev)) {
/* busy must appear within 400ns,
* but it may dissapear before we see it
* => must not wait for busy in a loop
*/
ndelay(400);
}
do {
if (us_passed)
udelay(1); /* never reached in async mode */
if (!is_busy(dev)) {
if (us_passed > 1 * SECS) {
printk(KERN_WARNING "cf-mips: not busy ok (after %dus)"
", status 0x%02x\n", us_passed, (unsigned) rareg(ATA_REG_ST,dev));
}
return CF_TRANS_OK;
}
if (us_passed == 1 * SECS) {
printk(KERN_WARNING "cf-mips: wait not busy %dus..\n", to_us);
}
if (dev->async_mode) {
dev->to_timer.expires = jiffies + (to_us * HZ / SECS);
dev->irq_enable_time = jiffies;
prepare_cf_irq(dev);
if (is_busy(dev)) {
add_timer(&dev->to_timer);
enable_irq(dev->irq);
return CF_TRANS_IN_PROGRESS;
}
continue;
}
++us_passed;
} while (us_passed < to_us);
printk(KERN_ERR "cf-mips: wait not busy timeout (%dus)"
", status 0x%02x, state %d\n",
to_us, (unsigned) rareg(ATA_REG_ST,dev), dev->tstate);
return CF_TRANS_FAILED;
}
static irqreturn_t cf_irq_handler(int irq, void *dev_id)
{
/* While tasklet has not disabled irq, irq will be retried all the time
* because of ILEVEL matching GPIO pin status => deadlock.
* To avoid this, we change ILEVEL to 0.
*/
struct cf_mips_dev *dev=dev_id;
rb500_gpio_set_int_level(0, dev->pin);
rb500_gpio_set_int_status(0, dev->pin);
del_timer(&dev->to_timer);
tasklet_schedule(&dev->tasklet);
return IRQ_HANDLED;
}
static int do_reset(struct cf_mips_dev *dev)
{
printk(KERN_INFO "cf-mips: resetting..\n");
wareg(ATA_REG_DC_SRST, ATA_REG_DC,dev);
udelay(1); /* FIXME: how long should we wait here? */
wareg(0, ATA_REG_DC,dev);
return wait_not_busy(30 * SECS, 1,dev);
}
static int set_multiple(struct cf_mips_dev *dev)
{
if (dev->block_size <= 1)
return CF_TRANS_OK;
wareg(dev->block_size, ATA_REG_SC,dev);
wareg(ATA_REG_DH_BASE | ATA_REG_DH_LBA, ATA_REG_DH,dev);
wareg(ATA_CMD_SET_MULTIPLE, ATA_REG_CMD,dev);
return wait_not_busy(10 * SECS, 1,dev);
}
static int set_cmd(struct cf_mips_dev *dev)
{
//DEBUGP(KERN_INFO "cf-mips: ata cmd 0x%02x\n", dev->tcmd);
// sector_count should be <=24 bits..
BUG_ON(dev->tsect_start>=0x10000000);
// This way, it addresses 2^24 * 512 = 128G
if (dev->tsector_count) {
wareg(dev->tsector_count & 0xff, ATA_REG_SC,dev);
wareg(dev->tsect_start & 0xff, ATA_REG_SN,dev);
wareg((dev->tsect_start >> 8) & 0xff, ATA_REG_CL,dev);
wareg((dev->tsect_start >> 16) & 0xff, ATA_REG_CH,dev);
}
wareg(((dev->tsect_start >> 24) & 0x0f) | ATA_REG_DH_BASE | ATA_REG_DH_LBA,
ATA_REG_DH,dev); /* select drive on all commands */
wareg(dev->tcmd, ATA_REG_CMD,dev);
return wait_not_busy(10 * SECS, 1,dev);
}
static int do_trans(struct cf_mips_dev *dev)
{
int res;
unsigned st;
int transfered;
//printk("do_trans: %d sectors left\n",dev->tsectors_left);
while (dev->tsectors_left) {
transfered = 0;
st = rareg(ATA_REG_ST,dev);
if (!(st & ATA_REG_ST_DRQ)) {
printk(KERN_ERR "cf-mips: do_trans without DRQ (status 0x%x)!\n", st);
if (st & ATA_REG_ST_ERR) {
int errId = rareg(ATA_REG_ERR,dev);
printk(KERN_ERR "cf-mips: %s error, status 0x%x, errid 0x%x\n",
(dev->tread ? "read" : "write"), st, errId);
}
return CF_TRANS_FAILED;
}
do { /* Fill/read the buffer one block */
u32 *qbuf, *qend;
qbuf = (u32 *)dev->tbuf;
qend = qbuf + CF_SECT_SIZE / sizeof(u32);
if (dev->tread) {
while (qbuf!=qend)
put_unaligned(*DBUF32,qbuf++);
//*(qbuf++) = *DBUF32;
}
else {
while(qbuf!=qend)
*DBUF32 = get_unaligned(qbuf++);
}
dev->tsectors_left--;
dev->tbuf += CF_SECT_SIZE;
dev->tbuf_size -= CF_SECT_SIZE;
transfered++;
} while (transfered != dev->block_size && dev->tsectors_left > 0);
res = wait_not_busy(10 * SECS, 1,dev);
if (res != CF_TRANS_OK)
return res;
};
st = rareg(ATA_REG_ST,dev);
if (st & (ATA_REG_ST_DRQ | ATA_REG_ST_DWF | ATA_REG_ST_ERR)) {
if (st & ATA_REG_ST_DRQ) {
printk(KERN_ERR "cf-mips: DRQ after all %d sectors are %s"
", status 0x%x\n", dev->tsector_count, (dev->tread ? "read" : "written"), st);
} else if (st & ATA_REG_ST_DWF) {
printk(KERN_ERR "cf-mips: write fault, status 0x%x\n", st);
} else {
int errId = rareg(ATA_REG_ERR,dev);
printk(KERN_ERR "cf-mips: %s error, status 0x%x, errid 0x%x\n",
(dev->tread ? "read" : "write"), st, errId);
}
return CF_TRANS_FAILED;
}
return CF_TRANS_OK;
}
static int cf_do_state(struct cf_mips_dev *dev)
{
int res;
switch (dev->tstate) { /* fall through everywhere */
case TS_IDLE:
dev->tstate = TS_READY;
if (is_busy(dev)) {
dev->tstate = TS_AFTER_RESET;
res = do_reset(dev);
if (res != CF_TRANS_OK)
break;
}
case TS_AFTER_RESET:
if (dev->tstate == TS_AFTER_RESET) {
dev->tstate = TS_READY;
res = set_multiple(dev);
if (res != CF_TRANS_OK)
break;
}
case TS_READY:
dev->tstate = TS_CMD;
res = set_cmd(dev);
if (res != CF_TRANS_OK)
break;;
case TS_CMD:
dev->tstate = TS_TRANS;
case TS_TRANS:
res = do_trans(dev);
break;
default:
printk(KERN_ERR "cf-mips: BUG: unknown tstate %d\n", dev->tstate);
return CF_TRANS_FAILED;
}
if (res != CF_TRANS_IN_PROGRESS)
dev->tstate = TS_IDLE;
return res;
}
static void cf_do_tasklet(unsigned long dev_l)
{
struct cf_mips_dev* dev=(struct cf_mips_dev*) dev_l;
int res;
disable_irq(dev->irq);
if (dev->tstate == TS_IDLE)
return; /* can happen when irq is first registered */
#if 0
DEBUGP(KERN_WARNING "cf-mips: not busy ok (tasklet) status 0x%02x\n",
(unsigned) rareg(ATA_REG_ST,dev));
#endif
res = cf_do_state(dev);
if (res == CF_TRANS_IN_PROGRESS)
return;
cf_async_trans_done(dev,res);
}
static void cf_async_timeout(unsigned long dev_l)
{
struct cf_mips_dev* dev=(struct cf_mips_dev*) dev_l;
disable_irq(dev->irq);
/* Perhaps send abort to the device? */
printk(KERN_ERR "cf-mips: wait not busy timeout (%lus)"
", status 0x%02x, state %d\n",
jiffies - dev->irq_enable_time, (unsigned) rareg(ATA_REG_ST,dev), dev->tstate);
dev->tstate = TS_IDLE;
cf_async_trans_done(dev,CF_TRANS_FAILED);
}
int cf_do_transfer(struct cf_mips_dev* dev,sector_t sector, unsigned long nsect,
char* buffer, int is_write)
{
BUG_ON(dev->tstate!=TS_IDLE);
if (nsect > ATA_MAX_SECT_PER_CMD) {
printk(KERN_WARNING "cf-mips: sector count %lu out of range\n",nsect);
return CF_TRANS_FAILED;
}
if (sector + nsect > dev->sectors) {
printk(KERN_WARNING "cf-mips: sector %lu out of range\n",sector);
return CF_TRANS_FAILED;
}
dev->tbuf = buffer;
dev->tbuf_size = nsect*512;
dev->tsect_start = sector;
dev->tsector_count = nsect;
dev->tsectors_left = dev->tsector_count;
dev->tread = (is_write)?0:1;
dev->tcmd = (dev->block_size == 1 ?
(is_write ? ATA_CMD_WRITE_SECTORS : ATA_CMD_READ_SECTORS) :
(is_write ? ATA_CMD_WRITE_MULTIPLE : ATA_CMD_READ_MULTIPLE));
return cf_do_state(dev);
}
static int do_identify(struct cf_mips_dev *dev)
{
u16 sbuf[CF_SECT_SIZE >> 1];
int res;
char tstr[17]; //serial
char tmp;
int i;
BUG_ON(dev->tstate!=TS_IDLE);
dev->tbuf = (char *) sbuf;
dev->tbuf_size = CF_SECT_SIZE;
dev->tsect_start = 0;
dev->tsector_count = 0;
dev->tsectors_left = 1;
dev->tread = 1;
dev->tcmd = ATA_CMD_IDENTIFY_DRIVE;
DEBUGP(KERN_INFO "cf-mips: identify drive..\n");
res = cf_do_state(dev);
if (res == CF_TRANS_IN_PROGRESS) {
printk(KERN_ERR "cf-mips: BUG: async identify cmd\n");
return CF_TRANS_FAILED;
}
if (res != CF_TRANS_OK)
return 0;
dev->head = sbuf[3];
dev->cyl = sbuf[1];
dev->spt = sbuf[6];
dev->sectors = ((unsigned long) sbuf[7] << 16) | sbuf[8];
dev->dtype=sbuf[0];
memcpy(tstr, &sbuf[12], 16);
tstr[16] = '\0';
/* Byte-swap the serial number */
for (i = 0; i<8; i++) {
tmp = tstr[i * 2];
tstr[i * 2] = tstr[i * 2 +1];
tstr[i * 2 + 1] = tmp;
}
printk(KERN_INFO "cf-mips: %s detected, C/H/S=%d/%d/%d sectors=%u (%uMB) Serial=%s\n",
(sbuf[0] == 0x848A ? "CF card" : "ATA drive"), dev->cyl, dev->head,
dev->spt, dev->sectors, dev->sectors >> 11, tstr);
return 1;
}
static void init_multiple(struct cf_mips_dev * dev)
{
int res;
DEBUGP(KERN_INFO "cf-mips: detecting block size\n");
dev->block_size = 128; /* max block size = 128 sectors (64KB) */
do {
wareg(dev->block_size, ATA_REG_SC,dev);
wareg(ATA_REG_DH_BASE | ATA_REG_DH_LBA, ATA_REG_DH,dev);
wareg(ATA_CMD_SET_MULTIPLE, ATA_REG_CMD,dev);
res = wait_not_busy(10 * SECS, 1,dev);
if (res != CF_TRANS_OK) {
printk(KERN_ERR "cf-mips: failed to detect block size: busy!\n");
dev->block_size = 1;
return;
}
if ((rareg(ATA_REG_ST,dev) & ATA_REG_ST_ERR) == 0)
break;
dev->block_size /= 2;
} while (dev->block_size > 1);
printk(KERN_INFO "cf-mips: multiple sectors = %d\n", dev->block_size);
}
int cf_init(struct cf_mips_dev *dev)
{
tasklet_init(&dev->tasklet,cf_do_tasklet,(unsigned long)dev);
dev->baddr = ioremap_nocache((unsigned long)dev->base, CFDEV_BUF_SIZE);
if (!dev->baddr) {
printk(KERN_ERR "cf-mips: cf_init: ioremap for (%lx,%x) failed\n",
(unsigned long) dev->base, CFDEV_BUF_SIZE);
return -EBUSY;
}
if (!cf_present(dev)) {
printk(KERN_WARNING "cf-mips: cf card not present\n");
iounmap(dev->baddr);
return -ENODEV;
}
if (do_reset(dev) != CF_TRANS_OK) {
printk(KERN_ERR "cf-mips: cf reset failed\n");
iounmap(dev->baddr);
return -EBUSY;
}
if (!do_identify(dev)) {
printk(KERN_ERR "cf-mips: cf identify failed\n");
iounmap(dev->baddr);
return -EBUSY;
}
/* set_apm_level(ATA_APM_WITH_STANDBY); */
init_multiple(dev);
init_timer(&dev->to_timer);
dev->to_timer.function = cf_async_timeout;
dev->to_timer.data = (unsigned long)dev;
prepare_cf_irq(dev);
if (request_irq(dev->irq, cf_irq_handler, 0, "CF Mips", dev)) {
printk(KERN_ERR "cf-mips: failed to get irq\n");
iounmap(dev->baddr);
return -EBUSY;
}
/* Disable below would be odd, because request will enable, and the tasklet
will disable it itself */
//disable_irq(dev->irq);
dev->async_mode = 1;
return 0;
}
void cf_cleanup(struct cf_mips_dev *dev)
{
iounmap(dev->baddr);
free_irq(dev->irq, NULL);
#if REQUEST_MEM_REGION
release_mem_region((unsigned long)dev->base, CFDEV_BUF_SIZE);
#endif
}
/*eof*/

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@ -1,143 +0,0 @@
/* CF-mips driver
This is a block driver for the direct (mmaped) interface to the CF-slot,
found in Routerboard.com's RB532 board
See SDK provided from routerboard.com.
Module adapted By P.Christeas <p_christeas@yahoo.com>, 2005-6.
Cleaned up and adapted to platform_device by Felix Fietkau <nbd@openwrt.org>
This work is redistributed under the terms of the GNU General Public License.
*/
#ifndef __CFMIPS_ATA_H__
#define __CFMIPS_ATA_H__
#include <linux/interrupt.h>
#define CFG_DC_DEV1 (void*)0xb8010010
#define CFG_DC_DEVBASE 0x0
#define CFG_DC_DEVMASK 0x4
#define CFG_DC_DEVC 0x8
#define CFG_DC_DEVTC 0xC
#define CFDEV_BUF_SIZE 0x1000
#define ATA_CIS_OFFSET 0x200
#define ATA_REG_OFFSET 0x800
#define ATA_DBUF_OFFSET 0xC00
#define ATA_REG_FEAT 0x1
#define ATA_REG_SC 0x2
#define ATA_REG_SN 0x3
#define ATA_REG_CL 0x4
#define ATA_REG_CH 0x5
#define ATA_REG_DH 0x6
#define ATA_REG_DH_BASE 0xa0
#define ATA_REG_DH_LBA 0x40
#define ATA_REG_DH_DRV 0x10
#define ATA_REG_CMD 0x7
#define ATA_REG_ST 0x7
#define ATA_REG_ST_BUSY 0x80
#define ATA_REG_ST_RDY 0x40
#define ATA_REG_ST_DWF 0x20
#define ATA_REG_ST_DSC 0x10
#define ATA_REG_ST_DRQ 0x08
#define ATA_REG_ST_CORR 0x04
#define ATA_REG_ST_ERR 0x01
#define ATA_REG_ERR 0xd
#define ATA_REG_DC 0xe
#define ATA_REG_DC_IEN 0x02
#define ATA_REG_DC_SRST 0x04
#define ATA_CMD_READ_SECTORS 0x20
#define ATA_CMD_WRITE_SECTORS 0x30
#define ATA_CMD_EXEC_DRIVE_DIAG 0x90
#define ATA_CMD_READ_MULTIPLE 0xC4
#define ATA_CMD_WRITE_MULTIPLE 0xC5
#define ATA_CMD_SET_MULTIPLE 0xC6
#define ATA_CMD_IDENTIFY_DRIVE 0xEC
#define ATA_CMD_SET_FEATURES 0xEF
#define ATA_FEATURE_ENABLE_APM 0x05
#define ATA_FEATURE_DISABLE_APM 0x85
#define ATA_APM_DISABLED 0x00
#define ATA_APM_MIN_POWER 0x01
#define ATA_APM_WITH_STANDBY 0x7f
#define ATA_APM_WITHOUT_STANDBY 0x80
#define ATA_APM_MAX_PERFORMANCE 0xfe
#define CF_SECT_SIZE 0x200
/* That is the ratio CF_SECT_SIZE/512 (the kernel sector size) */
#define CF_KERNEL_MUL 1
#define ATA_MAX_SECT_PER_CMD 0x100
#define CF_TRANS_FAILED 0
#define CF_TRANS_OK 1
#define CF_TRANS_IN_PROGRESS 2
enum trans_state {
TS_IDLE = 0,
TS_AFTER_RESET,
TS_READY,
TS_CMD,
TS_TRANS
};
//
// #if DEBUG
// static unsigned long busy_time;
// #endif
/** Struct to hold the cfdev
Actually, all the data here only has one instance. However, for
reasons of programming conformity, it is passed around as a pointer
*/
struct cf_mips_dev {
void *base; /* base address for I/O */
void *baddr; /* remapped address */
int pin; /* gpio pin */
int irq; /* gpio irq */
unsigned head;
unsigned cyl;
unsigned spt;
unsigned sectors;
unsigned short block_size;
unsigned dtype ; // ATA or CF
struct request_queue *queue;
struct gendisk *gd;
/* Transaction state */
enum trans_state tstate;
char *tbuf;
unsigned long tbuf_size;
sector_t tsect_start;
unsigned tsector_count;
unsigned tsectors_left;
int tread;
unsigned tcmd;
int async_mode;
unsigned long irq_enable_time;
struct request *active_req; /* A request is being carried out. Is that different from tstate? */
int users;
struct timer_list to_timer;
struct tasklet_struct tasklet;
/** This lock ensures that the requests to this device are all done
atomically. Transfers can run in parallel, requests are all queued
one-by-one */
spinlock_t lock;
};
int cf_do_transfer(struct cf_mips_dev* dev,sector_t sector, unsigned long nsect,
char* buffer, int is_write);
int cf_init(struct cf_mips_dev* dev);
void cf_cleanup(struct cf_mips_dev* dev);
void cf_async_trans_done(struct cf_mips_dev* dev, int result);
// void *cf_get_next_buf(unsigned long *buf_size);
#endif

View file

@ -1,340 +0,0 @@
/* CF-mips driver
This is a block driver for the direct (mmaped) interface to the CF-slot,
found in Routerboard.com's RB532 board
See SDK provided from routerboard.com.
Module adapted By P.Christeas <p_christeas@yahoo.com>, 2005-6.
Cleaned up and adapted to platform_device by Felix Fietkau <nbd@openwrt.org>
This work is redistributed under the terms of the GNU General Public License.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <linux/fs.h>
#include <linux/genhd.h>
#include <linux/blkdev.h>
#include <linux/blkpg.h>
#include <linux/hdreg.h>
#include <linux/platform_device.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/rc32434/rb.h>
#ifdef DEBUG
#define DEBUGP printk
#define DLEVEL 1
#else
#define DEBUGP(format, args...)
#define DLEVEL 0
#endif
#define CF_MIPS_MAJOR 13
#define MAJOR_NR CF_MIPS_MAJOR
#define CF_MAX_PART 16 /* max 15 partitions */
#include "ata.h"
//extern struct block_device_operations cf_bdops;
// static struct hd_struct cf_parts[CF_MAX_PART];
// static int cf_part_sizes[CF_MAX_PART];
// static int cf_hsect_sizes[CF_MAX_PART];
// static int cf_max_sectors[CF_MAX_PART];
// static int cf_blksize_sizes[CF_MAX_PART];
// static spinlock_t lock = SPIN_LOCK_UNLOCKED;
// volatile int cf_busy = 0;
static struct request *active_req = NULL;
static int cf_open (struct inode *, struct file *);
static int cf_release (struct inode *, struct file *);
static int cf_ioctl (struct inode *, struct file *, unsigned, unsigned long);
static void cf_request(request_queue_t * q);
static int cf_transfer(const struct request *req);
/*long (*unlocked_ioctl) (struct file *, unsigned, unsigned long);
long (*compat_ioctl) (struct file *, unsigned, unsigned long);*/
// int (*direct_access) (struct block_device *, sector_t, unsigned long *);
// int (*media_changed) (struct gendisk *);
// int (*revalidate_disk) (struct gendisk *);
static struct block_device_operations cf_bdops = {
.owner = THIS_MODULE,
.open = cf_open,
.release = cf_release,
.ioctl = cf_ioctl,
.media_changed = NULL,
.unlocked_ioctl = NULL,
.revalidate_disk = NULL,
.compat_ioctl = NULL,
.direct_access = NULL
};
int cf_mips_probe(struct platform_device *pdev)
{
struct gendisk* cf_gendisk=NULL;
struct cf_device *cdev = (struct cf_device *) pdev->dev.platform_data;
struct cf_mips_dev *dev;
struct resource *r;
int reg_result;
reg_result = register_blkdev(MAJOR_NR, "cf-mips");
if (reg_result < 0) {
printk(KERN_WARNING "cf-mips: can't get major %d\n", MAJOR_NR);
return reg_result;
}
dev = (struct cf_mips_dev *)kmalloc(sizeof(struct cf_mips_dev),GFP_KERNEL);
if (!dev)
goto out_err;
memset(dev, 0, sizeof(struct cf_mips_dev));
cdev->dev = dev;
dev->pin = cdev->gpio_pin;
dev->irq = platform_get_irq_byname(pdev, "cf_irq");
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cf_membase");
dev->base = (void *) r->start;
if (cf_init(dev)) goto out_err;
printk("init done");
spin_lock_init(&dev->lock);
dev->queue = blk_init_queue(cf_request,&dev->lock);
if (!dev->queue){
printk(KERN_ERR "cf-mips: no mem for queue\n");
goto out_err;
}
blk_queue_max_sectors(dev->queue,ATA_MAX_SECT_PER_CMD);
/* For memory devices, it is always better to avoid crossing segments
inside the same request. */
/* if (dev->dtype==0x848A){
printk(KERN_INFO "Setting boundary for cf to 0x%x",(dev->block_size*512)-1);
blk_queue_segment_boundary(dev->queue, (dev->block_size*512)-1);
}*/
dev->gd = alloc_disk(CF_MAX_PART);
cf_gendisk = dev->gd;
cdev->gd = dev->gd;
if (!cf_gendisk) goto out_err; /* Last of these goto's */
cf_gendisk->major = MAJOR_NR;
cf_gendisk->first_minor = 0;
cf_gendisk->queue=dev->queue;
BUG_ON(cf_gendisk->minors != CF_MAX_PART);
strcpy(cf_gendisk->disk_name,"cfa");
cf_gendisk->fops = &cf_bdops;
cf_gendisk->flags = 0 ; /* is not yet GENHD_FL_REMOVABLE */
cf_gendisk->private_data=dev;
set_capacity(cf_gendisk,dev->sectors * CF_KERNEL_MUL);
/* Let the disk go live */
add_disk(cf_gendisk);
#if 0
result = cf_init();
/* default cfg for all partitions */
memset(cf_parts, 0, sizeof (cf_parts[0]) * CF_MAX_PART);
memset(cf_part_sizes, 0, sizeof (cf_part_sizes[0]) * CF_MAX_PART);
for (i = 0; i < CF_MAX_PART; ++i) {
cf_hsect_sizes[i] = CF_SECT_SIZE;
cf_max_sectors[i] = ATA_MAX_SECT_PER_CMD;
cf_blksize_sizes[i] = BLOCK_SIZE;
}
/* setup info for whole disk (partition 0) */
cf_part_sizes[0] = cf_sectors / 2;
cf_parts[0].nr_sects = cf_sectors;
blk_size[MAJOR_NR] = cf_part_sizes;
blksize_size[MAJOR_NR] = cf_blksize_sizes;
max_sectors[MAJOR_NR] = cf_max_sectors;
hardsect_size[MAJOR_NR] = cf_hsect_sizes;
read_ahead[MAJOR_NR] = 8; /* (4kB) */
blk_init_queue(BLK_DEFAULT_QUEUE(MAJOR_NR), DEVICE_REQUEST);
add_gendisk(&cf_gendisk);
#endif
// printk(KERN_INFO "cf-mips partition check: \n");
// register_disk(cf_gendisk, MKDEV(MAJOR_NR, 0), CF_MAX_PART,
// &cf_bdops, dev->sectors);
return 0;
out_err:
if (dev->queue){
blk_cleanup_queue(dev->queue);
}
if (reg_result) {
unregister_blkdev(MAJOR_NR, "cf-mips");
return reg_result;
}
if (dev){
cf_cleanup(dev);
kfree(dev);
}
return 1;
}
static int
cf_mips_remove(struct platform_device *pdev)
{
struct cf_device *cdev = (struct cf_device *) pdev->dev.platform_data;
struct cf_mips_dev *dev = (struct cf_mips_dev *) cdev->dev;
unregister_blkdev(MAJOR_NR, "cf-mips");
blk_cleanup_queue(dev->queue);
del_gendisk(dev->gd);
cf_cleanup(dev);
return 0;
}
static struct platform_driver cf_driver = {
.driver.name = "rb500-cf",
.probe = cf_mips_probe,
.remove = cf_mips_remove,
};
static int __init cf_mips_init(void)
{
printk(KERN_INFO "cf-mips module loaded\n");
return platform_driver_register(&cf_driver);
}
static void cf_mips_cleanup(void)
{
platform_driver_unregister(&cf_driver);
printk(KERN_INFO "cf-mips module removed\n");
}
module_init(cf_mips_init);
module_exit(cf_mips_cleanup);
MODULE_LICENSE("GPL");
MODULE_ALIAS_BLOCKDEV_MAJOR(CF_MIPS_MAJOR);
static int cf_open(struct inode *inode, struct file *filp)
{
struct cf_mips_dev *dev=inode->i_bdev->bd_disk->private_data;
int minor = MINOR(inode->i_rdev);
if (minor >= CF_MAX_PART)
return -ENODEV;
//DEBUGP(KERN_INFO "cf-mips module opened, minor %d\n", minor);
spin_lock(&dev->lock);
dev->users++;
spin_unlock(&dev->lock);
filp->private_data=dev;
/* dirty workaround to set CFRDY GPIO as an input when some other
program sets it as an output */
gpio_set_value(dev->pin, 0);
return 0; /* success */
}
static int cf_release(struct inode *inode, struct file *filp)
{
int minor = MINOR(inode->i_rdev);
struct cf_mips_dev *dev=inode->i_bdev->bd_disk->private_data;
spin_lock(&dev->lock);
dev->users--;
spin_unlock(&dev->lock);
return 0;
}
static int cf_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
unsigned minor = MINOR(inode->i_rdev);
struct cf_mips_dev *dev=inode->i_bdev->bd_disk->private_data;
DEBUGP(KERN_INFO "cf_ioctl cmd %u\n", cmd);
switch (cmd) {
case BLKRRPART: /* re-read partition table */
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
printk(KERN_INFO "cf-mips partition check: \n");
register_disk(dev->gd);
return 0;
case HDIO_GETGEO:
{
struct hd_geometry geo;
geo.cylinders = dev->cyl;
geo.heads = dev->head;
geo.sectors = dev->spt;
geo.start = (*dev->gd->part)[minor].start_sect;
if (copy_to_user((void *) arg, &geo, sizeof (geo)))
return -EFAULT;
}
return 0;
}
return -EINVAL; /* unknown command */
}
static void cf_request(request_queue_t * q)
{
struct cf_mips_dev* dev;
struct request * req;
int status;
/* We could have q->queuedata = dev , but haven't yet. */
if (active_req)
return;
while ((req=elv_next_request(q))!=NULL){
dev=req->rq_disk->private_data;
status=cf_transfer(req);
if (status==CF_TRANS_IN_PROGRESS){
active_req=req;
return;
}
end_request(req,status);
}
}
static int cf_transfer(const struct request *req)
{
struct cf_mips_dev* dev=req->rq_disk->private_data;
if (!blk_fs_request(req)){
if (printk_ratelimit())
printk(KERN_WARNING "cf-mips: skipping non-fs request 0x%x\n",req->cmd[0]);
return CF_TRANS_FAILED;
}
return cf_do_transfer(dev,req->sector,req->current_nr_sectors,req->buffer,rq_data_dir(req));
}
void cf_async_trans_done(struct cf_mips_dev * dev,int result)
{
struct request *req;
spin_lock(&dev->lock);
req=active_req;
active_req=NULL;
end_request(req,result);
spin_unlock(&dev->lock);
spin_lock(&dev->lock);
cf_request(dev->queue);
spin_unlock(&dev->lock);
}

View file

@ -1,240 +0,0 @@
/*
* RC32434_WDT 0.01: IDT Interprise 79RC32434 watchdog driver
* Copyright (c) Ondrej Zajicek <santiago@crfreenet.org>, 2006
*
* based on
*
* SoftDog 0.05: A Software Watchdog Device
*
* (c) Copyright 1996 Alan Cox <alan@redhat.com>, All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/reboot.h>
#include <linux/smp_lock.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/uaccess.h>
#include <asm/rc32434/integ.h>
#define DEFAULT_TIMEOUT 15 /* (secs) Default is 15 seconds */
#define MAX_TIMEOUT 20
/*
* (secs) Max is 20 seconds
* (max frequency of counter is ~200 MHz, counter is 32-bit unsigned int)
*/
#define NAME "rc32434_wdt"
#define VERSION "0.1"
static INTEG_t rc_wdt = (INTEG_t) INTEG_VirtualAddress;
static int expect_close = 0;
static int access = 0;
static int timeout = 0;
static int nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
MODULE_LICENSE("GPL");
static inline void start_wdt(void)
{
rc_wdt -> wtcount = 0;
rc_wdt -> errcs |= ERRCS_wre_m;
rc_wdt -> wtc |= WTC_en_m;
}
static inline void stop_wdt(void)
{
rc_wdt -> wtc &= ~WTC_en_m;
rc_wdt -> errcs &= ~ERRCS_wre_m;
}
static inline void set_wdt(int new_timeout)
{
u32 cmp = new_timeout * mips_hpt_frequency;
u32 state;
timeout = new_timeout;
/*
* store and disable WTC
*/
state = rc_wdt -> wtc & WTC_en_m;
rc_wdt -> wtc &= ~WTC_en_m;
rc_wdt -> wtcount = 0;
rc_wdt -> wtcompare = cmp;
/*
* restore WTC
*/
rc_wdt -> wtc |= state;
}
static inline void update_wdt(void)
{
rc_wdt -> wtcount = 0;
}
/*
* Allow only one person to hold it open
*/
static int wdt_open(struct inode *inode, struct file *file)
{
if (access)
return -EBUSY;
if (nowayout) {
__module_get(THIS_MODULE);
}
/*
* Activate timer
*/
start_wdt();
printk(KERN_INFO NAME ": enabling watchdog timer\n");
access = 1;
return 0;
}
static int wdt_release(struct inode *inode, struct file *file)
{
/*
* Shut off the timer.
* Lock it in if it's a module and we set nowayout
*/
if (expect_close && nowayout == 0) {
stop_wdt ();
printk(KERN_INFO NAME ": disabling watchdog timer\n");
module_put(THIS_MODULE);
} else {
printk (KERN_CRIT NAME ": device closed unexpectedly. WDT will not stop!\n");
}
access = 0;
return 0;
}
static ssize_t wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
{
/*
* Refresh the timer.
*/
if (len) {
if (!nowayout) {
size_t i;
/* In case it was set long ago */
expect_close = 0;
for (i = 0; i != len; i++) {
char c;
if (get_user(c, data + i))
return -EFAULT;
if (c == 'V')
expect_close = 1;
}
}
update_wdt ();
return len;
}
return 0;
}
static int wdt_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
int new_timeout;
static struct watchdog_info ident = {
.options = WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE,
.firmware_version = 0,
.identity = "RC32434_WDT Watchdog",
};
switch (cmd) {
default:
return -ENOTTY;
case WDIOC_GETSUPPORT:
if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
return -EFAULT;
return 0;
case WDIOC_GETSTATUS:
case WDIOC_GETBOOTSTATUS:
return put_user(0,(int *)arg);
case WDIOC_KEEPALIVE:
update_wdt();
return 0;
case WDIOC_SETTIMEOUT:
if (get_user(new_timeout, (int *)arg))
return -EFAULT;
if (new_timeout < 1)
return -EINVAL;
if (new_timeout > MAX_TIMEOUT)
return -EINVAL;
set_wdt(new_timeout);
/* Fall */
case WDIOC_GETTIMEOUT:
return put_user(timeout, (int *)arg);
}
}
static struct file_operations wdt_fops = {
owner: THIS_MODULE,
llseek: no_llseek,
write: wdt_write,
ioctl: wdt_ioctl,
open: wdt_open,
release: wdt_release,
};
static struct miscdevice wdt_miscdev = {
minor: WATCHDOG_MINOR,
name: "watchdog",
fops: &wdt_fops,
};
static char banner[] __initdata = KERN_INFO NAME ": Watchdog Timer version " VERSION ", timer margin: %d sec\n";
static int __init watchdog_init(void)
{
int ret;
/*
* There should be check for RC32434 SoC
*/
if (mips_machgroup != MACH_GROUP_MIKROTIK) return -1;
ret = misc_register(&wdt_miscdev);
if (ret)
return ret;
stop_wdt();
set_wdt(DEFAULT_TIMEOUT);
printk(banner, timeout);
return 0;
}
static void __exit watchdog_exit(void)
{
misc_deregister(&wdt_miscdev);
}
module_init(watchdog_init);
module_exit(watchdog_exit);

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@ -1,81 +0,0 @@
/*
* linux/drivers/leds/leds-rb500.c
*
* Copyright (C) 2006
* Twente Institute for Wireless and Mobile Communications BV
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details (see file GPLv2).
*
* Author: Tjalling Hattink <tjalling.hattink@ti-wmc.nl>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <asm/rc32434/rb.h>
static void rb500led_amber_set(struct led_classdev *led_cdev, enum led_brightness value)
{
if (value)
changeLatchU5(LO_ULED, 0);
else
changeLatchU5(0, LO_ULED);
}
static struct led_classdev rb500_amber_led = {
.name = "rb500led:amber",
.default_trigger = "ide-disk",
.brightness_set = rb500led_amber_set,
};
static int rb500led_probe(struct platform_device *pdev)
{
int ret;
changeLatchU5(0, LO_ULED);
ret = led_classdev_register(&pdev->dev, &rb500_amber_led);
return ret;
}
static int rb500led_remove(struct platform_device *pdev)
{
led_classdev_unregister(&rb500_amber_led);
return 0;
}
static struct platform_driver rb500led_driver = {
.probe = rb500led_probe,
.remove = rb500led_remove,
.driver = {
.name = "rb500-led",
},
};
static int __init rb500led_init(void)
{
return platform_driver_register(&rb500led_driver);
}
static void __exit rb500led_exit(void)
{
platform_driver_unregister(&rb500led_driver);
}
module_init(rb500led_init);
module_exit(rb500led_exit);
MODULE_AUTHOR("tjalling.hattink@ti-wmc.nl");
MODULE_DESCRIPTION("Mikrotik RB500 LED driver");
MODULE_LICENSE("GPL");

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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* Definitions for IDT RC32434 on-chip ethernet controller.
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
* Aug 2004
*
* Added NAPI
*
**************************************************************************
*/
#include <asm/rc32434/rc32434.h>
#include <asm/rc32434/dma_v.h>
#include <asm/rc32434/eth_v.h>
#define CONFIG_IDT_USE_NAPI 1
#define RC32434_DEBUG 2
//#define RC32434_PROC_DEBUG
#undef RC32434_DEBUG
#ifdef RC32434_DEBUG
/* use 0 for production, 1 for verification, >2 for debug */
static int rc32434_debug = RC32434_DEBUG;
#define ASSERT(expr) \
if(!(expr)) { \
printk( "Assertion failed! %s,%s,%s,line=%d\n", \
#expr,__FILE__,__FUNCTION__,__LINE__); }
#define DBG(lvl, format, arg...) if (rc32434_debug > lvl) printk(KERN_INFO "%s: " format, dev->name , ## arg)
#else
#define ASSERT(expr) do {} while (0)
#define DBG(lvl, format, arg...) do {} while (0)
#endif
#define INFO(format, arg...) printk(KERN_INFO "%s: " format, dev->name , ## arg)
#define ERR(format, arg...) printk(KERN_ERR "%s: " format, dev->name , ## arg)
#define WARN(format, arg...) printk(KERN_WARNING "%s: " format, dev->name , ## arg)
/* the following must be powers of two */
#ifdef CONFIG_IDT_USE_NAPI
#define RC32434_NUM_RDS 64 /* number of receive descriptors */
#define RC32434_NUM_TDS 64 /* number of transmit descriptors */
#else
#define RC32434_NUM_RDS 128 /* number of receive descriptors */
#define RC32434_NUM_TDS 128 /* number of transmit descriptors */
#endif
#define RC32434_RBSIZE 1536 /* size of one resource buffer = Ether MTU */
#define RC32434_RDS_MASK (RC32434_NUM_RDS-1)
#define RC32434_TDS_MASK (RC32434_NUM_TDS-1)
#define RD_RING_SIZE (RC32434_NUM_RDS * sizeof(struct DMAD_s))
#define TD_RING_SIZE (RC32434_NUM_TDS * sizeof(struct DMAD_s))
#define RC32434_TX_TIMEOUT HZ * 100
#define rc32434_eth0_regs ((ETH_t)(ETH0_VirtualAddress))
#define rc32434_eth1_regs ((ETH_t)(ETH1_VirtualAddress))
enum status { filled, empty};
#define IS_DMA_FINISHED(X) (((X) & (DMAD_f_m)) != 0)
#define IS_DMA_DONE(X) (((X) & (DMAD_d_m)) != 0)
/* Information that need to be kept for each board. */
struct rc32434_local {
ETH_t eth_regs;
DMA_Chan_t rx_dma_regs;
DMA_Chan_t tx_dma_regs;
volatile DMAD_t td_ring; /* transmit descriptor ring */
volatile DMAD_t rd_ring; /* receive descriptor ring */
struct sk_buff* tx_skb[RC32434_NUM_TDS]; /* skbuffs for pkt to trans */
struct sk_buff* rx_skb[RC32434_NUM_RDS]; /* skbuffs for pkt to trans */
#ifndef CONFIG_IDT_USE_NAPI
struct tasklet_struct * rx_tasklet;
#endif
struct tasklet_struct * tx_tasklet;
int rx_next_done;
int rx_chain_head;
int rx_chain_tail;
enum status rx_chain_status;
int tx_next_done;
int tx_chain_head;
int tx_chain_tail;
enum status tx_chain_status;
int tx_count;
int tx_full;
struct timer_list mii_phy_timer;
unsigned long duplex_mode;
int rx_irq;
int tx_irq;
int ovr_irq;
int und_irq;
struct net_device_stats stats;
spinlock_t lock;
/* debug /proc entry */
struct proc_dir_entry *ps;
int dma_halt_cnt; int dma_run_cnt;
};
extern unsigned int idt_cpu_freq;
/* Index to functions, as function prototypes. */
static int rc32434_open(struct net_device *dev);
static int rc32434_send_packet(struct sk_buff *skb, struct net_device *dev);
static void rc32434_mii_handler(unsigned long data);
static irqreturn_t rc32434_und_interrupt(int irq, void *dev_id);
static irqreturn_t rc32434_rx_dma_interrupt(int irq, void *dev_id);
static irqreturn_t rc32434_tx_dma_interrupt(int irq, void *dev_id);
#ifdef RC32434_REVISION
static irqreturn_t rc32434_ovr_interrupt(int irq, void *dev_id);
#endif
static int rc32434_close(struct net_device *dev);
static struct net_device_stats *rc32434_get_stats(struct net_device *dev);
static void rc32434_multicast_list(struct net_device *dev);
static int rc32434_init(struct net_device *dev);
static void rc32434_tx_timeout(struct net_device *dev);
static void rc32434_tx_tasklet(unsigned long tx_data_dev);
#ifdef CONFIG_IDT_USE_NAPI
static int rc32434_poll(struct net_device *rx_data_dev, int *budget);
#else
static void rc32434_rx_tasklet(unsigned long rx_data_dev);
#endif
static void rc32434_cleanup_module(void);
static inline void rc32434_abort_dma(struct net_device *dev, DMA_Chan_t ch)
{
if (__raw_readl(&ch->dmac) & DMAC_run_m) {
__raw_writel(0x10, &ch->dmac);
while (!(__raw_readl(&ch->dmas) & DMAS_h_m))
dev->trans_start = jiffies;
__raw_writel(0, &ch->dmas);
}
__raw_writel(0, &ch->dmadptr);
__raw_writel(0, &ch->dmandptr);
}

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#ifndef __IDT_DDR_H__
#define __IDT_DDR_H__
/*******************************************************************************
*
* Copyright 2002 Integrated Device Technology, Inc.
* All rights reserved.
*
* DDR register definition.
*
* File : $Id: ddr.h,v 1.2 2002/06/06 18:34:03 astichte Exp $
*
* Author : ryan.holmQVist@idt.com
* Date : 20011005
* Update :
* $Log: ddr.h,v $
* Revision 1.2 2002/06/06 18:34:03 astichte
* Added XXX_PhysicalAddress and XXX_VirtualAddress
*
* Revision 1.1 2002/05/29 17:33:21 sysarch
* jba File moved from vcode/include/idt/acacia
*
*
******************************************************************************/
enum
{
DDR0_PhysicalAddress = 0x18018000,
DDR_PhysicalAddress = DDR0_PhysicalAddress, // Default
DDR0_VirtualAddress = 0xb8018000,
DDR_VirtualAddress = DDR0_VirtualAddress, // Default
} ;
typedef struct DDR_s
{
u32 ddrbase ;
u32 ddrmask ;
u32 res1;
u32 res2;
u32 ddrc ;
u32 ddrabase ;
u32 ddramask ;
u32 ddramap ;
u32 ddrcust;
u32 ddrrdc;
u32 ddrspare;
} volatile *DDR_t ;
enum
{
DDR0BASE_baseaddr_b = 16,
DDR0BASE_baseaddr_m = 0xffff0000,
DDR0MASK_mask_b = 16,
DDR0MASK_mask_m = 0xffff0000,
DDR1BASE_baseaddr_b = 16,
DDR1BASE_baseaddr_m = 0xffff0000,
DDR1MASK_mask_b = 16,
DDR1MASK_mask_m = 0xffff0000,
DDRC_ata_b = 5,
DDRC_ata_m = 0x000000E0,
DDRC_dbw_b = 8,
DDRC_dbw_m = 0x00000100,
DDRC_wr_b = 9,
DDRC_wr_m = 0x00000600,
DDRC_ps_b = 11,
DDRC_ps_m = 0x00001800,
DDRC_dtype_b = 13,
DDRC_dtype_m = 0x0000e000,
DDRC_rfc_b = 16,
DDRC_rfc_m = 0x000f0000,
DDRC_rp_b = 20,
DDRC_rp_m = 0x00300000,
DDRC_ap_b = 22,
DDRC_ap_m = 0x00400000,
DDRC_rcd_b = 23,
DDRC_rcd_m = 0x01800000,
DDRC_cl_b = 25,
DDRC_cl_m = 0x06000000,
DDRC_dbm_b = 27,
DDRC_dbm_m = 0x08000000,
DDRC_sds_b = 28,
DDRC_sds_m = 0x10000000,
DDRC_atp_b = 29,
DDRC_atp_m = 0x60000000,
DDRC_re_b = 31,
DDRC_re_m = 0x80000000,
DDRRDC_ces_b = 0,
DDRRDC_ces_m = 0x00000001,
DDRRDC_ace_b = 1,
DDRRDC_ace_m = 0x00000002,
DDRABASE_baseaddr_b = 16,
DDRABASE_baseaddr_m = 0xffff0000,
DDRAMASK_mask_b = 16,
DDRAMASK_mask_m = 0xffff0000,
DDRAMAP_map_b = 16,
DDRAMAP_map_m = 0xffff0000,
DDRCUST_cs_b = 0,
DDRCUST_cs_m = 0x00000003,
DDRCUST_we_b = 2,
DDRCUST_we_m = 0x00000004,
DDRCUST_ras_b = 3,
DDRCUST_ras_m = 0x00000008,
DDRCUST_cas_b = 4,
DDRCUST_cas_m = 0x00000010,
DDRCUST_cke_b = 5,
DDRCUST_cke_m = 0x00000020,
DDRCUST_ba_b = 6,
DDRCUST_ba_m = 0x000000c0,
RCOUNT_rcount_b = 0,
RCOUNT_rcount_m = 0x0000ffff,
RCOMPARE_rcompare_b = 0,
RCOMPARE_rcompare_m = 0x0000ffff,
RTC_ce_b = 0,
RTC_ce_m = 0x00000001,
RTC_to_b = 1,
RTC_to_m = 0x00000002,
RTC_rqe_b = 2,
RTC_rqe_m = 0x00000004,
DDRDQSC_dm_b = 0,
DDRDQSC_dm_m = 0x00000003,
DDRDQSC_dqsbs_b = 2,
DDRDQSC_dqsbs_m = 0x000000fc,
DDRDQSC_db_b = 8,
DDRDQSC_db_m = 0x00000100,
DDRDQSC_dbsp_b = 9,
DDRDQSC_dbsp_m = 0x01fffe00,
DDRDQSC_bdp_b = 25,
DDRDQSC_bdp_m = 0x7e000000,
DDRDLLC_eao_b = 0,
DDRDLLC_eao_m = 0x00000001,
DDRDLLC_eo_b = 1,
DDRDLLC_eo_m = 0x0000003e,
DDRDLLC_fs_b = 6,
DDRDLLC_fs_m = 0x000000c0,
DDRDLLC_as_b = 8,
DDRDLLC_as_m = 0x00000700,
DDRDLLC_sp_b = 11,
DDRDLLC_sp_m = 0x001ff800,
DDRDLLFC_men_b = 0,
DDRDLLFC_men_m = 0x00000001,
DDRDLLFC_aen_b = 1,
DDRDLLFC_aen_m = 0x00000002,
DDRDLLFC_ff_b = 2,
DDRDLLFC_ff_m = 0x00000004,
DDRDLLTA_addr_b = 2,
DDRDLLTA_addr_m = 0xfffffffc,
DDRDLLED_dbe_b = 0,
DDRDLLED_dbe_m = 0x00000001,
DDRDLLED_dte_b = 1,
DDRDLLED_dte_m = 0x00000002,
} ;
#endif // __IDT_DDR_H__

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#ifndef __IDT_DMA_H__
#define __IDT_DMA_H__
/*******************************************************************************
*
* Copyright 2002 Integrated Device Technology, Inc.
* All rights reserved.
*
* DMA register definition.
*
* File : $Id: dma.h,v 1.3 2002/06/06 18:34:03 astichte Exp $
*
* Author : ryan.holmQVist@idt.com
* Date : 20011005
* Update :
* $Log: dma.h,v $
* Revision 1.3 2002/06/06 18:34:03 astichte
* Added XXX_PhysicalAddress and XXX_VirtualAddress
*
* Revision 1.2 2002/06/05 18:30:46 astichte
* Removed IDTField
*
* Revision 1.1 2002/05/29 17:33:21 sysarch
* jba File moved from vcode/include/idt/acacia
*
*
******************************************************************************/
enum
{
DMA0_PhysicalAddress = 0x18040000,
DMA_PhysicalAddress = DMA0_PhysicalAddress, // Default
DMA0_VirtualAddress = 0xb8040000,
DMA_VirtualAddress = DMA0_VirtualAddress, // Default
} ;
/*
* DMA descriptor (in physical memory).
*/
typedef struct DMAD_s
{
u32 control ; // Control. use DMAD_*
u32 ca ; // Current Address.
u32 devcs ; // Device control and status.
u32 link ; // Next descriptor in chain.
} volatile *DMAD_t ;
enum
{
DMAD_size = sizeof (struct DMAD_s),
DMAD_count_b = 0, // in DMAD_t -> control
DMAD_count_m = 0x0003ffff, // in DMAD_t -> control
DMAD_ds_b = 20, // in DMAD_t -> control
DMAD_ds_m = 0x00300000, // in DMAD_t -> control
DMAD_ds_ethRcv_v = 0,
DMAD_ds_ethXmt_v = 0,
DMAD_ds_memToFifo_v = 0,
DMAD_ds_fifoToMem_v = 0,
DMAD_ds_pciToMem_v = 0,
DMAD_ds_memToPci_v = 0,
DMAD_devcmd_b = 22, // in DMAD_t -> control
DMAD_devcmd_m = 0x01c00000, // in DMAD_t -> control
DMAD_devcmd_byte_v = 0, //memory-to-memory
DMAD_devcmd_halfword_v = 1, //memory-to-memory
DMAD_devcmd_word_v = 2, //memory-to-memory
DMAD_devcmd_2words_v = 3, //memory-to-memory
DMAD_devcmd_4words_v = 4, //memory-to-memory
DMAD_devcmd_6words_v = 5, //memory-to-memory
DMAD_devcmd_8words_v = 6, //memory-to-memory
DMAD_devcmd_16words_v = 7, //memory-to-memory
DMAD_cof_b = 25, // chain on finished
DMAD_cof_m = 0x02000000, //
DMAD_cod_b = 26, // chain on done
DMAD_cod_m = 0x04000000, //
DMAD_iof_b = 27, // interrupt on finished
DMAD_iof_m = 0x08000000, //
DMAD_iod_b = 28, // interrupt on done
DMAD_iod_m = 0x10000000, //
DMAD_t_b = 29, // terminated
DMAD_t_m = 0x20000000, //
DMAD_d_b = 30, // done
DMAD_d_m = 0x40000000, //
DMAD_f_b = 31, // finished
DMAD_f_m = 0x80000000, //
} ;
/*
* DMA register (within Internal Register Map).
*/
struct DMA_Chan_s
{
u32 dmac ; // Control.
u32 dmas ; // Status.
u32 dmasm ; // Mask.
u32 dmadptr ; // Descriptor pointer.
u32 dmandptr ; // Next descriptor pointer.
};
typedef struct DMA_Chan_s volatile *DMA_Chan_t ;
//DMA_Channels use DMACH_count instead
enum
{
DMAC_run_b = 0, //
DMAC_run_m = 0x00000001, //
DMAC_dm_b = 1, // done mask
DMAC_dm_m = 0x00000002, //
DMAC_mode_b = 2, //
DMAC_mode_m = 0x0000000c, //
DMAC_mode_auto_v = 0,
DMAC_mode_burst_v = 1,
DMAC_mode_transfer_v = 2, //usually used
DMAC_mode_reserved_v = 3,
DMAC_a_b = 4, //
DMAC_a_m = 0x00000010, //
DMAS_f_b = 0, // finished (sticky)
DMAS_f_m = 0x00000001, //
DMAS_d_b = 1, // done (sticky)
DMAS_d_m = 0x00000002, //
DMAS_c_b = 2, // chain (sticky)
DMAS_c_m = 0x00000004, //
DMAS_e_b = 3, // error (sticky)
DMAS_e_m = 0x00000008, //
DMAS_h_b = 4, // halt (sticky)
DMAS_h_m = 0x00000010, //
DMASM_f_b = 0, // finished (1=mask)
DMASM_f_m = 0x00000001, //
DMASM_d_b = 1, // done (1=mask)
DMASM_d_m = 0x00000002, //
DMASM_c_b = 2, // chain (1=mask)
DMASM_c_m = 0x00000004, //
DMASM_e_b = 3, // error (1=mask)
DMASM_e_m = 0x00000008, //
DMASM_h_b = 4, // halt (1=mask)
DMASM_h_m = 0x00000010, //
} ;
/*
* DMA channel definitions
*/
enum
{
DMACH_ethRcv = 0,
DMACH_ethXmt = 1,
DMACH_memToFifo = 2,
DMACH_fifoToMem = 3,
DMACH_pciToMem = 4,
DMACH_memToPci = 5,
DMACH_count //must be last
};
typedef struct DMAC_s
{
struct DMA_Chan_s ch [DMACH_count] ; //use ch[DMACH_]
} volatile *DMA_t ;
#endif // __IDT_DMA_H__

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#ifndef __IDT_DMA_V_H__
#define __IDT_DMA_V_H__
/*******************************************************************************
*
* Copyright 2002 Integrated Device Technology, Inc.
* All rights reserved.
*
* DMA register definition.
*
* File : $Id: dma.h,v 1.3 2002/06/06 18:34:03 astichte Exp $
*
* Author : ryan.holmQVist@idt.com
* Date : 20011005
* Update :
* $Log: dma.h,v $
* Revision 1.3 2002/06/06 18:34:03 astichte
* Added XXX_PhysicalAddress and XXX_VirtualAddress
*
* Revision 1.2 2002/06/05 18:30:46 astichte
* Removed IDTField
*
* Revision 1.1 2002/05/29 17:33:21 sysarch
* jba File moved from vcode/include/idt/acacia
*
*
******************************************************************************/
#include <asm/rc32434/dma.h>
#include <asm/rc32434/rc32434.h>
#define DMA_CHAN_OFFSET 0x14
#define IS_DMA_USED(X) (((X) & (DMAD_f_m | DMAD_d_m | DMAD_t_m)) != 0)
#define DMA_COUNT(count) \
((count) & DMAD_count_m)
#define DMA_HALT_TIMEOUT 500
static inline int rc32434_halt_dma(DMA_Chan_t ch)
{
int timeout=1;
if (local_readl(&ch->dmac) & DMAC_run_m) {
local_writel(0, &ch->dmac);
for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) {
if (local_readl(&ch->dmas) & DMAS_h_m) {
local_writel(0, &ch->dmas);
break;
}
}
}
return timeout ? 0 : 1;
}
static inline void rc32434_start_dma(DMA_Chan_t ch, u32 dma_addr)
{
local_writel(0, &ch->dmandptr);
local_writel(dma_addr, &ch->dmadptr);
}
static inline void rc32434_chain_dma(DMA_Chan_t ch, u32 dma_addr)
{
local_writel(dma_addr, &ch->dmandptr);
}
#endif // __IDT_DMA_V_H__

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