ramips: Fix amount of MT7621 pins controlled by spi group
The PINS conntrolled by the SPI bits in the GPIO_MODE register is always 7 and not 8 for nand mode. Signed-off-by: Sven Eckelmann <sven@open-mesh.com> SVN-Revision: 46644
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@ -593,7 +593,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+static struct rt2880_pmx_func rgmii2_grp[] = { FUNC("rgmii", 0, 22, 12) };
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+static struct rt2880_pmx_func spi_grp[] = {
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+ FUNC("spi", 0, 34, 7),
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+ FUNC("nand", 2, 34, 8),
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+ FUNC("nand", 2, 34, 7),
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+};
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+static struct rt2880_pmx_func sdhci_grp[] = {
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+ FUNC("sdhci", 0, 41, 8),
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