2013-10-02 22:24:01 +00:00
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patches for bgmac backported from net-next/master
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2013-09-16 19:46:34 +00:00
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2013-10-02 22:24:01 +00:00
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--- a/drivers/net/ethernet/broadcom/Kconfig
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+++ b/drivers/net/ethernet/broadcom/Kconfig
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@@ -132,7 +132,8 @@ config BNX2X_SRIOV
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config BGMAC
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tristate "BCMA bus GBit core support"
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- depends on BCMA_HOST_SOC && HAS_DMA
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+ depends on BCMA_HOST_SOC && HAS_DMA && BCM47XX
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+ select PHYLIB
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---help---
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This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
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They can be found on BCM47xx SoCs and provide gigabit ethernet.
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2013-09-16 19:46:34 +00:00
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--- a/drivers/net/ethernet/broadcom/bgmac.c
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+++ b/drivers/net/ethernet/broadcom/bgmac.c
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2013-10-02 22:24:01 +00:00
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@@ -149,6 +149,8 @@ static netdev_tx_t bgmac_dma_tx_add(stru
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dma_desc->ctl0 = cpu_to_le32(ctl0);
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dma_desc->ctl1 = cpu_to_le32(ctl1);
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+ netdev_sent_queue(net_dev, skb->len);
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+
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wmb();
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/* Increase ring->end to point empty slot. We tell hardware the first
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@@ -157,6 +159,7 @@ static netdev_tx_t bgmac_dma_tx_add(stru
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2013-09-16 19:46:34 +00:00
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if (++ring->end >= BGMAC_TX_RING_SLOTS)
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ring->end = 0;
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX,
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+ ring->index_base +
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ring->end * sizeof(struct bgmac_dma_desc));
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/* Always keep one slot free to allow detecting bugged calls. */
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2013-10-02 22:24:01 +00:00
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@@ -177,10 +180,13 @@ static void bgmac_dma_tx_free(struct bgm
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struct device *dma_dev = bgmac->core->dma_dev;
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int empty_slot;
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bool freed = false;
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+ unsigned bytes_compl = 0, pkts_compl = 0;
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2013-09-16 19:46:34 +00:00
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/* The last slot that hardware didn't consume yet */
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empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
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empty_slot &= BGMAC_DMA_TX_STATDPTR;
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+ empty_slot -= ring->index_base;
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+ empty_slot &= BGMAC_DMA_TX_STATDPTR;
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empty_slot /= sizeof(struct bgmac_dma_desc);
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while (ring->start != empty_slot) {
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2013-10-02 22:24:01 +00:00
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@@ -192,6 +198,9 @@ static void bgmac_dma_tx_free(struct bgm
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slot->skb->len, DMA_TO_DEVICE);
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slot->dma_addr = 0;
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+ bytes_compl += slot->skb->len;
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+ pkts_compl++;
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+
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/* Free memory! :) */
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dev_kfree_skb(slot->skb);
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slot->skb = NULL;
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@@ -205,6 +214,8 @@ static void bgmac_dma_tx_free(struct bgm
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freed = true;
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}
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+ netdev_completed_queue(bgmac->net_dev, pkts_compl, bytes_compl);
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+
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if (freed && netif_queue_stopped(bgmac->net_dev))
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netif_wake_queue(bgmac->net_dev);
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}
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2013-11-03 19:24:39 +00:00
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@@ -241,31 +252,59 @@ static int bgmac_dma_rx_skb_for_slot(str
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struct bgmac_slot_info *slot)
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{
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struct device *dma_dev = bgmac->core->dma_dev;
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+ struct sk_buff *skb;
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+ dma_addr_t dma_addr;
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struct bgmac_rx_header *rx;
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/* Alloc skb */
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- slot->skb = netdev_alloc_skb(bgmac->net_dev, BGMAC_RX_BUF_SIZE);
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- if (!slot->skb)
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+ skb = netdev_alloc_skb(bgmac->net_dev, BGMAC_RX_BUF_SIZE);
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+ if (!skb)
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return -ENOMEM;
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/* Poison - if everything goes fine, hardware will overwrite it */
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- rx = (struct bgmac_rx_header *)slot->skb->data;
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+ rx = (struct bgmac_rx_header *)skb->data;
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rx->len = cpu_to_le16(0xdead);
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rx->flags = cpu_to_le16(0xbeef);
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/* Map skb for the DMA */
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- slot->dma_addr = dma_map_single(dma_dev, slot->skb->data,
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- BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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- if (dma_mapping_error(dma_dev, slot->dma_addr)) {
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+ dma_addr = dma_map_single(dma_dev, skb->data,
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+ BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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+ if (dma_mapping_error(dma_dev, dma_addr)) {
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bgmac_err(bgmac, "DMA mapping error\n");
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+ dev_kfree_skb(skb);
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return -ENOMEM;
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}
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+
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+ /* Update the slot */
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+ slot->skb = skb;
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+ slot->dma_addr = dma_addr;
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+
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if (slot->dma_addr & 0xC0000000)
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bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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return 0;
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}
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+static void bgmac_dma_rx_setup_desc(struct bgmac *bgmac,
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+ struct bgmac_dma_ring *ring, int desc_idx)
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+{
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+ struct bgmac_dma_desc *dma_desc = ring->cpu_base + desc_idx;
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+ u32 ctl0 = 0, ctl1 = 0;
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+
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+ if (desc_idx == ring->num_slots - 1)
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+ ctl0 |= BGMAC_DESC_CTL0_EOT;
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+ ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
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+ /* Is there any BGMAC device that requires extension? */
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+ /* ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) &
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+ * B43_DMA64_DCTL1_ADDREXT_MASK;
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+ */
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+
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+ dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[desc_idx].dma_addr));
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+ dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[desc_idx].dma_addr));
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+ dma_desc->ctl0 = cpu_to_le32(ctl0);
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+ dma_desc->ctl1 = cpu_to_le32(ctl1);
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+}
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+
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static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring,
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int weight)
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{
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@@ -274,6 +313,8 @@ static int bgmac_dma_rx_read(struct bgma
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2013-09-16 19:46:34 +00:00
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end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS);
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end_slot &= BGMAC_DMA_RX_STATDPTR;
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+ end_slot -= ring->index_base;
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+ end_slot &= BGMAC_DMA_RX_STATDPTR;
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end_slot /= sizeof(struct bgmac_dma_desc);
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ring->end = end_slot;
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2013-11-03 19:24:39 +00:00
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@@ -282,7 +323,6 @@ static int bgmac_dma_rx_read(struct bgma
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struct device *dma_dev = bgmac->core->dma_dev;
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struct bgmac_slot_info *slot = &ring->slots[ring->start];
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struct sk_buff *skb = slot->skb;
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- struct sk_buff *new_skb;
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struct bgmac_rx_header *rx;
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u16 len, flags;
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@@ -295,38 +335,51 @@ static int bgmac_dma_rx_read(struct bgma
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len = le16_to_cpu(rx->len);
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flags = le16_to_cpu(rx->flags);
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- /* Check for poison and drop or pass the packet */
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- if (len == 0xdead && flags == 0xbeef) {
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- bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
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- ring->start);
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- } else {
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+ do {
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+ dma_addr_t old_dma_addr = slot->dma_addr;
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+ int err;
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+
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+ /* Check for poison and drop or pass the packet */
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+ if (len == 0xdead && flags == 0xbeef) {
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+ bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
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+ ring->start);
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+ dma_sync_single_for_device(dma_dev,
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+ slot->dma_addr,
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+ BGMAC_RX_BUF_SIZE,
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+ DMA_FROM_DEVICE);
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+ break;
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+ }
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+
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/* Omit CRC. */
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len -= ETH_FCS_LEN;
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- new_skb = netdev_alloc_skb_ip_align(bgmac->net_dev, len);
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- if (new_skb) {
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- skb_put(new_skb, len);
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- skb_copy_from_linear_data_offset(skb, BGMAC_RX_FRAME_OFFSET,
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- new_skb->data,
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- len);
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- skb_checksum_none_assert(skb);
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- new_skb->protocol =
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- eth_type_trans(new_skb, bgmac->net_dev);
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- netif_receive_skb(new_skb);
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- handled++;
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- } else {
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- bgmac->net_dev->stats.rx_dropped++;
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- bgmac_err(bgmac, "Allocation of skb for copying packet failed!\n");
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+ /* Prepare new skb as replacement */
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+ err = bgmac_dma_rx_skb_for_slot(bgmac, slot);
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+ if (err) {
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+ /* Poison the old skb */
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+ rx->len = cpu_to_le16(0xdead);
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+ rx->flags = cpu_to_le16(0xbeef);
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+
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+ dma_sync_single_for_device(dma_dev,
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+ slot->dma_addr,
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+ BGMAC_RX_BUF_SIZE,
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+ DMA_FROM_DEVICE);
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+ break;
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}
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+ bgmac_dma_rx_setup_desc(bgmac, ring, ring->start);
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- /* Poison the old skb */
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- rx->len = cpu_to_le16(0xdead);
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- rx->flags = cpu_to_le16(0xbeef);
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- }
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-
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- /* Make it back accessible to the hardware */
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- dma_sync_single_for_device(dma_dev, slot->dma_addr,
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- BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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+ /* Unmap old skb, we'll pass it to the netfif */
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+ dma_unmap_single(dma_dev, old_dma_addr,
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+ BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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+
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+ skb_put(skb, BGMAC_RX_FRAME_OFFSET + len);
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+ skb_pull(skb, BGMAC_RX_FRAME_OFFSET);
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+
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+ skb_checksum_none_assert(skb);
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+ skb->protocol = eth_type_trans(skb, bgmac->net_dev);
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+ netif_receive_skb(skb);
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+ handled++;
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+ } while (0);
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if (++ring->start >= BGMAC_RX_RING_SLOTS)
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ring->start = 0;
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@@ -418,9 +471,6 @@ static int bgmac_dma_alloc(struct bgmac
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2013-09-16 19:46:34 +00:00
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ring = &bgmac->tx_ring[i];
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ring->num_slots = BGMAC_TX_RING_SLOTS;
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ring->mmio_base = ring_base[i];
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- if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_TX))
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- bgmac_warn(bgmac, "TX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
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- ring->mmio_base);
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/* Alloc ring of descriptors */
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size = ring->num_slots * sizeof(struct bgmac_dma_desc);
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2013-11-03 19:24:39 +00:00
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@@ -435,6 +485,13 @@ static int bgmac_dma_alloc(struct bgmac
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2013-09-16 19:46:34 +00:00
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if (ring->dma_base & 0xC0000000)
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bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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+ ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
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+ BGMAC_DMA_RING_TX);
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+ if (ring->unaligned)
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+ ring->index_base = lower_32_bits(ring->dma_base);
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+ else
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+ ring->index_base = 0;
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+
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/* No need to alloc TX slots yet */
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}
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2013-11-03 19:24:39 +00:00
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@@ -444,9 +501,6 @@ static int bgmac_dma_alloc(struct bgmac
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2013-09-16 19:46:34 +00:00
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ring = &bgmac->rx_ring[i];
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ring->num_slots = BGMAC_RX_RING_SLOTS;
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ring->mmio_base = ring_base[i];
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- if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_RX))
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- bgmac_warn(bgmac, "RX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
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- ring->mmio_base);
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/* Alloc ring of descriptors */
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size = ring->num_slots * sizeof(struct bgmac_dma_desc);
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2013-11-03 19:24:39 +00:00
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@@ -462,6 +516,13 @@ static int bgmac_dma_alloc(struct bgmac
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2013-09-16 19:46:34 +00:00
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if (ring->dma_base & 0xC0000000)
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bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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+ ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
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+ BGMAC_DMA_RING_RX);
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+ if (ring->unaligned)
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+ ring->index_base = lower_32_bits(ring->dma_base);
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+ else
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+ ring->index_base = 0;
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+
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/* Alloc RX slots */
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for (j = 0; j < ring->num_slots; j++) {
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err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
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2013-11-03 19:24:39 +00:00
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@@ -482,19 +543,19 @@ err_dma_free:
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static void bgmac_dma_init(struct bgmac *bgmac)
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{
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struct bgmac_dma_ring *ring;
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- struct bgmac_dma_desc *dma_desc;
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- u32 ctl0, ctl1;
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int i;
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2013-09-16 19:46:34 +00:00
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for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) {
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ring = &bgmac->tx_ring[i];
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- /* We don't implement unaligned addressing, so enable first */
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- bgmac_dma_tx_enable(bgmac, ring);
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+ if (!ring->unaligned)
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+ bgmac_dma_tx_enable(bgmac, ring);
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO,
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lower_32_bits(ring->dma_base));
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI,
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upper_32_bits(ring->dma_base));
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+ if (ring->unaligned)
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+ bgmac_dma_tx_enable(bgmac, ring);
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ring->start = 0;
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ring->end = 0; /* Points the slot that should *not* be read */
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2013-11-03 19:24:39 +00:00
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@@ -505,32 +566,20 @@ static void bgmac_dma_init(struct bgmac
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2013-09-16 19:46:34 +00:00
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ring = &bgmac->rx_ring[i];
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- /* We don't implement unaligned addressing, so enable first */
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- bgmac_dma_rx_enable(bgmac, ring);
|
|
|
|
+ if (!ring->unaligned)
|
|
|
|
+ bgmac_dma_rx_enable(bgmac, ring);
|
|
|
|
bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO,
|
|
|
|
lower_32_bits(ring->dma_base));
|
|
|
|
bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
|
|
|
|
upper_32_bits(ring->dma_base));
|
|
|
|
+ if (ring->unaligned)
|
|
|
|
+ bgmac_dma_rx_enable(bgmac, ring);
|
|
|
|
|
2013-11-03 19:24:39 +00:00
|
|
|
- for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots;
|
|
|
|
- j++, dma_desc++) {
|
|
|
|
- ctl0 = ctl1 = 0;
|
|
|
|
-
|
|
|
|
- if (j == ring->num_slots - 1)
|
|
|
|
- ctl0 |= BGMAC_DESC_CTL0_EOT;
|
|
|
|
- ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
|
|
|
|
- /* Is there any BGMAC device that requires extension? */
|
|
|
|
- /* ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) &
|
|
|
|
- * B43_DMA64_DCTL1_ADDREXT_MASK;
|
|
|
|
- */
|
|
|
|
-
|
|
|
|
- dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[j].dma_addr));
|
|
|
|
- dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[j].dma_addr));
|
|
|
|
- dma_desc->ctl0 = cpu_to_le32(ctl0);
|
|
|
|
- dma_desc->ctl1 = cpu_to_le32(ctl1);
|
|
|
|
- }
|
|
|
|
+ for (j = 0; j < ring->num_slots; j++)
|
|
|
|
+ bgmac_dma_rx_setup_desc(bgmac, ring, j);
|
2013-09-16 19:46:34 +00:00
|
|
|
|
|
|
|
bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX,
|
|
|
|
+ ring->index_base +
|
|
|
|
ring->num_slots * sizeof(struct bgmac_dma_desc));
|
|
|
|
|
|
|
|
ring->start = 0;
|
2013-11-03 19:24:39 +00:00
|
|
|
@@ -909,9 +958,9 @@ static void bgmac_chip_reset(struct bgma
|
2013-10-02 22:24:01 +00:00
|
|
|
u8 et_swtype = 0;
|
|
|
|
u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
|
2013-10-13 19:28:29 +00:00
|
|
|
BGMAC_CHIPCTL_1_IF_TYPE_MII;
|
2013-10-02 22:24:01 +00:00
|
|
|
- char buf[2];
|
|
|
|
+ char buf[4];
|
|
|
|
|
|
|
|
- if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) {
|
|
|
|
+ if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
|
|
|
|
if (kstrtou8(buf, 0, &et_swtype))
|
|
|
|
bgmac_err(bgmac, "Failed to parse et_swtype (%s)\n",
|
|
|
|
buf);
|
2013-11-03 19:24:39 +00:00
|
|
|
@@ -970,6 +1019,8 @@ static void bgmac_chip_reset(struct bgma
|
2013-10-02 22:24:01 +00:00
|
|
|
bgmac_miiconfig(bgmac);
|
|
|
|
bgmac_phy_init(bgmac);
|
|
|
|
|
|
|
|
+ netdev_reset_queue(bgmac->net_dev);
|
|
|
|
+
|
|
|
|
bgmac->int_status = 0;
|
|
|
|
}
|
|
|
|
|
2013-09-16 19:46:34 +00:00
|
|
|
--- a/drivers/net/ethernet/broadcom/bgmac.h
|
|
|
|
+++ b/drivers/net/ethernet/broadcom/bgmac.h
|
|
|
|
@@ -384,6 +384,8 @@ struct bgmac_dma_ring {
|
|
|
|
u16 mmio_base;
|
|
|
|
struct bgmac_dma_desc *cpu_base;
|
|
|
|
dma_addr_t dma_base;
|
|
|
|
+ u32 index_base; /* Used for unaligned rings only, otherwise 0 */
|
|
|
|
+ bool unaligned;
|
|
|
|
|
|
|
|
struct bgmac_slot_info slots[BGMAC_RX_RING_SLOTS];
|
|
|
|
};
|