52 lines
1.9 KiB
Diff
52 lines
1.9 KiB
Diff
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From 71198859668501ef57450be07da77e9544f59f1e Mon Sep 17 00:00:00 2001
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From: Sean Wang <sean.wang@mediatek.com>
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Date: Sat, 13 May 2017 15:16:58 +0800
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Subject: [PATCH 204/224] dt-bindings: dmaengine: Add MediaTek High-Speed DMA
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controller bindings
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Document the devicetree bindings for MediaTek High-Speed DMA controller
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which could be found on MT7623 SoC or other similar Mediatek SoCs.
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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---
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.../devicetree/bindings/dma/mtk-hsdma.txt | 33 ++++++++++++++++++++++
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1 file changed, 33 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/dma/mtk-hsdma.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/dma/mtk-hsdma.txt
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@@ -0,0 +1,33 @@
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+MediaTek High-Speed DMA Controller
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+==================================
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+
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+This device follows the generic DMA bindings defined in dma/dma.txt.
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+
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+Required properties:
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+
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+- compatible: Must be one of
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+ "mediatek,mt7622-hsdma": for MT7622 SoC
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+ "mediatek,mt7623-hsdma": for MT7623 SoC
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+- reg: Should contain the register's base address and length.
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+- interrupts: Should contain a reference to the interrupt used by this
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+ device.
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+- clocks: Should be the clock specifiers corresponding to the entry in
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+ clock-names property.
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+- clock-names: Should contain "hsdma" entries.
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+- power-domains: Phandle to the power domain that the device is part of
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+- #dma-cells: The length of the DMA specifier, must be <1>. This one cell
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+ in dmas property of a client device represents the channel
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+ number.
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+Example:
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+
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+ hsdma: dma-controller@1b007000 {
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+ compatible = "mediatek,mt7623-hsdma";
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+ reg = <0 0x1b007000 0 0x1000>;
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+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <ðsys CLK_ETHSYS_HSDMA>;
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+ clock-names = "hsdma";
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+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
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+ #dma-cells = <1>;
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+ };
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+
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+DMA clients must use the format described in dma/dma.txt file.
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