94 lines
2 KiB
C
94 lines
2 KiB
C
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/*
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* Copyright (C) ADMtek Incorporated.
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* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
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*/
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#include <linux/autoconf.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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extern struct pci_ops adm5120_pci_ops;
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#define ADM5120_CODE 0x12000000
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#define ADM5120_CODE_PQFP 0x20000000
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#define PCI_CMM_IOACC_EN 0x1
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#define PCI_CMM_MEMACC_EN 0x2
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#define PCI_CMM_MASTER_EN 0x4
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#define PCI_CMM_DEF \
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(PCI_CMM_IOACC_EN | PCI_CMM_MEMACC_EN | PCI_CMM_MASTER_EN)
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#define PCI_DEF_CACHE_LINE_SZ 4
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struct resource pci_io_resource = {
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"PCI IO space",
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0x11500000,
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0x115ffff0-1,
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IORESOURCE_IO
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};
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struct resource pci_mem_resource = {
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"PCI memory space",
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0x11400000,
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0x11500000,
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IORESOURCE_MEM
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};
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static struct pci_controller adm5120_controller = {
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.pci_ops = &adm5120_pci_ops,
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.io_resource = &pci_io_resource,
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.mem_resource = &pci_mem_resource,
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};
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int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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if (slot < 2 || slot > 4)
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return -1;
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return slot + 4;
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}
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static void adm5120_pci_fixup(struct pci_dev *dev)
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{
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if (dev->devfn == 0) {
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pci_write_config_word(dev, PCI_COMMAND, PCI_CMM_DEF);
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pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
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PCI_DEF_CACHE_LINE_SZ);
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pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
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pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, adm5120_pci_fixup);
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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static int __init adm5120_pci_setup(void)
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{
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if ((*(volatile u32 *)(KSEG1ADDR(ADM5120_CODE))) & ADM5120_CODE_PQFP) {
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printk("System has no PCI BIOS\n");
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return 1;
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}
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printk("System has PCI BIOS\n");
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/* Avoid ISA compat ranges. */
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PCIBIOS_MIN_IO = 0x00000000;
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PCIBIOS_MIN_MEM = 0x00000000;
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/* Set I/O resource limits. */
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ioport_resource.end = 0x1fffffff;
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iomem_resource.end = 0xffffffff;
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register_pci_controller(&adm5120_controller);
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return 0;
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}
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subsys_initcall(adm5120_pci_setup);
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