2018-05-07 10:07:32 +00:00
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From 9c37953bd08daa3ca227098d763e980d1898add3 Mon Sep 17 00:00:00 2001
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From: Sean Wang <sean.wang@mediatek.com>
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Date: Wed, 18 Oct 2017 16:28:43 +0800
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Subject: [PATCH 117/224] soc: mediatek: pwrap: add pwrap_read32 for reading in
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32-bit mode
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Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
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So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
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and one function pointer is introduced for increasing flexibility allowing
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the determination which mode is used by the pwrap slave detection through
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device tree.
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Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
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Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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drivers/soc/mediatek/mtk-pmic-wrap.c | 55 +++++++++++++++++++++++++++++++++++-
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1 file changed, 54 insertions(+), 1 deletion(-)
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--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
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+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
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@@ -487,6 +487,7 @@ static int mt8135_regs[] = {
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enum pmic_type {
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PMIC_MT6323,
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+ PMIC_MT6380,
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PMIC_MT6397,
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};
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@@ -496,9 +497,16 @@ enum pwrap_type {
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PWRAP_MT8173,
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};
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+struct pmic_wrapper;
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struct pwrap_slv_type {
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const u32 *dew_regs;
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enum pmic_type type;
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+ /*
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+ * pwrap operations are highly associated with the PMIC types,
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+ * so the pointers added increases flexibility allowing determination
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+ * which type is used by the detection through device tree.
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+ */
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+ int (*pwrap_read)(struct pmic_wrapper *wrp, u32 adr, u32 *rdata);
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};
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struct pmic_wrapper {
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2018-05-28 21:10:44 +00:00
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@@ -609,7 +617,7 @@ static int pwrap_write(struct pmic_wrapp
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2018-05-07 10:07:32 +00:00
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return 0;
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}
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-static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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+static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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{
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int ret;
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2018-05-28 21:10:44 +00:00
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@@ -632,6 +640,39 @@ static int pwrap_read(struct pmic_wrappe
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2018-05-07 10:07:32 +00:00
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return 0;
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}
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+static int pwrap_read32(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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+{
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+ int ret, msb;
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+
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+ *rdata = 0;
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+ for (msb = 0; msb < 2; msb++) {
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+ ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
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+ if (ret) {
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+ pwrap_leave_fsm_vldclr(wrp);
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+ return ret;
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+ }
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+
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+ pwrap_writel(wrp, ((msb << 30) | (adr << 16)),
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+ PWRAP_WACS2_CMD);
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+
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+ ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
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+ if (ret)
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+ return ret;
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+
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+ *rdata += (PWRAP_GET_WACS_RDATA(pwrap_readl(wrp,
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+ PWRAP_WACS2_RDATA)) << (16 * msb));
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+
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+ pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
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+ }
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+
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+ return 0;
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+}
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+
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+static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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+{
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+ return wrp->slave->pwrap_read(wrp, adr, rdata);
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+}
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+
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static int pwrap_regmap_read(void *context, u32 adr, u32 *rdata)
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{
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return pwrap_read(context, adr, rdata);
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2018-05-28 21:10:44 +00:00
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@@ -752,6 +793,8 @@ static int pwrap_mt2701_init_reg_clock(s
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2018-05-07 10:07:32 +00:00
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pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
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pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
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break;
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+ default:
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+ break;
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}
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return 0;
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2018-05-28 21:10:44 +00:00
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@@ -815,6 +858,8 @@ static int pwrap_init_cipher(struct pmic
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2018-05-07 10:07:32 +00:00
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pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_EN],
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0x1);
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break;
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+ default:
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+ break;
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}
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/* wait for cipher data ready@AP */
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2018-05-28 21:10:44 +00:00
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@@ -1036,11 +1081,19 @@ static const struct regmap_config pwrap_
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2018-05-07 10:07:32 +00:00
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static const struct pwrap_slv_type pmic_mt6323 = {
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.dew_regs = mt6323_regs,
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.type = PMIC_MT6323,
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+ .pwrap_read = pwrap_read16,
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+};
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+
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+static const struct pwrap_slv_type pmic_mt6380 = {
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+ .dew_regs = NULL,
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+ .type = PMIC_MT6380,
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+ .pwrap_read = pwrap_read32,
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};
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static const struct pwrap_slv_type pmic_mt6397 = {
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.dew_regs = mt6397_regs,
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.type = PMIC_MT6397,
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+ .pwrap_read = pwrap_read16,
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};
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static const struct of_device_id of_slave_match_tbl[] = {
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