33 lines
1.3 KiB
Diff
33 lines
1.3 KiB
Diff
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From 66350cdbb13029d143f99c97b0953805afe2f175 Mon Sep 17 00:00:00 2001
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From: Eric Anholt <eric@anholt.net>
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Date: Wed, 13 Apr 2016 13:05:03 -0700
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Subject: [PATCH 267/304] clk: bcm2835: Fix PLL poweron
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In poweroff, we set the reset bit and the power down bit, but only
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managed to unset the reset bit for poweron. This meant that if HDMI
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did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
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PLLH (that had been on at boot time) and never recover.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: stable@vger.kernel.org
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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(cherry picked from commit d794a7b18350b7538e64248adf639f2cb8da5fb7)
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---
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drivers/clk/bcm/clk-bcm2835.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -557,6 +557,10 @@ static int bcm2835_pll_on(struct clk_hw
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const struct bcm2835_pll_data *data = pll->data;
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ktime_t timeout;
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) &
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+ ~A2W_PLL_CTRL_PWRDN);
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+
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/* Take the PLL out of reset. */
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);
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