2011-12-05 14:52:25 +00:00
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/*
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* LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
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*
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <stddef.h>
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#include "config.h"
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2012-08-02 09:54:41 +00:00
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#include "ar71xx_regs.h"
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2011-12-05 14:52:25 +00:00
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#define READREG(r) *(volatile unsigned int *)(r)
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#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
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2012-08-02 09:54:41 +00:00
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#define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
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2011-12-05 14:52:25 +00:00
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#define UART_BASE 0xb8020000
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#define UART_TX 0
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#define UART_LSR 5
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#define UART_LSR_THRE 0x20
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#define UART_READ(r) READREG(UART_BASE + 4 * (r))
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#define UART_WRITE(r,v) WRITEREG(UART_BASE + 4 * (r), (v))
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void board_putc(int ch)
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{
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while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
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UART_WRITE(UART_TX, ch);
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while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
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}
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2012-08-02 09:54:41 +00:00
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#ifdef CONFIG_BOARD_TL_WR1043ND_V1
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static void tlwr1043nd_init(void)
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{
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unsigned int reg = KSEG1ADDR(AR71XX_RESET_BASE);
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unsigned int t;
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t = READREG(reg + AR913X_RESET_REG_RESET_MODULE);
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t |= AR71XX_RESET_GE0_PHY;
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WRITEREG(reg + AR913X_RESET_REG_RESET_MODULE, t);
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/* flush write */
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t = READREG(reg + AR913X_RESET_REG_RESET_MODULE);
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}
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#else
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static inline void tlwr1043nd_init(void) {}
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#endif
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2011-12-05 14:52:25 +00:00
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void board_init(void)
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{
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2012-08-02 09:54:41 +00:00
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tlwr1043nd_init();
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2011-12-05 14:52:25 +00:00
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}
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