2015-01-16 12:48:27 +00:00
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From 21400f252a97755579b43a4dc95dd02cd7f0ca75 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Wed, 3 Sep 2014 22:59:45 +0200
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Subject: [PATCH 155/158] MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx
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polling it
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This makes NVRAM code less bcm47xx/ssb specific allowing it to become a
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standalone driver in the future. A similar patch for bcma will follow
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when it's ready.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/7612/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm47xx/nvram.c | 30 +++++++---------------
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arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h | 1 +
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drivers/ssb/driver_mipscore.c | 14 +++++++++-
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3 files changed, 23 insertions(+), 22 deletions(-)
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--- a/arch/mips/bcm47xx/nvram.c
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+++ b/arch/mips/bcm47xx/nvram.c
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@@ -98,7 +98,14 @@ found:
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return 0;
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}
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-static int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
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+/*
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+ * On bcm47xx we need access to the NVRAM very early, so we can't use mtd
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+ * subsystem to access flash. We can't even use platform device / driver to
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+ * store memory offset.
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+ * To handle this we provide following symbol. It's supposed to be called as
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+ * soon as we get info about flash device, before any NVRAM entry is needed.
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+ */
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+int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
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{
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void __iomem *iobase;
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int err;
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2015-05-21 19:32:46 +00:00
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@@ -114,25 +121,6 @@ static int bcm47xx_nvram_init_from_mem(u
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2015-01-16 12:48:27 +00:00
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return err;
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}
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-#ifdef CONFIG_BCM47XX_SSB
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-static int nvram_init_ssb(void)
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-{
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- struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
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- u32 base;
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- u32 lim;
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-
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- if (mcore->pflash.present) {
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- base = mcore->pflash.window;
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- lim = mcore->pflash.window_size;
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- } else {
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- pr_err("Couldn't find supported flash memory\n");
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- return -ENXIO;
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- }
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-
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- return bcm47xx_nvram_init_from_mem(base, lim);
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-}
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-#endif
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-
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#ifdef CONFIG_BCM47XX_BCMA
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static int nvram_init_bcma(void)
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{
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@@ -168,7 +156,7 @@ static int nvram_init(void)
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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- return nvram_init_ssb();
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+ break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
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+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
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@@ -32,6 +32,7 @@ struct nvram_header {
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#define NVRAM_MAX_VALUE_LEN 255
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#define NVRAM_MAX_PARAM_LEN 64
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+int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
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extern int bcm47xx_nvram_getenv(char *name, char *val, size_t val_len);
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static inline void bcm47xx_nvram_parse_macaddr(char *buf, u8 macaddr[6])
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--- a/drivers/ssb/driver_mipscore.c
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+++ b/drivers/ssb/driver_mipscore.c
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@@ -15,6 +15,9 @@
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/time.h>
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+#ifdef CONFIG_BCM47XX
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+#include <bcm47xx_nvram.h>
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+#endif
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#include "ssb_private.h"
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2015-05-21 19:32:46 +00:00
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@@ -210,6 +213,7 @@ static void ssb_mips_serial_init(struct
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2015-01-16 12:48:27 +00:00
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static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
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{
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struct ssb_bus *bus = mcore->dev->bus;
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+ struct ssb_sflash *sflash = &mcore->sflash;
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struct ssb_pflash *pflash = &mcore->pflash;
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/* When there is no chipcommon on the bus there is 4MB flash */
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2015-05-21 19:32:46 +00:00
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@@ -242,7 +246,15 @@ static void ssb_mips_flash_detect(struct
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2015-01-16 12:48:27 +00:00
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}
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ssb_pflash:
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- if (pflash->present) {
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+ if (sflash->present) {
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+#ifdef CONFIG_BCM47XX
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+ bcm47xx_nvram_init_from_mem(sflash->window, sflash->size);
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+#endif
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+ } else if (pflash->present) {
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+#ifdef CONFIG_BCM47XX
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+ bcm47xx_nvram_init_from_mem(pflash->window, pflash->window_size);
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+#endif
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+
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ssb_pflash_data.width = pflash->buswidth;
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ssb_pflash_resource.start = pflash->window;
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ssb_pflash_resource.end = pflash->window + pflash->window_size;
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