89 lines
2.7 KiB
ArmAsm
89 lines
2.7 KiB
ArmAsm
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/* # 1 "libgcc1.S" */
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@ libgcc1 routines for ARM cpu.
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@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
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/* # 145 "libgcc1.S" */
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dividend .req r0
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divisor .req r1
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overdone .req r2
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curbit .req r3
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/* ip .req r12 */
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/* sp .req r13 */
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/* lr .req r14 */
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/* pc .req r15 */
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.text
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.globl __umodsi3
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.type __umodsi3 ,function
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.align 0
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__umodsi3 :
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cmp divisor, #0
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beq Ldiv0
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mov curbit, #1
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cmp dividend, divisor
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movcc pc, lr
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Loop1:
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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bcc Loop1
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Lbignum:
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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bcc Lbignum
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Loop3:
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@ Test for possible subtractions. On the final pass, this may
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@ subtract too much from the dividend, so keep track of which
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@ subtractions are done, we can fix them up afterwards...
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mov overdone, #0
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cmp dividend, divisor
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subcs dividend, dividend, divisor
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs overdone, overdone, curbit, ror #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs overdone, overdone, curbit, ror #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs overdone, overdone, curbit, ror #3
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mov ip, curbit
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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bne Loop3
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@ Any subtractions that we should not have done will be recorded in
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@ the top three bits of "overdone". Exactly which were not needed
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@ are governed by the position of the bit, stored in ip.
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@ If we terminated early, because dividend became zero,
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@ then none of the below will match, since the bit in ip will not be
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@ in the bottom nibble.
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ands overdone, overdone, #0xe0000000
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moveq pc, lr @ No fixups needed
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tst overdone, ip, ror #3
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addne dividend, dividend, divisor, lsr #3
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tst overdone, ip, ror #2
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addne dividend, dividend, divisor, lsr #2
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tst overdone, ip, ror #1
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addne dividend, dividend, divisor, lsr #1
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mov pc, lr
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Ldiv0:
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str lr, [sp, #-4]!
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bl __div0 (PLT)
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mov r0, #0 @ about as wrong as it could be
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ldmia sp!, {pc}
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.size __umodsi3 , . - __umodsi3
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/* # 320 "libgcc1.S" */
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/* # 421 "libgcc1.S" */
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/* # 433 "libgcc1.S" */
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/* # 456 "libgcc1.S" */
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/* # 500 "libgcc1.S" */
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/* # 580 "libgcc1.S" */
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