2016-09-23 23:14:53 +00:00
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From d45bc58dd3bdcaabc1d7d8d9b0b8dee826635cc6 Mon Sep 17 00:00:00 2001
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From: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
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Date: Wed, 27 Jul 2016 11:23:52 +0200
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Subject: [PATCH] mtd: nand: import nand_hw_control_init()
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The code to initialize a struct nand_hw_control is duplicated across
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several drivers. Factorize it using an inline function.
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Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
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Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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---
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drivers/mtd/nand/bf5xx_nand.c | 3 +--
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drivers/mtd/nand/brcmnand/brcmnand.c | 3 +--
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drivers/mtd/nand/docg4.c | 3 +--
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drivers/mtd/nand/fsl_elbc_nand.c | 3 +--
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drivers/mtd/nand/fsl_ifc_nand.c | 3 +--
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drivers/mtd/nand/jz4780_nand.c | 3 +--
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drivers/mtd/nand/nand_base.c | 3 +--
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drivers/mtd/nand/ndfc.c | 3 +--
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drivers/mtd/nand/pxa3xx_nand.c | 3 +--
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drivers/mtd/nand/qcom_nandc.c | 3 +--
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drivers/mtd/nand/s3c2410.c | 3 +--
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drivers/mtd/nand/sunxi_nand.c | 3 +--
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drivers/mtd/nand/txx9ndfmc.c | 3 +--
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include/linux/mtd/nand.h | 7 +++++++
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14 files changed, 20 insertions(+), 26 deletions(-)
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--- a/drivers/mtd/nand/bf5xx_nand.c
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+++ b/drivers/mtd/nand/bf5xx_nand.c
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2016-12-20 08:19:08 +00:00
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@@ -748,8 +748,7 @@ static int bf5xx_nand_probe(struct platf
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2016-09-23 23:14:53 +00:00
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platform_set_drvdata(pdev, info);
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- spin_lock_init(&info->controller.lock);
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- init_waitqueue_head(&info->controller.wq);
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+ nand_hw_control_init(&info->controller);
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info->device = &pdev->dev;
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info->platform = plat;
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--- a/drivers/mtd/nand/brcmnand/brcmnand.c
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+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
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2016-12-20 08:19:08 +00:00
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@@ -2156,8 +2156,7 @@ int brcmnand_probe(struct platform_devic
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2016-09-23 23:14:53 +00:00
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init_completion(&ctrl->done);
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init_completion(&ctrl->dma_done);
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- spin_lock_init(&ctrl->controller.lock);
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- init_waitqueue_head(&ctrl->controller.wq);
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+ nand_hw_control_init(&ctrl->controller);
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INIT_LIST_HEAD(&ctrl->host_list);
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/* NAND register range */
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--- a/drivers/mtd/nand/docg4.c
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+++ b/drivers/mtd/nand/docg4.c
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2016-12-20 08:19:08 +00:00
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@@ -1227,8 +1227,7 @@ static void __init init_mtd_structs(stru
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2016-09-23 23:14:53 +00:00
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nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
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nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
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nand->controller = &nand->hwcontrol;
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- spin_lock_init(&nand->controller->lock);
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- init_waitqueue_head(&nand->controller->wq);
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+ nand_hw_control_init(nand->controller);
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/* methods */
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nand->cmdfunc = docg4_command;
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--- a/drivers/mtd/nand/fsl_elbc_nand.c
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+++ b/drivers/mtd/nand/fsl_elbc_nand.c
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2016-12-20 08:19:08 +00:00
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@@ -866,8 +866,7 @@ static int fsl_elbc_nand_probe(struct pl
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2016-09-23 23:14:53 +00:00
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}
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elbc_fcm_ctrl->counter++;
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- spin_lock_init(&elbc_fcm_ctrl->controller.lock);
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- init_waitqueue_head(&elbc_fcm_ctrl->controller.wq);
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+ nand_hw_control_init(&elbc_fcm_ctrl->controller);
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fsl_lbc_ctrl_dev->nand = elbc_fcm_ctrl;
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} else {
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elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand;
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--- a/drivers/mtd/nand/fsl_ifc_nand.c
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+++ b/drivers/mtd/nand/fsl_ifc_nand.c
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2016-12-20 08:19:08 +00:00
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@@ -1073,8 +1073,7 @@ static int fsl_ifc_nand_probe(struct pla
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2016-09-23 23:14:53 +00:00
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ifc_nand_ctrl->addr = NULL;
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fsl_ifc_ctrl_dev->nand = ifc_nand_ctrl;
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- spin_lock_init(&ifc_nand_ctrl->controller.lock);
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- init_waitqueue_head(&ifc_nand_ctrl->controller.wq);
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+ nand_hw_control_init(&ifc_nand_ctrl->controller);
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} else {
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ifc_nand_ctrl = fsl_ifc_ctrl_dev->nand;
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}
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--- a/drivers/mtd/nand/nand_base.c
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+++ b/drivers/mtd/nand/nand_base.c
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2016-12-20 08:19:08 +00:00
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@@ -3202,8 +3202,7 @@ static void nand_set_defaults(struct nan
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2016-09-23 23:14:53 +00:00
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if (!chip->controller) {
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chip->controller = &chip->hwcontrol;
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- spin_lock_init(&chip->controller->lock);
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- init_waitqueue_head(&chip->controller->wq);
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+ nand_hw_control_init(chip->controller);
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}
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}
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--- a/drivers/mtd/nand/ndfc.c
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+++ b/drivers/mtd/nand/ndfc.c
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2016-12-20 08:19:08 +00:00
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@@ -220,8 +220,7 @@ static int ndfc_probe(struct platform_de
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2016-09-23 23:14:53 +00:00
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ndfc = &ndfc_ctrl[cs];
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ndfc->chip_select = cs;
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- spin_lock_init(&ndfc->ndfc_control.lock);
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- init_waitqueue_head(&ndfc->ndfc_control.wq);
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+ nand_hw_control_init(&ndfc->ndfc_control);
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ndfc->ofdev = ofdev;
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dev_set_drvdata(&ofdev->dev, ndfc);
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--- a/drivers/mtd/nand/pxa3xx_nand.c
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+++ b/drivers/mtd/nand/pxa3xx_nand.c
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2016-12-20 08:19:08 +00:00
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@@ -1739,8 +1739,7 @@ static int alloc_nand_resource(struct pl
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2016-09-23 23:14:53 +00:00
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chip->cmdfunc = nand_cmdfunc;
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}
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- spin_lock_init(&chip->controller->lock);
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- init_waitqueue_head(&chip->controller->wq);
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+ nand_hw_control_init(chip->controller);
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info->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(info->clk)) {
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dev_err(&pdev->dev, "failed to get nand clock\n");
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--- a/drivers/mtd/nand/s3c2410.c
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+++ b/drivers/mtd/nand/s3c2410.c
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2016-12-20 08:19:08 +00:00
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@@ -955,8 +955,7 @@ static int s3c24xx_nand_probe(struct pla
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2016-09-23 23:14:53 +00:00
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platform_set_drvdata(pdev, info);
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- spin_lock_init(&info->controller.lock);
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- init_waitqueue_head(&info->controller.wq);
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+ nand_hw_control_init(&info->controller);
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/* get the clock source and enable it */
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--- a/drivers/mtd/nand/sunxi_nand.c
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+++ b/drivers/mtd/nand/sunxi_nand.c
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2016-12-20 08:19:08 +00:00
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@@ -1426,8 +1426,7 @@ static int sunxi_nfc_probe(struct platfo
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2016-09-23 23:14:53 +00:00
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return -ENOMEM;
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nfc->dev = dev;
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- spin_lock_init(&nfc->controller.lock);
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- init_waitqueue_head(&nfc->controller.wq);
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+ nand_hw_control_init(&nfc->controller);
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INIT_LIST_HEAD(&nfc->chips);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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--- a/drivers/mtd/nand/txx9ndfmc.c
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+++ b/drivers/mtd/nand/txx9ndfmc.c
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2016-12-20 08:19:08 +00:00
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@@ -304,8 +304,7 @@ static int __init txx9ndfmc_probe(struct
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2016-09-23 23:14:53 +00:00
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dev_info(&dev->dev, "CLK:%ldMHz HOLD:%d SPW:%d\n",
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(gbusclk + 500000) / 1000000, hold, spw);
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- spin_lock_init(&drvdata->hw_control.lock);
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- init_waitqueue_head(&drvdata->hw_control.wq);
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+ nand_hw_control_init(&drvdata->hw_control);
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platform_set_drvdata(dev, drvdata);
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txx9ndfmc_initialize(dev);
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--- a/include/linux/mtd/nand.h
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+++ b/include/linux/mtd/nand.h
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2016-12-20 08:19:08 +00:00
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@@ -461,6 +461,13 @@ struct nand_hw_control {
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2016-09-23 23:14:53 +00:00
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wait_queue_head_t wq;
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};
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+static inline void nand_hw_control_init(struct nand_hw_control *nfc)
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+{
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+ nfc->active = NULL;
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+ spin_lock_init(&nfc->lock);
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+ init_waitqueue_head(&nfc->wq);
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+}
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+
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/**
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* struct nand_ecc_ctrl - Control structure for ECC
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* @mode: ECC mode
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