2016-09-10 12:54:26 +00:00
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From 1624a40cc0b7760e60b842b15fe46859940a9f48 Mon Sep 17 00:00:00 2001
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2016-04-24 11:03:39 +00:00
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From: Varad Gautam <varadgautam@gmail.com>
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Date: Wed, 17 Feb 2016 19:08:21 +0530
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2016-09-10 12:54:26 +00:00
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Subject: [PATCH] drm/vc4: improve throughput by pipelining binning and
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2016-04-24 11:03:39 +00:00
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rendering jobs
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The hardware provides us with separate threads for binning and
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rendering, and the existing model waits for them both to complete
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before submitting the next job.
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Splitting the binning and rendering submissions reduces idle time and
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gives us approx 20-30% speedup with some x11perf tests such as -line10
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and -tilerect1. Improves openarena performance by 1.01897% +/-
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0.247857% (n=16).
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Thanks to anholt for suggesting this.
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v2: Rebase on the spurious resets fix (change by anholt).
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Signed-off-by: Varad Gautam <varadgautam@gmail.com>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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(cherry picked from commit ca26d28bbaa39f31d5e7e4812603b015c8d54207)
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 37 +++++++++----
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drivers/gpu/drm/vc4/vc4_gem.c | 123 ++++++++++++++++++++++++++++++------------
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drivers/gpu/drm/vc4/vc4_irq.c | 58 ++++++++++++++++----
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3 files changed, 166 insertions(+), 52 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -53,7 +53,7 @@ struct vc4_dev {
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/* Protects bo_cache and the BO stats. */
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struct mutex bo_lock;
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- /* Sequence number for the last job queued in job_list.
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+ /* Sequence number for the last job queued in bin_job_list.
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* Starts at 0 (no jobs emitted).
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*/
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uint64_t emit_seqno;
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@@ -63,11 +63,19 @@ struct vc4_dev {
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*/
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uint64_t finished_seqno;
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- /* List of all struct vc4_exec_info for jobs to be executed.
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- * The first job in the list is the one currently programmed
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- * into ct0ca/ct1ca for execution.
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+ /* List of all struct vc4_exec_info for jobs to be executed in
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+ * the binner. The first job in the list is the one currently
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+ * programmed into ct0ca for execution.
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+ */
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+ struct list_head bin_job_list;
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+
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+ /* List of all struct vc4_exec_info for jobs that have
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+ * completed binning and are ready for rendering. The first
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+ * job in the list is the one currently programmed into ct1ca
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+ * for execution.
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*/
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- struct list_head job_list;
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+ struct list_head render_job_list;
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+
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/* List of the finished vc4_exec_infos waiting to be freed by
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* job_done_work.
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*/
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@@ -291,11 +299,20 @@ struct vc4_exec_info {
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};
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static inline struct vc4_exec_info *
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-vc4_first_job(struct vc4_dev *vc4)
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+vc4_first_bin_job(struct vc4_dev *vc4)
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+{
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+ if (list_empty(&vc4->bin_job_list))
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+ return NULL;
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+ return list_first_entry(&vc4->bin_job_list, struct vc4_exec_info, head);
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+}
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+
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+static inline struct vc4_exec_info *
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+vc4_first_render_job(struct vc4_dev *vc4)
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{
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- if (list_empty(&vc4->job_list))
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+ if (list_empty(&vc4->render_job_list))
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return NULL;
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- return list_first_entry(&vc4->job_list, struct vc4_exec_info, head);
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+ return list_first_entry(&vc4->render_job_list,
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+ struct vc4_exec_info, head);
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}
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/**
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@@ -410,7 +427,9 @@ int vc4_wait_seqno_ioctl(struct drm_devi
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struct drm_file *file_priv);
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int vc4_wait_bo_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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-void vc4_submit_next_job(struct drm_device *dev);
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+void vc4_submit_next_bin_job(struct drm_device *dev);
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+void vc4_submit_next_render_job(struct drm_device *dev);
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+void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec);
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int vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno,
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uint64_t timeout_ns, bool interruptible);
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void vc4_job_handle_completed(struct vc4_dev *vc4);
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--- a/drivers/gpu/drm/vc4/vc4_gem.c
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+++ b/drivers/gpu/drm/vc4/vc4_gem.c
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@@ -154,10 +154,10 @@ vc4_save_hang_state(struct drm_device *d
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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struct drm_vc4_get_hang_state *state;
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struct vc4_hang_state *kernel_state;
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- struct vc4_exec_info *exec;
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+ struct vc4_exec_info *exec[2];
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struct vc4_bo *bo;
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unsigned long irqflags;
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- unsigned int i, unref_list_count;
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+ unsigned int i, j, unref_list_count, prev_idx;
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kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL);
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if (!kernel_state)
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@@ -166,37 +166,55 @@ vc4_save_hang_state(struct drm_device *d
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state = &kernel_state->user_state;
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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- exec = vc4_first_job(vc4);
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- if (!exec) {
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+ exec[0] = vc4_first_bin_job(vc4);
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+ exec[1] = vc4_first_render_job(vc4);
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+ if (!exec[0] && !exec[1]) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return;
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}
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- unref_list_count = 0;
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- list_for_each_entry(bo, &exec->unref_list, unref_head)
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- unref_list_count++;
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-
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- state->bo_count = exec->bo_count + unref_list_count;
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- kernel_state->bo = kcalloc(state->bo_count, sizeof(*kernel_state->bo),
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- GFP_ATOMIC);
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+ /* Get the bos from both binner and renderer into hang state. */
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+ state->bo_count = 0;
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+ for (i = 0; i < 2; i++) {
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+ if (!exec[i])
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+ continue;
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+
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+ unref_list_count = 0;
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+ list_for_each_entry(bo, &exec[i]->unref_list, unref_head)
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+ unref_list_count++;
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+ state->bo_count += exec[i]->bo_count + unref_list_count;
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+ }
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+
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+ kernel_state->bo = kcalloc(state->bo_count,
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+ sizeof(*kernel_state->bo), GFP_ATOMIC);
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+
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if (!kernel_state->bo) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return;
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}
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- for (i = 0; i < exec->bo_count; i++) {
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- drm_gem_object_reference(&exec->bo[i]->base);
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- kernel_state->bo[i] = &exec->bo[i]->base;
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- }
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+ prev_idx = 0;
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+ for (i = 0; i < 2; i++) {
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+ if (!exec[i])
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+ continue;
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+
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+ for (j = 0; j < exec[i]->bo_count; j++) {
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+ drm_gem_object_reference(&exec[i]->bo[j]->base);
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+ kernel_state->bo[j + prev_idx] = &exec[i]->bo[j]->base;
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+ }
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- list_for_each_entry(bo, &exec->unref_list, unref_head) {
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- drm_gem_object_reference(&bo->base.base);
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- kernel_state->bo[i] = &bo->base.base;
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- i++;
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+ list_for_each_entry(bo, &exec[i]->unref_list, unref_head) {
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+ drm_gem_object_reference(&bo->base.base);
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+ kernel_state->bo[j + prev_idx] = &bo->base.base;
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+ j++;
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+ }
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+ prev_idx = j + 1;
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}
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- state->start_bin = exec->ct0ca;
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- state->start_render = exec->ct1ca;
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+ if (exec[0])
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+ state->start_bin = exec[0]->ct0ca;
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+ if (exec[1])
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+ state->start_render = exec[1]->ct1ca;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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@@ -272,13 +290,15 @@ vc4_hangcheck_elapsed(unsigned long data
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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uint32_t ct0ca, ct1ca;
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unsigned long irqflags;
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- struct vc4_exec_info *exec;
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+ struct vc4_exec_info *bin_exec, *render_exec;
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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- exec = vc4_first_job(vc4);
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+
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+ bin_exec = vc4_first_bin_job(vc4);
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+ render_exec = vc4_first_render_job(vc4);
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/* If idle, we can stop watching for hangs. */
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- if (!exec) {
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+ if (!bin_exec && !render_exec) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return;
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}
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@@ -289,9 +309,12 @@ vc4_hangcheck_elapsed(unsigned long data
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/* If we've made any progress in execution, rearm the timer
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* and wait.
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*/
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- if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {
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- exec->last_ct0ca = ct0ca;
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- exec->last_ct1ca = ct1ca;
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+ if ((bin_exec && ct0ca != bin_exec->last_ct0ca) ||
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+ (render_exec && ct1ca != render_exec->last_ct1ca)) {
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+ if (bin_exec)
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+ bin_exec->last_ct0ca = ct0ca;
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+ if (render_exec)
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+ render_exec->last_ct1ca = ct1ca;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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vc4_queue_hangcheck(dev);
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return;
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@@ -391,11 +414,13 @@ vc4_flush_caches(struct drm_device *dev)
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* The job_lock should be held during this.
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*/
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void
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-vc4_submit_next_job(struct drm_device *dev)
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+vc4_submit_next_bin_job(struct drm_device *dev)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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- struct vc4_exec_info *exec = vc4_first_job(vc4);
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+ struct vc4_exec_info *exec;
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+again:
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+ exec = vc4_first_bin_job(vc4);
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if (!exec)
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return;
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@@ -405,11 +430,40 @@ vc4_submit_next_job(struct drm_device *d
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V3D_WRITE(V3D_BPOA, 0);
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V3D_WRITE(V3D_BPOS, 0);
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- if (exec->ct0ca != exec->ct0ea)
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+ /* Either put the job in the binner if it uses the binner, or
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+ * immediately move it to the to-be-rendered queue.
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+ */
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+ if (exec->ct0ca != exec->ct0ea) {
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submit_cl(dev, 0, exec->ct0ca, exec->ct0ea);
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+ } else {
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+ vc4_move_job_to_render(dev, exec);
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+ goto again;
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+ }
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+}
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+
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+void
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+vc4_submit_next_render_job(struct drm_device *dev)
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+{
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ struct vc4_exec_info *exec = vc4_first_render_job(vc4);
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+
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+ if (!exec)
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+ return;
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+
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submit_cl(dev, 1, exec->ct1ca, exec->ct1ea);
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}
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+void
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+vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec)
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+{
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ bool was_empty = list_empty(&vc4->render_job_list);
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+
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+ list_move_tail(&exec->head, &vc4->render_job_list);
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+ if (was_empty)
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+ vc4_submit_next_render_job(dev);
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+}
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+
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static void
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vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t seqno)
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{
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@@ -448,14 +502,14 @@ vc4_queue_submit(struct drm_device *dev,
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exec->seqno = seqno;
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vc4_update_bo_seqnos(exec, seqno);
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- list_add_tail(&exec->head, &vc4->job_list);
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+ list_add_tail(&exec->head, &vc4->bin_job_list);
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/* If no job was executing, kick ours off. Otherwise, it'll
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- * get started when the previous job's frame done interrupt
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+ * get started when the previous job's flush done interrupt
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* occurs.
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*/
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- if (vc4_first_job(vc4) == exec) {
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- vc4_submit_next_job(dev);
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+ if (vc4_first_bin_job(vc4) == exec) {
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+ vc4_submit_next_bin_job(dev);
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vc4_queue_hangcheck(dev);
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}
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@@ -849,7 +903,8 @@ vc4_gem_init(struct drm_device *dev)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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- INIT_LIST_HEAD(&vc4->job_list);
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+ INIT_LIST_HEAD(&vc4->bin_job_list);
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+ INIT_LIST_HEAD(&vc4->render_job_list);
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INIT_LIST_HEAD(&vc4->job_done_list);
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INIT_LIST_HEAD(&vc4->seqno_cb_list);
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spin_lock_init(&vc4->job_lock);
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--- a/drivers/gpu/drm/vc4/vc4_irq.c
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+++ b/drivers/gpu/drm/vc4/vc4_irq.c
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@@ -30,6 +30,10 @@
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* disables that specific interrupt, and 0s written are ignored
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* (reading either one returns the set of enabled interrupts).
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*
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+ * When we take a binning flush done interrupt, we need to submit the
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+ * next frame for binning and move the finished frame to the render
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+ * thread.
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+ *
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* When we take a render frame interrupt, we need to wake the
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* processes waiting for some frame to be done, and get the next frame
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* submitted ASAP (so the hardware doesn't sit idle when there's work
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@@ -44,6 +48,7 @@
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#include "vc4_regs.h"
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#define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \
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+ V3D_INT_FLDONE | \
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V3D_INT_FRDONE)
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DECLARE_WAIT_QUEUE_HEAD(render_wait);
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@@ -77,7 +82,7 @@ vc4_overflow_mem_work(struct work_struct
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unsigned long irqflags;
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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- current_exec = vc4_first_job(vc4);
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+ current_exec = vc4_first_bin_job(vc4);
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if (current_exec) {
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vc4->overflow_mem->seqno = vc4->finished_seqno + 1;
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list_add_tail(&vc4->overflow_mem->unref_head,
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@@ -98,17 +103,43 @@ vc4_overflow_mem_work(struct work_struct
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}
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static void
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-vc4_irq_finish_job(struct drm_device *dev)
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+vc4_irq_finish_bin_job(struct drm_device *dev)
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+{
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
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+
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+ if (!exec)
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+ return;
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+
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+ vc4_move_job_to_render(dev, exec);
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+ vc4_submit_next_bin_job(dev);
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+}
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+
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+static void
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+vc4_cancel_bin_job(struct drm_device *dev)
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+{
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
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+
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+ if (!exec)
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+ return;
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+
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+ list_move_tail(&exec->head, &vc4->bin_job_list);
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+ vc4_submit_next_bin_job(dev);
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+}
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+
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+static void
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+vc4_irq_finish_render_job(struct drm_device *dev)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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- struct vc4_exec_info *exec = vc4_first_job(vc4);
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+ struct vc4_exec_info *exec = vc4_first_render_job(vc4);
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if (!exec)
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return;
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vc4->finished_seqno++;
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list_move_tail(&exec->head, &vc4->job_done_list);
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- vc4_submit_next_job(dev);
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+ vc4_submit_next_render_job(dev);
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wake_up_all(&vc4->job_wait_queue);
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schedule_work(&vc4->job_done_work);
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|
@@ -125,9 +156,10 @@ vc4_irq(int irq, void *arg)
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barrier();
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intctl = V3D_READ(V3D_INTCTL);
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- /* Acknowledge the interrupts we're handling here. The render
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- * frame done interrupt will be cleared, while OUTOMEM will
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|
- * stay high until the underlying cause is cleared.
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+ /* Acknowledge the interrupts we're handling here. The binner
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+ * last flush / render frame done interrupt will be cleared,
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|
+ * while OUTOMEM will stay high until the underlying cause is
|
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+ * cleared.
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|
|
*/
|
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|
|
V3D_WRITE(V3D_INTCTL, intctl);
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|
@@ -138,9 +170,16 @@ vc4_irq(int irq, void *arg)
|
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|
status = IRQ_HANDLED;
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|
|
|
}
|
|
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|
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|
|
+ if (intctl & V3D_INT_FLDONE) {
|
|
|
|
+ spin_lock(&vc4->job_lock);
|
|
|
|
+ vc4_irq_finish_bin_job(dev);
|
|
|
|
+ spin_unlock(&vc4->job_lock);
|
|
|
|
+ status = IRQ_HANDLED;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
if (intctl & V3D_INT_FRDONE) {
|
|
|
|
spin_lock(&vc4->job_lock);
|
|
|
|
- vc4_irq_finish_job(dev);
|
|
|
|
+ vc4_irq_finish_render_job(dev);
|
|
|
|
spin_unlock(&vc4->job_lock);
|
|
|
|
status = IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
@@ -205,6 +244,7 @@ void vc4_irq_reset(struct drm_device *de
|
|
|
|
V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&vc4->job_lock, irqflags);
|
|
|
|
- vc4_irq_finish_job(dev);
|
|
|
|
+ vc4_cancel_bin_job(dev);
|
|
|
|
+ vc4_irq_finish_render_job(dev);
|
|
|
|
spin_unlock_irqrestore(&vc4->job_lock, irqflags);
|
|
|
|
}
|