29 lines
1.3 KiB
Diff
29 lines
1.3 KiB
Diff
|
From 52bffb91d40a3090ecf9138fadca97f77c99afa4 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Haiying Wang <Haiying.Wang@freescale.com>
|
||
|
|
Date: Wed, 22 Apr 2015 13:09:47 -0400
|
||
|
|
Subject: [PATCH 34/70] arm64: add support to remap kernel cacheable memory to
|
||
|
|
userspace
|
||
|
|
|
||
|
|
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
|
||
|
|
Change-Id: I50ee4798a2929932fa9ff7c9cdb42cd1a215f77a
|
||
|
|
Reviewed-on: http://git.am.freescale.net:8181/35488
|
||
|
|
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
|
||
|
|
Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
|
||
|
|
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
|
||
|
|
---
|
||
|
|
arch/arm64/include/asm/pgtable.h | 3 +++
|
||
|
|
1 file changed, 3 insertions(+)
|
||
|
|
|
||
|
|
--- a/arch/arm64/include/asm/pgtable.h
|
||
|
|
+++ b/arch/arm64/include/asm/pgtable.h
|
||
|
|
@@ -389,6 +389,9 @@ static inline int has_transparent_hugepa
|
||
|
|
__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
|
||
|
|
#define pgprot_writecombine(prot) \
|
||
|
|
__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
|
||
|
|
+#define pgprot_cached(prot) \
|
||
|
|
+ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL) | \
|
||
|
|
+ PTE_PXN | PTE_UXN)
|
||
|
|
#define pgprot_device(prot) \
|
||
|
|
__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
|
||
|
|
#define __HAVE_PHYS_MEM_ACCESS_PROT
|