2013-04-03 09:59:46 +00:00
|
|
|
/ {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2013-11-30 08:36:47 +00:00
|
|
|
compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
|
2013-04-03 09:59:46 +00:00
|
|
|
|
|
|
|
cpus {
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|
|
|
cpu@0 {
|
|
|
|
compatible = "mips,mips24KEc";
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|
|
|
};
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|
|
|
};
|
|
|
|
|
|
|
|
chosen {
|
2013-04-07 11:46:54 +00:00
|
|
|
bootargs = "console=ttyS0,57600";
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
2015-11-22 11:49:13 +00:00
|
|
|
aliases {
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|
|
|
spi0 = &spi0;
|
2016-05-09 04:20:02 +00:00
|
|
|
serial0 = &uartlite;
|
2015-11-22 11:49:13 +00:00
|
|
|
};
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
cpuintc: cpuintc@0 {
|
|
|
|
#address-cells = <0>;
|
|
|
|
#interrupt-cells = <1>;
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|
|
|
interrupt-controller;
|
|
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
palmbus: palmbus@10000000 {
|
2013-04-03 09:59:46 +00:00
|
|
|
compatible = "palmbus";
|
|
|
|
reg = <0x10000000 0x200000>;
|
|
|
|
ranges = <0x0 0x10000000 0x1FFFFF>;
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|
|
|
|
|
|
|
#address-cells = <1>;
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|
|
|
#size-cells = <1>;
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|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
sysc: sysc@0 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-sysc";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0x0 0x100>;
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|
|
|
};
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|
|
|
|
2016-05-10 10:41:46 +00:00
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|
|
timer: timer@100 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
|
2013-04-03 09:59:46 +00:00
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|
|
reg = <0x100 0x20>;
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|
interrupt-parent = <&intc>;
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|
interrupts = <1>;
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|
|
};
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|
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|
|
2016-05-10 10:41:46 +00:00
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|
|
watchdog: watchdog@120 {
|
2013-08-14 19:08:44 +00:00
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|
|
compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
|
2013-04-03 09:59:46 +00:00
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|
reg = <0x120 0x10>;
|
2013-06-23 15:50:49 +00:00
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resets = <&rstctrl 8>;
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|
|
reset-names = "wdt";
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|
|
interrupt-parent = <&intc>;
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|
|
|
interrupts = <1>;
|
2013-04-03 09:59:46 +00:00
|
|
|
};
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|
|
|
|
|
|
|
intc: intc@200 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0x200 0x100>;
|
|
|
|
|
2013-06-23 15:50:49 +00:00
|
|
|
resets = <&rstctrl 19>;
|
|
|
|
reset-names = "intc";
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <1>;
|
|
|
|
|
|
|
|
interrupt-parent = <&cpuintc>;
|
|
|
|
interrupts = <2>;
|
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
memc: memc@300 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-memc";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0x300 0x100>;
|
2013-06-23 15:50:49 +00:00
|
|
|
|
|
|
|
resets = <&rstctrl 20>;
|
|
|
|
reset-names = "mc";
|
|
|
|
|
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <3>;
|
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
uart: uart@500 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
|
2013-06-23 15:50:49 +00:00
|
|
|
reg = <0x500 0x100>;
|
|
|
|
|
|
|
|
resets = <&rstctrl 12>;
|
|
|
|
reset-names = "uart";
|
|
|
|
|
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <5>;
|
|
|
|
|
|
|
|
reg-shift = <2>;
|
|
|
|
|
|
|
|
status = "disabled";
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
gpio0: gpio@600 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0x600 0x34>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
2013-05-06 16:45:04 +00:00
|
|
|
ralink,gpio-base = <0>;
|
2013-04-03 09:59:46 +00:00
|
|
|
ralink,num-gpios = <24>;
|
|
|
|
ralink,register-map = [ 00 04 08 0c
|
|
|
|
20 24 28 2c
|
|
|
|
30 34 ];
|
|
|
|
|
2013-06-23 15:50:49 +00:00
|
|
|
resets = <&rstctrl 13>;
|
|
|
|
reset-names = "pio";
|
|
|
|
|
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <6>;
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
gpio1: gpio@638 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0x638 0x24>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
2013-05-06 16:45:04 +00:00
|
|
|
ralink,gpio-base = <24>;
|
2013-04-03 09:59:46 +00:00
|
|
|
ralink,num-gpios = <16>;
|
|
|
|
ralink,register-map = [ 00 04 08 0c
|
|
|
|
10 14 18 1c
|
|
|
|
20 24 ];
|
|
|
|
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio2: gpio@660 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0x660 0x24>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
2013-05-06 16:45:04 +00:00
|
|
|
ralink,gpio-base = <40>;
|
2013-04-03 09:59:46 +00:00
|
|
|
ralink,num-gpios = <12>;
|
|
|
|
ralink,register-map = [ 00 04 08 0c
|
|
|
|
10 14 18 1c
|
|
|
|
20 24 ];
|
|
|
|
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
2015-11-22 11:49:13 +00:00
|
|
|
spi0: spi@b00 {
|
2013-04-03 09:59:46 +00:00
|
|
|
compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
|
|
|
|
reg = <0xb00 0x100>;
|
2013-10-30 07:06:22 +00:00
|
|
|
|
2013-06-23 15:50:49 +00:00
|
|
|
resets = <&rstctrl 18>;
|
|
|
|
reset-names = "spi";
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2013-09-17 21:45:44 +00:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&spi_pins>;
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
2016-05-09 04:20:02 +00:00
|
|
|
uartlite: uartlite@c00 {
|
2013-08-14 19:08:44 +00:00
|
|
|
compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
|
2013-04-03 09:59:46 +00:00
|
|
|
reg = <0xc00 0x100>;
|
2013-10-30 07:06:22 +00:00
|
|
|
|
2013-06-23 15:50:49 +00:00
|
|
|
resets = <&rstctrl 19>;
|
|
|
|
reset-names = "uartl";
|
2013-04-03 09:59:46 +00:00
|
|
|
|
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <12>;
|
|
|
|
|
|
|
|
reg-shift = <2>;
|
2013-09-17 21:45:44 +00:00
|
|
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uartlite_pins>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
pinctrl: pinctrl {
|
2013-09-17 21:45:44 +00:00
|
|
|
compatible = "ralink,rt2880-pinmux";
|
|
|
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&state_default>;
|
|
|
|
|
|
|
|
state_default: pinctrl0 {
|
|
|
|
sdram {
|
|
|
|
ralink,group = "sdram";
|
|
|
|
ralink,function = "sdram";
|
|
|
|
};
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
2013-09-17 21:45:44 +00:00
|
|
|
spi_pins: spi {
|
|
|
|
spi {
|
|
|
|
ralink,group = "spi";
|
|
|
|
ralink,function = "spi";
|
|
|
|
};
|
|
|
|
};
|
2015-08-17 05:57:18 +00:00
|
|
|
|
2013-09-17 21:45:44 +00:00
|
|
|
uartlite_pins: uartlite {
|
|
|
|
uart {
|
|
|
|
ralink,group = "uartlite";
|
|
|
|
ralink,function = "uartlite";
|
|
|
|
};
|
|
|
|
};
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
2013-06-23 15:50:49 +00:00
|
|
|
rstctrl: rstctrl {
|
|
|
|
compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
|
|
|
|
#reset-cells = <1>;
|
|
|
|
};
|
|
|
|
|
2016-05-10 13:23:54 +00:00
|
|
|
clkctrl: clkctrl {
|
|
|
|
compatible = "ralink,rt2880-clock";
|
|
|
|
#clock-cells = <1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
usbphy: usbphy {
|
|
|
|
compatible = "ralink,rt3050-usbphy";
|
|
|
|
resets = <&rstctrl 22>;
|
|
|
|
reset-names = "host";
|
|
|
|
clocks = <&clkctrl 18>;
|
|
|
|
clock-names = "host";
|
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
ethernet: ethernet@10100000 {
|
2013-04-03 09:59:46 +00:00
|
|
|
compatible = "ralink,rt3050-eth";
|
2016-05-09 06:23:12 +00:00
|
|
|
reg = <0x10100000 0x10000>;
|
2013-04-03 09:59:46 +00:00
|
|
|
|
2015-01-18 20:16:44 +00:00
|
|
|
resets = <&rstctrl 21>;
|
|
|
|
reset-names = "fe";
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
interrupt-parent = <&cpuintc>;
|
|
|
|
interrupts = <5>;
|
2015-12-17 09:25:57 +00:00
|
|
|
|
|
|
|
mediatek,switch = <&esw>;
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
2015-12-17 09:25:57 +00:00
|
|
|
esw: esw@10110000 {
|
2013-04-03 09:59:46 +00:00
|
|
|
compatible = "ralink,rt3050-esw";
|
2016-05-09 06:23:12 +00:00
|
|
|
reg = <0x10110000 0x8000>;
|
2013-04-03 09:59:46 +00:00
|
|
|
|
2015-01-18 20:16:44 +00:00
|
|
|
resets = <&rstctrl 23>;
|
|
|
|
reset-names = "esw";
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <17>;
|
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
wmac: wmac@10180000 {
|
2013-04-03 09:59:46 +00:00
|
|
|
compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
|
2016-05-09 06:23:12 +00:00
|
|
|
reg = <0x10180000 0x40000>;
|
2013-04-03 09:59:46 +00:00
|
|
|
|
|
|
|
interrupt-parent = <&cpuintc>;
|
|
|
|
interrupts = <6>;
|
|
|
|
|
2013-04-07 13:32:37 +00:00
|
|
|
ralink,eeprom = "soc_wmac.eeprom";
|
2013-04-03 09:59:46 +00:00
|
|
|
};
|
|
|
|
|
2016-05-10 10:41:46 +00:00
|
|
|
otg: otg@101c0000 {
|
2013-07-15 10:06:55 +00:00
|
|
|
compatible = "ralink,rt3050-otg", "snps,dwc2";
|
2016-05-09 06:23:12 +00:00
|
|
|
reg = <0x101c0000 0x40000>;
|
2013-04-03 09:59:46 +00:00
|
|
|
|
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <18>;
|
|
|
|
|
2013-07-15 21:05:42 +00:00
|
|
|
resets = <&rstctrl 22>;
|
|
|
|
reset-names = "otg";
|
|
|
|
|
2013-04-03 09:59:46 +00:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
};
|