openwrtv4/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts

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ipq40xx: add support for Compex WPJ428 * QCA IPQ4028 * 256 MB of RAM * 32 MB of SPI NOR flash (mx25l25635e) * 128 MB of SPI NAND flash (gd5f1gq4ucy1g) * 2T2R 2.4 GHz - QCA4019 hw1.0 (SoC) - uses AP-DK03 BDF from QCA4019/hw1.0/board-2.bin * 2T2R 5 GHz - QCA4019 hw1.0 (SoC) - uses AP-DK03 BDF from QCA4019/hw1.0/board-2.bin * 2 fully software controllable GPIO-LEDs * 2 additional GPIO-LEDs which also affect the SIM card detection * 1x button (reset) * 1x GPIO buzzer * 1x USB (xHCI) * 1x NGFF (USB-only with Dual-SIM support, untested) * TTL pins are on board (R124 is next to GND, then follows: RX, TX, VCC) * 2x gigabit ethernet - phy@mdio4: + Manual: Ethernet port 0 + gmac0 (ethaddr) in original firmware + 802.3af POE (HV version) + 24v passive POE (LV version) - phy@mdio3: + Manual: Ethernet port 1 + gmac1 (eth1addr) in original firmware * DC Jack connector + 24-56V (HV version) + 12-24V (LV version) The SPI NAND flash isn't supported at the moment. The bootloader has to be updated before OpenWrt is installed to fix a reboot problem. The nor-ipq40xx-single.img from https://downloads.compex.com.sg/?dir=uploads/QSDK/QCA-Reference/WPJ428/b170123-IPQ40xx-Reference-Firmware has to be downloaded and the transfered in u-boot via TFTP set ipaddr 192.168.1.11 set serverip 192.168.1.10 ping ${serverip} tftpboot 0x84000000 nor-ipq40xx-single.img imgaddr=0x84000000 && source $imgaddr:script The sysupgrade image can be installed directly on flash using u-boot: sf probe tftpboot 0x84000000 openwrt-ipq40xx-compex_wpj428-squashfs-sysupgrade.bin sf erase 0x00180000 +$filesize sf write 0x84000000 0x00180000 $filesize bootipq The initramfs image can be started using tftpboot 0x82000000 openwrt-ipq40xx-compex_wpj428-initramfs-fit-uImage.itb set fdt_high 0x83000000 bootm 0x82000000 The used SIM card slot can be changed using # slot 1 (also enables orange LED) echo 1 > /sys/class/gpio/gpio3/value # slot 2 echo 0 > /sys/class/gpio/gpio3/value It can be checked whether a SIM card is inserted in the current slot and the red LED is subsequently on via: echo 2 > /sys/class/gpio/export cat /sys/class/gpio/gpio2/value Signed-off-by: Sven Eckelmann <sven@narfation.org>
2018-03-02 10:56:53 +00:00
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
* Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include "qcom-ipq4019-bus.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Compex WPJ428";
compatible = "compex,wpj428", "qcom,ipq4019";
soc {
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
serial@78af000 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
switch_lan_bmp = <0x10>;
switch_wan_bmp = <0x20>;
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
aliases {
led-boot = &status;
led-failsafe = &status;
led-upgrade = &status;
};
gpio-leds {
compatible = "gpio-leds";
status: rss4 {
label = "wpj428:green:rss4";
gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
rss3 {
label = "wpj428:green:rss3";
gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
beeper: beeper {
compatible = "gpio-beeper";
gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&spi_0 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 0>;
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "0:SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "0:MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "0:QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "0:CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "0:DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "0:APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition5@f0000 {
label = "0:APPSBL"; /* uboot */
reg = <0x000f0000 0x00080000>;
read-only;
};
partition5@170000 {
label = "0:ART";
reg = <0x00170000 0x00010000>;
read-only;
};
partition6@180000 {
label = "firmware";
reg = <0x00180000 0x01e80000>;
};
};
};
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <2 0x20>;
};
&gmac1 {
qcom,phy_mdio_addr = <3>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <1 0x10>;
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
};