59 lines
2.1 KiB
Diff
59 lines
2.1 KiB
Diff
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From 4733ade3cdc2b2fcc960d72b6ad9009a3ada38cf Mon Sep 17 00:00:00 2001
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From: Tang Yuantian <Yuantian.Tang@nxp.com>
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Date: Fri, 24 Jun 2016 10:59:46 +0800
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Subject: [PATCH 60/93] ls1012: sata: add sata support
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So add sata configuation for ls1012 soc.
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Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
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---
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arch/arm/cpu/armv8/fsl-layerscape/soc.c | 9 +++++++++
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arch/arm/include/asm/arch-fsl-layerscape/soc.h | 7 +++++++
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2 files changed, 16 insertions(+)
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diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
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index 0a170eb..ab902ce 100644
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--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
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+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
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@@ -328,10 +328,19 @@ int sata_init(void)
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{
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struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
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+#if defined(CONFIG_LS1043A)
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out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
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out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
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out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
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out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
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+#elif defined(CONFIG_LS1012A)
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+ out_le32(&ccsr_ahci->ppcfg, LS1012A_PORT_PHY1);
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+ out_le32(&ccsr_ahci->pp2c, LS1012A_PORT_PHY2);
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+ out_le32(&ccsr_ahci->pp3c, LS1012A_PORT_PHY3);
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+ out_le32(&ccsr_ahci->pp4c, LS1012A_PORT_PHY4);
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+ out_le32(&ccsr_ahci->pp5c, LS1012A_PORT_PHY5);
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+ out_le32(&ccsr_ahci->ptc, LS1012A_PORT_TRANS);
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+#endif
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ahci_init((void __iomem *)CONFIG_SYS_SATA);
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scsi_scan(0);
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diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
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index 0822b49..8071114 100644
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--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
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+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
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@@ -60,6 +60,13 @@ struct cpu_type {
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#define AHCI_PORT_PHY_3_CFG 0x0e081509
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#define AHCI_PORT_TRANS_CFG 0x08000029
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+#define LS1012A_PORT_PHY1 0xa003fffe
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+#define LS1012A_PORT_PHY2 0x28184d1b
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+#define LS1012A_PORT_PHY3 0x0e081906
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+#define LS1012A_PORT_PHY4 0x064a0813
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+#define LS1012A_PORT_PHY5 0x3ffc96a4
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+#define LS1012A_PORT_TRANS 0x08000029
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+
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/* AHCI (sata) register map */
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struct ccsr_ahci {
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u32 res1[0xa4/4]; /* 0x0 - 0xa4 */
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--
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1.7.9.5
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