2013-06-30 13:09:50 +00:00
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From 1a66581c94ad3966a823f2efaf8a5cc514895318 Mon Sep 17 00:00:00 2001
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2013-05-19 18:32:13 +00:00
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From: Kevin Cernekee <cernekee@gmail.com>
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Date: Mon, 31 Oct 2011 11:52:10 -0700
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2013-06-30 13:09:50 +00:00
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Subject: [PATCH 2/3] MIPS: BCM63XX: Handle SW IRQs 0-1
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2013-05-19 18:32:13 +00:00
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MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
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on BMIPS SMP. Make the board support code aware of them.
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Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
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[jogo@openwrt.org: move sw irqs behind timer irq]
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/bcm63xx/irq.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/arch/mips/bcm63xx/irq.c
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+++ b/arch/mips/bcm63xx/irq.c
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@@ -294,6 +294,10 @@ asmlinkage void plat_irq_dispatch(void)
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if (cause & CAUSEF_IP7)
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do_IRQ(7);
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+ if (cause & CAUSEF_IP0)
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+ do_IRQ(0);
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+ if (cause & CAUSEF_IP1)
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+ do_IRQ(1);
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if (cause & CAUSEF_IP2)
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dispatch_internal();
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if (!is_ext_irq_cascaded) {
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