38 lines
1.2 KiB
Diff
38 lines
1.2 KiB
Diff
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From 57700b94f9111578d0fc05bb8f273c0b29951572 Mon Sep 17 00:00:00 2001
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From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Date: Wed, 11 May 2016 14:59:39 +0530
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Subject: [PATCH 29/93] armv8: ls1012a: Added CSU assignment for USB2
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Access settings for USB2 IP is added through CSU register.
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Added CSU ID for USB2, reg: CSL23_REG[8:0]
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Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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---
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.../include/asm/arch-fsl-layerscape/ns_access.h | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
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index d6642a7..2fd33e1 100644
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--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
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+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
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@@ -38,6 +38,7 @@ enum csu_cslx_ind {
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CSU_CSLX_ESDHC,
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CSU_CSLX_IFC = 45,
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CSU_CSLX_I2C1,
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+ CSU_CSLX_USB_2,
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CSU_CSLX_I2C3 = 48,
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CSU_CSLX_I2C2,
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CSU_CSLX_DUART2 = 50,
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@@ -117,6 +118,7 @@ static struct csu_ns_dev ns_dev[] = {
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{CSU_CSLX_ESDHC, CSU_ALL_RW},
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{CSU_CSLX_IFC, CSU_ALL_RW},
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{CSU_CSLX_I2C1, CSU_ALL_RW},
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+ {CSU_CSLX_USB_2, CSU_ALL_RW},
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{CSU_CSLX_I2C3, CSU_ALL_RW},
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{CSU_CSLX_I2C2, CSU_ALL_RW},
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{CSU_CSLX_DUART2, CSU_ALL_RW},
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--
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1.7.9.5
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