2016-09-29 07:48:09 +00:00
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From fd83f12278262feccd012b62c30643bd6a6c2888 Mon Sep 17 00:00:00 2001
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2016-06-29 15:04:05 +00:00
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From: Jes Sorensen <Jes.Sorensen@redhat.com>
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2016-09-29 07:48:09 +00:00
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Date: Mon, 27 Jun 2016 12:32:10 -0400
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2016-06-29 15:04:05 +00:00
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Subject: [PATCH] rtl8xxxu: gen1: Add module parameters to adjust DMA
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aggregation parameters
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This allows the user to specify DMA aggregation timout and block
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count. Blocks are presumably always 512 bytes, so the minimum block
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count is 6 for 802.11 packets.
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Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
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2016-09-29 07:48:09 +00:00
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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2016-06-29 15:04:05 +00:00
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---
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.../net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 28 ++++++++++++++++++++++
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1 file changed, 28 insertions(+)
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--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
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+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
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@@ -45,6 +45,8 @@
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int rtl8xxxu_debug = RTL8XXXU_DEBUG_EFUSE;
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static bool rtl8xxxu_ht40_2g;
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static bool rtl8xxxu_dma_aggregation;
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+static int rtl8xxxu_dma_agg_timeout = -1;
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+static int rtl8xxxu_dma_agg_pages = -1;
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MODULE_AUTHOR("Jes Sorensen <Jes.Sorensen@redhat.com>");
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MODULE_DESCRIPTION("RTL8XXXu USB mac80211 Wireless LAN Driver");
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@@ -65,6 +67,10 @@ module_param_named(ht40_2g, rtl8xxxu_ht4
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MODULE_PARM_DESC(ht40_2g, "Enable HT40 support on the 2.4GHz band");
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module_param_named(dma_aggregation, rtl8xxxu_dma_aggregation, bool, 0600);
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MODULE_PARM_DESC(dma_aggregation, "Enable DMA packet aggregation");
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+module_param_named(dma_agg_timeout, rtl8xxxu_dma_agg_timeout, int, 0600);
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+MODULE_PARM_DESC(dma_agg_timeout, "Set DMA aggregation timeout (range 1-127)");
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+module_param_named(dma_agg_pages, rtl8xxxu_dma_agg_pages, int, 0600);
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+MODULE_PARM_DESC(dma_agg_pages, "Set DMA aggregation pages (range 1-127, 0 to disable)");
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#define USB_VENDOR_ID_REALTEK 0x0bda
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#define RTL8XXXU_RX_URBS 32
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@@ -4441,6 +4447,18 @@ void rtl8xxxu_gen1_init_aggregation(stru
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*/
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page_thresh = (priv->fops->rx_agg_buf_size / 512);
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+ if (rtl8xxxu_dma_agg_pages >= 0) {
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+ if (rtl8xxxu_dma_agg_pages <= page_thresh)
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+ timeout = page_thresh;
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+ else if (rtl8xxxu_dma_agg_pages <= 6)
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+ dev_err(&priv->udev->dev,
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+ "%s: dma_agg_pages=%i too small, minium is 6\n",
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+ __func__, rtl8xxxu_dma_agg_pages);
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+ else
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+ dev_err(&priv->udev->dev,
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+ "%s: dma_agg_pages=%i larger than limit %i\n",
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+ __func__, rtl8xxxu_dma_agg_pages, page_thresh);
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+ }
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rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH, page_thresh);
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/*
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* REG_RXDMA_AGG_PG_TH + 1 seems to be the timeout register on
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@@ -4448,6 +4466,16 @@ void rtl8xxxu_gen1_init_aggregation(stru
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* don't set it, so better set both.
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*/
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timeout = 4;
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+
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+ if (rtl8xxxu_dma_agg_timeout >= 0) {
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+ if (rtl8xxxu_dma_agg_timeout <= 127)
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+ timeout = rtl8xxxu_dma_agg_timeout;
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+ else
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+ dev_err(&priv->udev->dev,
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+ "%s: Invalid dma_agg_timeout: %i\n",
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+ __func__, rtl8xxxu_dma_agg_timeout);
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+ }
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+
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rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH + 1, timeout);
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rtl8xxxu_write8(priv, REG_USB_DMA_AGG_TO, timeout);
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priv->rx_buf_aggregation = 1;
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