24 lines
665 B
Diff
24 lines
665 B
Diff
|
--- a/gcc/config/mips/mips.c
|
||
|
|
+++ b/gcc/config/mips/mips.c
|
||
|
|
@@ -8001,9 +8001,17 @@ mask_low_and_shift_p (machine_mode mode,
|
||
|
|
bool
|
||
|
|
and_operands_ok (machine_mode mode, rtx op1, rtx op2)
|
||
|
|
{
|
||
|
|
- return (memory_operand (op1, mode)
|
||
|
|
- ? and_load_operand (op2, mode)
|
||
|
|
- : and_reg_operand (op2, mode));
|
||
|
|
+ if (!memory_operand (op1, mode))
|
||
|
|
+ return and_reg_operand (op2, mode);
|
||
|
|
+
|
||
|
|
+ if (!and_load_operand (op2, mode))
|
||
|
|
+ return false;
|
||
|
|
+
|
||
|
|
+ if (!TARGET_MIPS16 || si_mask_operand(op2, mode))
|
||
|
|
+ return true;
|
||
|
|
+
|
||
|
|
+ op1 = XEXP (op1, 0);
|
||
|
|
+ return !(REG_P (op1) && REGNO (op1) == STACK_POINTER_REGNUM);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* The canonical form of a mask-low-and-shift-left operation is
|