68 lines
2.5 KiB
Diff
68 lines
2.5 KiB
Diff
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From fce8591f73c6a30c231f220d1092362aae0b985c Mon Sep 17 00:00:00 2001
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From: Pratyush Anand <pratyush.anand@st.com>
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Date: Wed, 11 Dec 2013 15:08:33 +0530
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Subject: [PATCH] PCI: designware: Fix I/O transfers by using CPU (not realio)
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address
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pp->io_base, which is the input of the outbound IO address translation
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unit, should be the CPU address. It was incorrectly programmed to the
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realio address.
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We should pass global_io_offset rather than sys->io_offset to
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pci_ioremap_io(), so we map the new window into the first available spot in
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the Linux view of the I/O space.
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We must also pass CPU address instead of realio address to pci_ioremap_io().
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This patch fixes above issue. It has been tested with Lecroy PTC in AIC
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mode and Pericom PI7C9X2G303EL PCIe switch, which does not work otherwise.
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Tested-by: Mohit Kumar <mohit.kumar@st.com>
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Tested-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Reviewed-by: Marek Vasut <marex@denx.de
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Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Acked-by: Arnd Bergmann <arnd@arndb.de>
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Acked-by: Jingoo Han <jg1.han@samsung.com>
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Cc: Richard Zhu <Hong-Xing.Zhu@freescale.com>
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---
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drivers/pci/host/pcie-designware.c | 5 ++---
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1 file changed, 2 insertions(+), 3 deletions(-)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -394,6 +394,7 @@ int __init dw_pcie_host_init(struct pcie
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+ global_io_offset);
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pp->config.io_size = resource_size(&pp->io);
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pp->config.io_bus_addr = range.pci_addr;
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+ pp->io_base = range.cpu_addr;
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}
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if (restype == IORESOURCE_MEM) {
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of_pci_range_to_resource(&range, np, &pp->mem);
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@@ -419,7 +420,6 @@ int __init dw_pcie_host_init(struct pcie
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pp->cfg0_base = pp->cfg.start;
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pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;
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- pp->io_base = pp->io.start;
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pp->mem_base = pp->mem.start;
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pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
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@@ -585,7 +585,6 @@ static int dw_pcie_wr_other_conf(struct
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return ret;
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}
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-
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static int dw_pcie_valid_config(struct pcie_port *pp,
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struct pci_bus *bus, int dev)
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{
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@@ -679,7 +678,7 @@ static int dw_pcie_setup(int nr, struct
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if (global_io_offset < SZ_1M && pp->config.io_size > 0) {
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sys->io_offset = global_io_offset - pp->config.io_bus_addr;
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- pci_ioremap_io(sys->io_offset, pp->io.start);
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+ pci_ioremap_io(global_io_offset, pp->io_base);
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global_io_offset += SZ_64K;
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pci_add_resource_offset(&sys->resources, &pp->io,
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sys->io_offset);
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