76 lines
1.3 KiB
Text
76 lines
1.3 KiB
Text
|
/ {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <1>;
|
||
|
compatible = "brcm,bcm3368";
|
||
|
|
||
|
aliases {
|
||
|
pflash = &pflash;
|
||
|
};
|
||
|
|
||
|
cpus {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
|
||
|
cpu@0 {
|
||
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
||
|
device_type = "cpu";
|
||
|
reg = <0>;
|
||
|
};
|
||
|
|
||
|
cpu@1 {
|
||
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
||
|
device_type = "cpu";
|
||
|
reg = <1>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
cpu_intc: interrupt-controller {
|
||
|
#address-cells = <0>;
|
||
|
compatible = "mti,cpu-interrupt-controller";
|
||
|
|
||
|
interrupt-controller;
|
||
|
#interrupt-cells = <1>;
|
||
|
};
|
||
|
|
||
|
memory { device_type = "memory"; reg = <0 0>; };
|
||
|
|
||
|
pflash: nor@1e000000 {
|
||
|
compatible = "cfi-flash";
|
||
|
reg = <0x1e000000 0x2000000>;
|
||
|
bank-width = <2>;
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <1>;
|
||
|
|
||
|
status = "disabled";
|
||
|
};
|
||
|
|
||
|
ubus@fff00000 {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <1>;
|
||
|
ranges;
|
||
|
compatible = "simple-bus";
|
||
|
|
||
|
periph_intc: interrupt-controller@fff8c00c {
|
||
|
compatible = "brcm,bcm6345-periph-intc";
|
||
|
reg = <0xfffe000c 0x8>;
|
||
|
|
||
|
interrupt-controller;
|
||
|
#interrupt-cells = <1>;
|
||
|
|
||
|
interrupt-parent = <&cpu_intc>;
|
||
|
interrupts = <2>;
|
||
|
};
|
||
|
|
||
|
ext_intc0: interrupt-controller@fff8c014 {
|
||
|
compatible = "brcm,bcm6345-ext-intc";
|
||
|
reg = <0xfffe0014 0x4>;
|
||
|
|
||
|
interrupt-controller;
|
||
|
#interrupt-cells = <2>;
|
||
|
|
||
|
interrupt-parent = <&periph_intc>;
|
||
|
interrupts = <24>, <25>, <26>, <27>;
|
||
|
};
|
||
|
};
|
||
|
};
|