63 lines
2.2 KiB
Diff
63 lines
2.2 KiB
Diff
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From 5b73d9955fb4b0e3c37f8f6c71910293246c89dc Mon Sep 17 00:00:00 2001
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From: Mathias Kresin <dev@kresin.me>
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Date: Thu, 22 Mar 2018 23:31:38 +0100
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Subject: [PATCH 1/2] net: phy: intel-xway: add VR9 version number
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The VR9 phy ids are matching only for the SoC version 1.2. Rename the
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macros and change the names to take this into account.
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Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/intel-xway.c | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/drivers/net/phy/intel-xway.c
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+++ b/drivers/net/phy/intel-xway.c
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@@ -149,8 +149,8 @@
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#define PHY_ID_PHY22F_1_4 0xD565A410
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#define PHY_ID_PHY11G_1_5 0xD565A401
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#define PHY_ID_PHY22F_1_5 0xD565A411
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-#define PHY_ID_PHY11G_VR9 0xD565A409
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-#define PHY_ID_PHY22F_VR9 0xD565A419
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+#define PHY_ID_PHY11G_VR9_1_2 0xD565A409
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+#define PHY_ID_PHY22F_VR9_1_2 0xD565A419
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#if IS_ENABLED(CONFIG_OF_MDIO)
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static int vr9_gphy_of_reg_init(struct phy_device *phydev)
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@@ -372,9 +372,9 @@ static struct phy_driver xway_gphy[] = {
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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- .phy_id = PHY_ID_PHY11G_VR9,
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+ .phy_id = PHY_ID_PHY11G_VR9_1_2,
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.phy_id_mask = 0xffffffff,
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- .name = "Intel XWAY PHY11G (xRX integrated)",
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+ .name = "Intel XWAY PHY11G (xRX v1.2 integrated)",
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.features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
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SUPPORTED_Asym_Pause),
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.flags = PHY_HAS_INTERRUPT,
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@@ -387,9 +387,9 @@ static struct phy_driver xway_gphy[] = {
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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- .phy_id = PHY_ID_PHY22F_VR9,
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+ .phy_id = PHY_ID_PHY22F_VR9_1_2,
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.phy_id_mask = 0xffffffff,
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- .name = "Intel XWAY PHY22F (xRX integrated)",
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+ .name = "Intel XWAY PHY22F (xRX v1.2 integrated)",
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
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SUPPORTED_Asym_Pause),
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.flags = PHY_HAS_INTERRUPT,
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@@ -412,8 +412,8 @@ static struct mdio_device_id __maybe_unu
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{ PHY_ID_PHY22F_1_4, 0xffffffff },
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{ PHY_ID_PHY11G_1_5, 0xffffffff },
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{ PHY_ID_PHY22F_1_5, 0xffffffff },
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- { PHY_ID_PHY11G_VR9, 0xffffffff },
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- { PHY_ID_PHY22F_VR9, 0xffffffff },
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+ { PHY_ID_PHY11G_VR9_1_2, 0xffffffff },
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+ { PHY_ID_PHY22F_VR9_1_2, 0xffffffff },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, xway_gphy_tbl);
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