2018-05-07 10:07:32 +00:00
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From 0725349768e96542ef06efbd87925a8603cba16a Mon Sep 17 00:00:00 2001
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From: Ryder Lee <ryder.lee@mediatek.com>
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Date: Tue, 6 Mar 2018 17:09:26 +0800
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Subject: [PATCH 208/224] clk: mediatek: update missing clock data for MT7622
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audsys
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Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
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Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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drivers/clk/mediatek/clk-mt7622-aud.c | 1 +
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include/dt-bindings/clock/mt7622-clk.h | 3 ++-
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2 files changed, 3 insertions(+), 1 deletion(-)
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--- a/drivers/clk/mediatek/clk-mt7622-aud.c
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+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
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2018-05-28 21:10:44 +00:00
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@@ -106,6 +106,7 @@ static const struct mtk_gate audio_clks[
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2018-05-07 10:07:32 +00:00
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GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
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GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
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GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
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+ GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
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/* AUDIO2 */
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GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
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GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
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--- a/include/dt-bindings/clock/mt7622-clk.h
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+++ b/include/dt-bindings/clock/mt7622-clk.h
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@@ -235,7 +235,8 @@
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#define CLK_AUDIO_MEM_ASRC3 43
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#define CLK_AUDIO_MEM_ASRC4 44
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#define CLK_AUDIO_MEM_ASRC5 45
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-#define CLK_AUDIO_NR_CLK 46
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+#define CLK_AUDIO_AFE_CONN 46
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+#define CLK_AUDIO_NR_CLK 47
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/* SSUSBSYS */
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