2015-10-26 09:01:05 +00:00
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From 9dabf31b13de7de5742e3f13c0b38fff460b552b Mon Sep 17 00:00:00 2001
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2015-08-17 06:04:32 +00:00
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From: Jonathan Bell <jonathan@raspberrypi.org>
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Date: Tue, 30 Jun 2015 12:35:39 +0100
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2015-10-26 09:01:05 +00:00
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Subject: [PATCH 148/203] pinctrl: bcm2835: Clear the event latch register when
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2015-08-17 06:04:32 +00:00
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disabling interrupts
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It's possible to hit a race condition if interrupts are generated on a GPIO
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pin when the IRQ line in question is being disabled.
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If the interrupt is freed, bcm2835_gpio_irq_disable() is called which
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disables the event generation sources (edge, level). If an event occurred
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between the last disabling of hard IRQs and the write to the event
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source registers, a bit would be set in the GPIO event detect register
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(GPEDSn) which goes unacknowledged by bcm2835_gpio_irq_handler()
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so Linux complains loudly.
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There is no per-GPIO mask register, so when disabling GPIO interrupts
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write 1 to the relevant bit in GPEDSn to clear out any stale events.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
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Acked-by: Stephen Warren <swarren@wwwdotorg.org>
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 ++
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1 file changed, 2 insertions(+)
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--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
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+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
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@@ -503,6 +503,8 @@ static void bcm2835_gpio_irq_disable(str
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spin_lock_irqsave(&pc->irq_lock[bank], flags);
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bcm2835_gpio_irq_config(pc, gpio, false);
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+ /* Clear events that were latched prior to clearing event sources */
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+ bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
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clear_bit(offset, &pc->enabled_irq_map[bank]);
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spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
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}
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