e610cdfc8a
* Switches clocksource to gic timer. * Moves frequency definitions to dtsi since frequency was hardcoded anyway Will work on proper frequency detection later. Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> SVN-Revision: 47875
82 lines
1.8 KiB
Diff
82 lines
1.8 KiB
Diff
--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -52,6 +52,8 @@
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select SYS_SUPPORTS_SMP
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select SYS_SUPPORTS_MIPS_CPS
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select MIPS_GIC
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+ select COMMON_CLK
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+ select CLKSRC_MIPS_GIC
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select HW_HAS_PCI
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endchoice
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--- a/arch/mips/ralink/Makefile
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+++ b/arch/mips/ralink/Makefile
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@@ -6,14 +6,18 @@
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# Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
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# Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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-obj-y := prom.o of.o reset.o clk.o timer.o
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+obj-y := prom.o of.o reset.o
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+
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+ifndef CONFIG_MIPS_GIC
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+ obj-y += clk.o timer.o
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+endif
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obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o
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obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o
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obj-$(CONFIG_IRQ_INTC) += irq.o
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-obj-$(CONFIG_MIPS_GIC) += irq-gic.o
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+obj-$(CONFIG_MIPS_GIC) += irq-gic.o timer-gic.o
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obj-$(CONFIG_SOC_RT288X) += rt288x.o
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obj-$(CONFIG_SOC_RT305X) += rt305x.o
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--- a/arch/mips/ralink/irq-gic.c
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+++ b/arch/mips/ralink/irq-gic.c
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@@ -3,13 +3,6 @@
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#include <linux/of.h>
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#include <linux/irqchip.h>
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-#include <linux/irqchip/mips-gic.h>
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-
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-unsigned int get_c0_compare_int(void)
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-{
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- return gic_get_c0_compare_int();
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-}
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-
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void __init
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arch_init_irq(void)
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{
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--- /dev/null
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+++ b/arch/mips/ralink/timer-gic.c
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@@ -0,0 +1,15 @@
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+#include <linux/init.h>
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+
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+#include <linux/of.h>
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+#include <linux/clk-provider.h>
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+#include <linux/clocksource.h>
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+
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+#include "common.h"
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+
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+void __init plat_time_init(void)
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+{
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+ ralink_of_remap();
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+
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+ of_clk_init(NULL);
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+ clocksource_of_init();
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+}
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--- a/arch/mips/ralink/mt7621.c
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+++ b/arch/mips/ralink/mt7621.c
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@@ -152,11 +152,6 @@
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}
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break;
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}
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- cpu_clk = 880000000;
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- ralink_clk_add("cpu", cpu_clk);
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- ralink_clk_add("1e000b00.spi", 50000000);
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- ralink_clk_add("1e000c00.uartlite", 50000000);
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- ralink_clk_add("1e000d00.uart", 50000000);
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}
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void __init ralink_of_remap(void)
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