c4f9474059
Add a patchfile that implements distro-boot and is meant to go upstream Also make the other patches git-am'able for easier maintenance. Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
37 lines
1.3 KiB
Diff
37 lines
1.3 KiB
Diff
From 98848106b9558244ae36a85229caabcdb57d0f7b Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Fri, 23 Sep 2016 13:58:14 +0200
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Subject: [PATCH 2/4] clearfog: reset usom onboard 1512 phy
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Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
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the uSOM's 88E81512 gigabit Ethernet phy.
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This GPIO is valid on ClearFog rev 2.1 and newer.
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Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
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[jonas.gorski: adapted to upstream u-boot code]
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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board/solidrun/clearfog/clearfog.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
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index 2773f5957e..3a8257cac3 100644
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--- a/board/solidrun/clearfog/clearfog.c
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+++ b/board/solidrun/clearfog/clearfog.c
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@@ -131,8 +131,12 @@ int board_init(void)
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/* Toggle GPIO41 to reset onboard switch and phy */
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clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
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clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
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+ /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */
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+ clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
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+ clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19));
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mdelay(1);
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setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
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+ setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
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mdelay(10);
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/* Init I2C IO expanders */
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--
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2.12.2
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