6eaf8b3d89
Updated the devicetree source files to make use of the following upstreamed drivers: - xrx200 ethernet phy - reset controller unit - dwc2 - fpi Use our custom xrx200 ethernet phy compatible to support boards, which have switched the vr9 revision during lifetime, with a single devicetree source file. By switching to the dwc2 driver + usb phy framework, we don't need to used our custom gpio power patch and can use a fixed regulator instead. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mathias Kresin <dev@kresin.me>
204 lines
3.9 KiB
Text
204 lines
3.9 KiB
Text
#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,xway", "lantiq,ase";
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aliases {
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serial0 = &asc1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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cpus {
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cpu@0 {
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compatible = "mips,mips4Kc";
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};
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};
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memory@0 {
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device_type = "memory";
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};
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biu@1f800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1f800000 0x800000>;
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ranges = <0x0 0x1f800000 0x7fffff>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,icu";
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reg = <0x80200 0x28
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0x80228 0x28
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0x80250 0x28
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0x80278 0x28
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0x802a0 0x28>;
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};
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watchdog@803f0 {
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compatible = "lantiq,wdt";
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reg = <0x803f0 0x10>;
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};
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};
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sram@1f000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram", "simple-bus";
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reg = <0x1f000000 0x800000>;
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ranges = <0x0 0x1f000000 0x7fffff>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,eiu-xway";
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reg = <0x101000 0x1000>;
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interrupt-parent = <&icu0>;
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lantiq,eiu-irqs = <29 30 31>;
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};
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pmu0: pmu@102000 {
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compatible = "lantiq,pmu-xway";
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reg = <0x102000 0x1000>;
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};
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cgu0: cgu@103000 {
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compatible = "lantiq,cgu-xway";
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reg = <0x103000 0x1000>;
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#clock-cells = <1>;
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};
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rcu0: rcu@203000 {
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compatible = "lantiq,ase-rcu", "simple-mfd", "syscon";
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reg = <0x203000 0x1000>;
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ranges = <0x0 0x203000 0x100>;
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big-endian;
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reset: reset-controller@10 {
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compatible = "lantiq,danube-reset";
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reg = <0x10 4>, <0x14 4>;
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#reset-cells = <2>;
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};
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usb_phy: usb2-phy@18 {
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compatible = "lantiq,ase-usb2-phy";
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reg = <0x18 4>;
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status = "disabled";
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resets = <&reset 4 4>;
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reset-names = "ctrl";
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#phy-cells = <0>;
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};
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reboot@10 {
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compatible = "syscon-reboot";
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reg = <0x10 4>;
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regmap = <&rcu0>;
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offset = <0x10>;
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mask = <0x40000000>;
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};
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};
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};
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fpi@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xeefffff>;
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reg = <0x10000000 0xef00000>;
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localbus: localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
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1 0 0x4000000 0x4000010>; /* addsel1 */
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compatible = "lantiq,localbus", "simple-bus";
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};
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spi: spi@e100800 {
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compatible = "lantiq,ase-spi";
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reg = <0xe100800 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <24 25 26>;
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interrupt-names = "spi_rx", "spi_tx", "spi_err",
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"spi_frm";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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gptu@e100a00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xe100a00 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <33 34 35 36 37 38>;
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};
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gpio: pinmux@e100b10 {
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compatible = "lantiq,ase-pinctrl";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0xe100b10 0xa0>;
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};
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asc1: serial@e100c00 {
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compatible = "lantiq,asc";
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reg = <0xe100c00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <72 74 75>;
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};
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mei@e116000 {
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compatible = "lantiq,mei-xway";
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interrupt-parent = <&icu0>;
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interrupts = <81>;
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};
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usb: usb@e101000 {
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compatible = "lantiq,ase-usb";
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reg = <0xe101000 0x1000
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0xe120000 0x3f000>;
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interrupt-parent = <&icu0>;
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interrupts = <39>;
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dr_mode = "host";
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phys = <&usb_phy>;
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phy-names = "usb2-phy";
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status = "disabled";
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};
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dma0: dma@e104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xe104100 0x800>;
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};
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ebu0: ebu@e105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xe105300 0x100>;
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};
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ppe@e234000 {
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compatible = "lantiq,ppe-ase";
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interrupt-parent = <&icu0>;
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interrupts = <85>;
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};
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gsw: etop@e180000 {
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compatible = "lantiq,etop-xway";
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reg = <0xe180000 0x40000>;
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interrupt-parent = <&icu0>;
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interrupts = <105 109>;
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};
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};
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adsl {
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compatible = "lantiq,adsl-ase";
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};
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};
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