6eaf8b3d89
Updated the devicetree source files to make use of the following upstreamed drivers: - xrx200 ethernet phy - reset controller unit - dwc2 - fpi Use our custom xrx200 ethernet phy compatible to support boards, which have switched the vr9 revision during lifetime, with a single devicetree source file. By switching to the dwc2 driver + usb phy framework, we don't need to used our custom gpio power patch and can use a fixed regulator instead. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mathias Kresin <dev@kresin.me>
213 lines
3.7 KiB
Text
213 lines
3.7 KiB
Text
#include "ar9.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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bootargs = "root= console=ttyLTQ0,115200";
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};
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_red;
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led-running = &power_green;
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led-dsl = &dsl;
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led-internet = &internet;
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led-usb = &led_usb;
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led-wifi = &wifi_green;
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};
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memory@0 {
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reg = <0x0 0x4000000>;
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};
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rtl8366rb {
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compatible = "realtek,rtl8366rb";
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gpio-sda = <&gpio 35 GPIO_ACTIVE_HIGH>;
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gpio-sck = <&gpio 37 GPIO_ACTIVE_HIGH>;
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realtek,initvals = <
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0x0000 0x0830
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0x0400 0x8130
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0x000A 0x83ED
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0x0F51 0x0017
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0x02F5 0x0048
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0x02FA 0xFFDF
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0x02FB 0xFFE0
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0x0450 0x0000
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0x0401 0x0000
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0x0431 0x0960
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>;
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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rfkill {
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label = "rfkill";
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gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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internet: internet {
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label = "dgn3500:green:internet";
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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};
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internet2 {
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label = "dgn3500:red:internet";
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gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
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};
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dsl: dsl {
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label = "dgn3500:green:dsl";
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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};
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led_usb: usb {
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label = "dgn3500:green:usb";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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};
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power_green: power {
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label = "dgn3500:green:power";
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gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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power_red: power2 {
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label = "dgn3500:red:power";
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gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
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};
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wifi_green: wifi {
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label = "dgn3500:green:wireless";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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wifi2 {
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label = "dgn3500:amber:wireless";
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gpios = <&gpio 51 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "dgn3500:green:wps";
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gpios = <&gpio 52 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&gpio {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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exin {
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lantiq,groups = "exin1";
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lantiq,function = "exin";
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};
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pci {
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lantiq,groups = "gnt1", "req1";
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lantiq,function = "pci";
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};
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pci-in {
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lantiq,groups = "req1";
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lantiq,output = <0>;
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lantiq,open-drain = <1>;
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lantiq,pull = <2>;
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};
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pci-out {
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lantiq,groups = "gnt1";
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lantiq,output = <1>;
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lantiq,pull = <0>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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&gsw {
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phy-mode = "mii";
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};
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&pci0 {
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status = "okay";
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gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
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wifi@168c,0029 {
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compatible = "pci168c,0029";
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reg = <0x7000 0 0 0 0>;
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qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
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};
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};
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&spi {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <4 0>;
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spi-max-frequency = <20000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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reg = <0x0 0x10000>;
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label = "uboot";
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read-only;
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};
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partition@10000 {
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reg = <0x10000 0x10000>;
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label = "uboot-env";
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read-only;
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};
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ath9k_cal: partition@20000 {
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reg = <0x20000 0x10000>;
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label = "calibration";
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read-only;
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};
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partition@50000 {
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reg = <0x50000 0xfa0000>;
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label = "firmware";
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};
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};
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};
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};
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&usb_phy0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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