openwrtv3/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw53xx.dts
Luka Perkov f689e3cf8b imx6: update 3.10 ventana dts
update the Ventana DTS files with upstream fixes:
 - The 'model' property in the imx-audio-sgtl5000 binding specifies the
   user-visible name of the audio device. This should be something common an
   not baseboard specific.
 - update model descriptions for all processor variants

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

SVN-Revision: 40987
2014-06-02 21:23:29 +00:00

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1.6 KiB
Text

/*
* Copyright 2013 Gateworks Corporation
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-gw53xx.dtsi"
/ {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX";
compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6DL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
MX6DL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
MX6DL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
MX6DL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
MX6DL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
MX6DL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
MX6DL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
MX6DL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
MX6DL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
MX6DL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
MX6DL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
MX6DL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
MX6DL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
MX6DL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
MX6DL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
MX6DL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
>;
};
};
};