openwrtv3/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx
Christian Lamparter f3ffac90bc ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344
Some AR9344 boards do very poorly with the default settings and
need custom rxdv-delay, rxd-delay, txd-delay, txen-delay flags
to perform reasonably.

In this case the WD My Net Wi-Fi Range Extender can not even
manage 10Mbps on a 1Gbit link:

root@AR9344:~# iperf3 -s
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
Accepted connection from client [...]
[  5] local [...] connected to client
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-1.00   sec  1.09 MBytes  9.16 Mbits/sec
[  5]   1.00-2.00   sec   895 KBytes  7.33 Mbits/sec
[  5]   2.00-3.00   sec   762 KBytes  6.25 Mbits/sec
[...]
[  5]  10.00-10.03  sec  17.0 KBytes  4.74 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-10.03  sec  9.00 MBytes  7.52 Mbits/sec

with but with the correct settings in place, it does much better:

root@AR9344:~# iperf3 -s
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
Accepted connection from client [...]
[  5] local [...] connected to client
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-1.00   sec  23.1 MBytes   193 Mbits/sec
[  5]   1.00-2.00   sec  23.1 MBytes   194 Mbits/sec
[  5]   2.00-3.00   sec  23.2 MBytes   195 Mbits/sec
[...]
[  5]  10.00-10.04  sec   710 KBytes   180 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-10.04  sec   237 MBytes   198 Mbits/sec

The tx data and enable delay bits definitions are taken from Atheros'
AR9344 Data Sheet Section "8.6.1 Ethernet Configuration (ETH_CFG)" on
page 153.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2018-08-13 08:48:37 +02:00
..
ag71xx.h ath79: ag71xx: remove PHY reset 2018-08-09 18:44:57 +02:00
ag71xx_ar7240.c ath79: ag71xx: assert a switch reset if defined in dts. 2018-07-30 10:43:35 +02:00
ag71xx_debugfs.c ath79: add new OF only target for QCA MIPS silicon 2018-05-07 08:06:51 +02:00
ag71xx_ethtool.c ath79: add new OF only target for QCA MIPS silicon 2018-05-07 08:06:51 +02:00
ag71xx_gmac.c ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 2018-08-13 08:48:37 +02:00
ag71xx_main.c ath79: ag71xx: fix speed applied to MII0/1_CTRL on ar71xx/ar913x 2018-08-13 08:37:19 +02:00
ag71xx_mdio.c ath79: ag71xx: Rework mdio clock settings 2018-07-30 10:43:34 +02:00
ag71xx_phy.c ath79: add new OF only target for QCA MIPS silicon 2018-05-07 08:06:51 +02:00
Kconfig ath79: add new OF only target for QCA MIPS silicon 2018-05-07 08:06:51 +02:00
Makefile ath79: ag71xx: Make builtin switch driver a separated module 2018-07-30 10:43:33 +02:00