95 lines
2.8 KiB
Diff
95 lines
2.8 KiB
Diff
From: Felix Fietkau <nbd@openwrt.org>
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Date: Thu, 14 Jan 2016 03:14:03 +0100
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Subject: [PATCH] ath9k_hw: add low power tx gain table for AR953x
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Used in some newer TP-Link AR9533 devices.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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---
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--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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@@ -698,6 +698,9 @@ static void ar9003_tx_gain_table_mode2(s
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else if (AR_SREV_9340(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9340Modes_low_ob_db_tx_gain_table_1p0);
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+ else if (AR_SREV_9531_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ qca953x_1p1_modes_no_xpa_low_power_tx_gain_table);
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else if (AR_SREV_9485_11_OR_LATER(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_low_ob_db_tx_gain_1_1);
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--- a/drivers/net/wireless/ath/ath9k/ar953x_initvals.h
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+++ b/drivers/net/wireless/ath/ath9k/ar953x_initvals.h
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@@ -757,6 +757,71 @@ static const u32 qca953x_1p1_modes_xpa_t
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{0x00016448, 0x6c927a70},
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};
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+static const u32 qca953x_1p1_modes_no_xpa_low_power_tx_gain_table[][2] = {
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+ /* Addr allmodes */
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+ {0x0000a2dc, 0xfff55592},
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+ {0x0000a2e0, 0xfff99924},
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+ {0x0000a2e4, 0xfffe1e00},
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+ {0x0000a2e8, 0xffffe000},
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+ {0x0000a410, 0x000050d6},
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+ {0x0000a500, 0x00000069},
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+ {0x0000a504, 0x0400006b},
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+ {0x0000a508, 0x0800006d},
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+ {0x0000a50c, 0x0c000269},
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+ {0x0000a510, 0x1000026b},
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+ {0x0000a514, 0x1400026d},
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+ {0x0000a518, 0x18000669},
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+ {0x0000a51c, 0x1c00066b},
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+ {0x0000a520, 0x1d000a68},
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+ {0x0000a524, 0x21000a6a},
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+ {0x0000a528, 0x25000a6c},
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+ {0x0000a52c, 0x29000a6e},
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+ {0x0000a530, 0x2d0012a9},
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+ {0x0000a534, 0x310012ab},
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+ {0x0000a538, 0x350012ad},
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+ {0x0000a53c, 0x39001b0a},
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+ {0x0000a540, 0x3d001b0c},
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+ {0x0000a544, 0x41001b0e},
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+ {0x0000a548, 0x43001bae},
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+ {0x0000a54c, 0x45001914},
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+ {0x0000a550, 0x47001916},
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+ {0x0000a554, 0x49001b96},
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+ {0x0000a558, 0x49001b96},
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+ {0x0000a55c, 0x49001b96},
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+ {0x0000a560, 0x49001b96},
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+ {0x0000a564, 0x49001b96},
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+ {0x0000a568, 0x49001b96},
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+ {0x0000a56c, 0x49001b96},
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+ {0x0000a570, 0x49001b96},
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+ {0x0000a574, 0x49001b96},
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+ {0x0000a578, 0x49001b96},
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+ {0x0000a57c, 0x49001b96},
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+ {0x0000a600, 0x00000000},
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+ {0x0000a604, 0x00000000},
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+ {0x0000a608, 0x00000000},
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+ {0x0000a60c, 0x00000000},
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+ {0x0000a610, 0x00000000},
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+ {0x0000a614, 0x00000000},
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+ {0x0000a618, 0x00804201},
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+ {0x0000a61c, 0x01408201},
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+ {0x0000a620, 0x01408502},
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+ {0x0000a624, 0x01408502},
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+ {0x0000a628, 0x01408502},
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+ {0x0000a62c, 0x01408502},
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+ {0x0000a630, 0x01408502},
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+ {0x0000a634, 0x01408502},
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+ {0x0000a638, 0x01408502},
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+ {0x0000a63c, 0x01408502},
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+ {0x0000b2dc, 0xfff55592},
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+ {0x0000b2e0, 0xfff99924},
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+ {0x0000b2e4, 0xfffe1e00},
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+ {0x0000b2e8, 0xffffe000},
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+ {0x00016044, 0x044922db},
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+ {0x00016048, 0x6c927a70},
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+ {0x00016444, 0x044922db},
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+ {0x00016448, 0x6c927a70},
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+};
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+
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static const u32 qca953x_2p0_baseband_core[][2] = {
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/* Addr allmodes */
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{0x00009800, 0xafe68e30},
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